Hi,
Chen-Yu, thanks for your comments.
On 03/02/17 16:36, Chen-Yu Tsai wrote:
> Hi,
>
> On Fri, Feb 3, 2017 at 11:26 PM, Jagan Teki wrote:
>> On Feb 1, 2017 2:37 AM, "Andre Przywara" wrote:
>>
>> The DRAM controller in the Allwinner H5 SoC is again
Hi,
On Fri, Feb 3, 2017 at 11:26 PM, Jagan Teki wrote:
> On Feb 1, 2017 2:37 AM, "Andre Przywara" wrote:
>
> The DRAM controller in the Allwinner H5 SoC is again very similar to
> the one in the H3 and A64.
> Based on the existing socid parameter, add
On Feb 1, 2017 2:37 AM, "Andre Przywara" wrote:
The DRAM controller in the Allwinner H5 SoC is again very similar to
the one in the H3 and A64.
Based on the existing socid parameter, add support for this controller
by reusing the bulk of the code and only deviating where