Op 5 jul. 2014, om 23:16 heeft bruce bushby bruce.bus...@gmail.com het
volgende geschreven:
Looking much better:
# ls -l /dev/*spi*
crw---1 root root 153, 0 Jan 10 13:51 /dev/spidev0.0
#
I added an spidev childnode to my spi1 node like so:
spi1:
On Thu, Jul 03, 2014 at 10:55:41PM +0800, Chen-Yu Tsai wrote:
The A23 has an almost identical PRCM clock tree. The difference in
the APB0 clock is the smallest divisor is 1, instead of 2.
This patch adds a separate sun8i-a23-apb0-clk driver to support it.
Signed-off-by: Chen-Yu Tsai
On Thu, Jul 03, 2014 at 10:55:42PM +0800, Chen-Yu Tsai wrote:
sun6i-a31-apb0-gates supports using clock-indices for holes between
individual gates. However, the driver passes the number of gates
registered in clk_data-clk_num, which of_clk_src_onecell_get uses
to recognize the range of valid
Hi Chen-Yu,
It looks mostly fine but...
On Thu, Jul 03, 2014 at 10:55:48PM +0800, Chen-Yu Tsai wrote:
With sun8i PRCM support available, we can add the PRCM clock and
reset controller nodes to the DTSI. Also update R_UART's clock
phandle and add it's reset control phandle.
Signed-off-by:
On Thu, Jul 03, 2014 at 10:55:44PM +0800, Chen-Yu Tsai wrote:
The Allwinner A23 SoC has a PRCM unit like the previous A31 SoC.
The differences are the AR100 clock can no longer be modified,
the APB0 clock has different divisors, and some clock gates are
gone.
This patch adds a compatible
On Thu, Jul 03, 2014 at 10:55:47PM +0800, Chen-Yu Tsai wrote:
Select the MFD_SUN6I_PRCM option when sun8i arch is enabled in order to
get the PRCM (Power/Reset/Clock Management) related drivers compiled.
Also select ARCH_HAS_RESET_CONTROLLER and RESET_CONTROLLER to make sure
the reset
On Friday 04 July 2014, Maxime Ripard wrote:
It feels a little fragile to rely on the organisation of the clock tree
and the naming thereof. If the IP block is ever reused on an SoC with a
different clock tree layout then we have to handle things differently.
What do you suggest
Hi,
On Mon, Jul 7, 2014 at 4:58 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi Chen-Yu,
It looks mostly fine but...
On Thu, Jul 03, 2014 at 10:55:48PM +0800, Chen-Yu Tsai wrote:
With sun8i PRCM support available, we can add the PRCM clock and
reset controller nodes to the
On Sun, Jul 06, 2014 at 05:22:00PM +0200, Arnd Bergmann wrote:
On Friday 04 July 2014, Maxime Ripard wrote:
It feels a little fragile to rely on the organisation of the clock
tree
and the naming thereof. If the IP block is ever reused on an SoC with
a
different clock
On Tue, Jun 17, 2014 at 4:52 PM, Chen-Yu Tsai w...@csie.org wrote:
The A23 uses the same pin controller as previous SoC's from Allwinner.
Add support for the pins controlled by the main PIO controller.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Maxime Ripard
On Tue, Jun 17, 2014 at 4:52 PM, Chen-Yu Tsai w...@csie.org wrote:
The A23 has a R_PIO pin controller, similar to the one found on the A31 SoC.
Add support for the pins controlled by the R_PIO controller.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Maxime Ripard
Seems very reasonable.
Regards
Am 07.07.2014 16:45, schrieb Jens Kuske:
Signed-off-by: Jens Kuske jensku...@gmail.com
---
drivers/char/sunxi_g2d/g2d_driver.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/char/sunxi_g2d/g2d_driver.c
Hallo Andrea,
How can I understand which version (you said r3p0 mali) is to be used with
my board? Is there a reference page?
In addiction, based on the installed kernel, could in compile only the mali
driver and add it as external module? Do I need to recompile the whole
kernel?
Thank you
Ask your vendor for the kernel sources! linux-sunxi mailing list is not
the right place for doing user support for board manufacturers, that
don't provide kernel sources.
Regards
Am 07.07.2014 16:59, schrieb Simo Xefil:
Hallo Andrea,
How can I understand which version (you said r3p0 mali) is
Hi Andreas,
Was only asking how choose which sunxi-mali version is to choose based on a
given board or hardware, to understand how it works. I'll ask the vendor as
well, but I would like to understant which HW is supported by sunxi-mai and
how to choose the right version, independently from
Any word from the devicetree folks?
On Sun, Jun 29, 2014 at 04:16:58PM +0200, Hans de Goede wrote:
From: Arend van Spriel ar...@broadcom.com
The Broadcom bcm43xx sdio devices are fullmac devices that may be
integrated in ARM platforms. Currently, the brcmfmac driver for
these devices
Thanks Koen! I think I'm starting to understand a little more now at
least enough to have a go learning how to do it. MPU6050 is interesting
led me to iio which is also interesting. Main issue is that it's i2c
and doesn't offer all 9 axis.then agaain I could be talking about my
a!ss
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