[linux-sunxi] [PATCH v10 02/35] musb: sunxi: Add proper macros instead of numericals

- add proper macros for musb_config members - use bool 'true' for multipoint and dyn_fifo instead of numerical 1 Signed-off-by: Jagan Teki Acked-by: Jun Nie --- drivers/usb/musb-new/sunxi.c | 12 1 file changed, 8 insertions(+), 4

[linux-sunxi] [PATCH v10 10/35] phy: Add Allwinner A64 USB PHY driver

USB PHY implementation for Allwinner SOC's can be handling in to single driver with different phy configs. This driver handle all Allwinner USB PHY's start from 4I to 50I(except 9I). Currently added A64 compatibility more will add in next coming patches. Current implementation is unable to get

[linux-sunxi] [PATCH v10 15/35] phy: sun4i-usb: Add A10/A13/A20 PHY config

Add PHY configs for Allwinner A10/A13/A20 which are SUN4I. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- drivers/phy/allwinner/phy-sun4i-usb.c | 28 1 file changed, 28 insertions(+) diff --git

[linux-sunxi] [PATCH v10 03/35] musb: sunxi: Use simple way to fill musb_hdrc pdata

Filling musb_hdrc pdata using structure will unnecessary add extra ifdefs, so fill them inside probe call for better code understanding and get rid ifdefs using devicetree compatible. Signed-off-by: Jagan Teki Acked-by: Jun Nie ---

[linux-sunxi] [PATCH v10 12/35] phy: sun4i-usb: Add H3/H5 PHY config

H3/H5 has 4 USB PHY, rest are similar to A64. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- drivers/phy/allwinner/phy-sun4i-usb.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c

[linux-sunxi] [PATCH v10 11/35] phy: sun4i-usb: Add id_detect and vbus_detect ops

ID and VBUS detection code require when musb changing between Host and/or Peripheral modes. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- drivers/phy/allwinner/phy-sun4i-usb.c | 39 +++ include/phy-sun4i-usb.h

[linux-sunxi] [PATCH v10 14/35] phy: sun4i-usb: Add A83T USB PHY config

Unlike, other Allwinner SUN4I Phy supporting SOC, A83T has 2 USB PHY's and second one is HSIC. So phy control need to configure to handle these HSIC and SIDDQ requirement. Signed-off-by: Jagan Teki Acked-by: Jun Nie ---

[linux-sunxi] [PATCH v10 09/35] musb: sunxi: Add support for H3/H5/A64

Like other Allwinner SoC, the H3/H5/A64 is missing the config register from the musb hardware block. Use a known working value for it like other SoC. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- drivers/usb/musb-new/musb_regs.h | 3 ++- 1 file

[linux-sunxi] [PATCH v10 05/35] sunxi: clock: Fix clock gating for H3/H5/A64

clock gating bits on a64 are different than H3_H5, so fixed only required bits on clock_sun6i.h. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 12 +--- 1 file changed, 9 insertions(+), 3

[linux-sunxi] [PATCH v10 16/35] phy: sun4i-usb: Add A31 PHY config

Allwinner A31 has 3 USB PHY's and rest similar to A10. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- drivers/phy/allwinner/phy-sun4i-usb.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c

[linux-sunxi] [PATCH v10 07/35] musb: sunxi: Use BIT instead of numerical shift

Use BIT is possible areas instead of numerical shift. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- drivers/usb/musb-new/sunxi.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git

[linux-sunxi] [PATCH v10 04/35] musb: sunxi: Add fifo config

Unlike other Allwinner SOC's H3/H5/V3s OTG support 4 endpoints with relevant fifo configs, rest all have 5 endpoints. So add the fifo configs and defer them based on driver_data. Signed-off-by: Jagan Teki Acked-by: Jun Nie ---

[linux-sunxi] [PATCH v10 01/35] usb: sunxi: Simplify ccm reg base code

Move struct sunxi_ccm_reg pointer to private structure so-that accessing ccm reg base become more proper way and avoid local initialization in each function. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- drivers/usb/host/ehci-sunxi.c | 15

[linux-sunxi] [PATCH v10 00/35] phy: sunxi: Add Allwinner sun4i USB PHY

This series rework of previous version where it removes legacy usb phy handling and added phy driver on generic-phy framework. Current implementation phy driver is unable to get pinctrl, clock and reset details from DT since the dm code on these will add it future. Changes for v8, v9, v10: -

[linux-sunxi] [PATCH v10 06/35] musb: sunxi: Add OTG device clkgate and reset for H3/H5

Add OTG device clkgate and reset for H3/H5 through driver_data. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- drivers/usb/musb-new/sunxi.c | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/usb/musb-new/sunxi.c

[linux-sunxi] [PATCH v10 08/35] sunxi: clock: Fix OHCI clock gating for H3/H5

From: Chen-Yu Tsai Clock gating bits on H43/H5 were wrong, fix them. Signed-off-by: Chen-Yu Tsai Reviewed-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 11 --- 1 file

[linux-sunxi] [PATCH v3] board: sun50i: Add Amarula A64-Relic initial support

Amarula A64-Relic is A64 based IoT device, which support - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 1GB DDR3 RAM - 8GB eMMC - AP6330 Wifi/BLE - MIPI-DSI - CSI: OV5640 sensor - USB OTG - 12V DC power supply Signed-off-by: Jagan Teki --- Changes for

[linux-sunxi] [PATCH v10 34/35] arm64: allwinner: h5: orangepi-prime: Sync usb otg nodes from Linux

orangepi-prime has usb otg routed host with either EHCI0/OHCI0 sync the same from Linux. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/dts/sun50i-h5-orangepi-prime.dts | 13 + 1 file changed, 13 insertions(+) diff --git

[linux-sunxi] [PATCH v10 35/35] configs: orangepi-prime: Enable USB OTG peripheral mode

Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki Acked-by: Jun Nie --- configs/orangepi_prime_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/orangepi_prime_defconfig

[linux-sunxi] [PATCH v10 31/35] arm64: allwinner: h5: orangepi-pc2: Order nodes in alphabetic

Order sun50i-h5-orangepi-pc2.dts nodes in alphabetic Signed-off-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 56 - 1 file changed, 28 insertions(+), 28 deletions(-) diff --git

[linux-sunxi] [PATCH v10 23/35] sunxi: Drop legacy usb_phy.c

Allwinner PHY USB code is now part of generic-phy framework, so drop existing legacy handling like arch/arm/mach-sunxi.c and related code areas. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/include/asm/arch-sunxi/usb_phy.h | 20 --

[linux-sunxi] [PATCH v10 22/35] usb: sunxi: Switch to use generic-phy

Allwinner USB PHY handling can be done through driver-model generic-phy so add the generic-phy ops to relevant places on host and musb sunxi driver and enable them in respective SOC's. Signed-off-by: Jagan Teki Acked-by: Jun Nie ---

[linux-sunxi] [PATCH v10 25/35] arm64: allwinner: a64: bananapi-m64: Sync usb_otg node from Linux

Sync bananapi-m64 usb_otg node from Linux. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/dts/sun50i-a64-bananapi-m64.dts | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts

[linux-sunxi] [PATCH v10 26/35] configs: bananapi-m64: Enable USB OTG peripheral mode

Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki Acked-by: Jun Nie --- configs/bananapi_m64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/bananapi_m64_defconfig

[linux-sunxi] [PATCH v10 21/35] phy: sun4i-usb: Add a sunxi specific function for setting squelch-detect

The sunxi otg phy has a bug where it wrongly detects a high speed squelch when reset on the root port gets de-asserted with a lo-speed device. The workaround for this is to disable squelch detect before de-asserting reset, and re-enabling it after the reset de-assert is done. Add a sunxi specific

[linux-sunxi] [PATCH v10 32/35] arm64: allwinner: h5: orangepi-pc2: Sync usb otg nodes from Linux

orangepi-pc2 has usb otg routed host with either EHCI0/OHCI0 sync the same from Linux. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 13 + 1 file changed, 13 insertions(+) diff --git

[linux-sunxi] [PATCH v10 33/35] configs: orangepi-pc2: Enable USB OTG peripheral mode

Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki Acked-by: Jun Nie --- configs/orangepi_pc2_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/orangepi_pc2_defconfig

[linux-sunxi] [PATCH v10 30/35] configs: bananapi-m2-plus: Enable USB OTG peripheral mode

Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki Acked-by: Jun Nie --- configs/Sinovoip_BPI_M2_Plus_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/Sinovoip_BPI_M2_Plus_defconfig

[linux-sunxi] [PATCH v10 28/35] arm64: allwinner: a64: bananapi-m64: Sync usb host nodes from Linux

Sync bananapi-m64 usb host nodes from Linux. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/dts/sun50i-a64-bananapi-m64.dts | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts

[linux-sunxi] [PATCH v10 20/35] board: sunxi: Use generic-phy for board_usb_cable_connected

Allwinner PHY USB code is now part of generic-phy framework, so use it in board_usb_cable_connected. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- board/sunxi/board.c | 33 - 1 file changed, 32 insertions(+), 1

[linux-sunxi] [PATCH v10 27/35] ARM: dts: sun8i: a83t: Sync usbphy node from Linux

Sync sun8i-a83t usbphy node details from Linux. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/dts/sun8i-a83t.dtsi | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm/dts/sun8i-a83t.dtsi

[linux-sunxi] [PATCH v10 29/35] ARM: dts: sun8i-h3: bananapi-m2-plus: Sync usb otg nodes from Linux

Bananapi-m2-plus has usb otg routed host with either EHCI0/OHCI0 sync the same from Linux. Signed-off-by: Jagan Teki Acked-by: Jun Nie --- arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts | 13 + 1 file changed, 13 insertions(+) diff --git

[linux-sunxi] Re: [BUG report] kworker issue on A20 SoC with kernel >= 4.12.0

Am Freitag, 27. April 2018 11:16:00 UTC+2 schrieb Kai: > > > > On 4.16.4 . > I'm not able to debug it myself for now, however, A20 was abandoned by > everyone? > I don't think A20 was abandond - at least not when it comes to using the devices. Development might be stalled since Linux

[linux-sunxi] [PATCH] rtc: sun6i: Fix bit_idx value for clk_register_gate

From: Michael Trimarchi clk-gate core will take bit_idx through clk_register_gate and then do clk_gate_ops by using BIT(bit_idx), but rtc-sun6i is passing bit_idx as BIT(bit_idx) it becomes BIT(BIT(bit_idx) which is wrong and eventually external gate clock is not

[linux-sunxi] Re: Allwinner A64: Issue on external rtc clock to wifi chip

Hi Maxime On Mon, May 14, 2018 at 1:17 PM, Maxime Ripard wrote: > On Mon, May 14, 2018 at 03:12:49PM +0530, Jagan Teki wrote: >> On Mon, May 14, 2018 at 2:36 PM, Maxime Ripard >> wrote: >> > On Mon, May 14, 2018 at 02:34:22PM +0530, Jagan