Dne ponedeljek, 04. januar 2021 ob 01:03:17 CET je Samuel Holland napisal(a):
> On 1/3/21 3:26 AM, Jernej Skrabec wrote:
> > There was no need to have prcm definitions for H6 and similar SoCs till
> > now. However, support R_I2C will be needed soon in SPL.
> >
> > Move old definitions to
On Fri, 11 Dec 2020 at 02:20, Andre Przywara wrote:
>
> From: Yangtao Li
>
> Add binding for A100's and H616's mmc and emmc controller.
>
> Signed-off-by: Yangtao Li
> Signed-off-by: Andre Przywara
Applied for next to my mmc tree, thanks!
Kind regards
Uffe
> ---
>
On Fri, 11 Dec 2020 at 02:20, Andre Przywara wrote:
>
> From: Yangtao Li
>
> This patch adds support for A100 MMC controller, which use word address
> for internal dma.
>
> Signed-off-by: Yangtao Li
> Signed-off-by: Andre Przywara
Applied for next to my mmc tree, thanks!
Kind regards
Uffe
Dne ponedeljek, 04. januar 2021 ob 03:02:03 CET je Samuel Holland napisal(a):
> On 1/3/21 3:26 AM, Jernej Skrabec wrote:
> > From: Andre Przywara
> >
> > H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM
> > driver and need for PMIC configuration, which pull several drivers
Hi Samuel,
On Sat 09 Jan 21, 16:24, Samuel Holland wrote:
> On 12/31/20 8:29 AM, Paul Kocialkowski wrote:
> > The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 bridge
> > found on Allwinner SoCs such as the A31 and V3/V3s.
> >
> > It is a standalone block, connected to the CSI controller
Dne ponedeljek, 11. januar 2021 ob 02:03:03 CET je Andre Przywara napisal(a):
> Hi,
>
> I came up with those three patches to prepare for the H616.
> Patch 1 simplifies the MMC driver, so the H616 support becomes a
> one-liner.
> Patch 2 cleans up the Ethernet driver, so we can support the same
>
Salut Paul,
Just a minor comment about the v4l2 async API.
On Thu, 31 Dec 2020 at 11:30, Paul Kocialkowski
wrote:
>
> The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 bridge
> found on Allwinner SoCs such as the A31 and V3/V3s.
>
> It is a standalone block, connected to the CSI
On Thu, 31 Dec 2020 15:29:41 +0100, Paul Kocialkowski wrote:
> This introduces YAML bindings documentation for the A31 MIPI CSI-2
> controller.
>
> Signed-off-by: Paul Kocialkowski
> ---
> .../media/allwinner,sun6i-a31-mipi-csi2.yaml | 149 ++
> 1 file changed, 149
This series introduces H616 support. Later patches add also OrangePi
Zero2 support but since H616 DT is not merged into Linux yet, I don't
expect them to land yet.
Most patches are ready to land, except those which depends on non-upstreamed
DT yet.
This series is based on u-boot-sunxi repo.
There was no need to have prcm definitions for H6 and similar SoCs till
now. However, support R_I2C will be needed soon in SPL.
Move old definitions to prcm_sun6i.h and add new ones in prcm_sun50i.h.
One of those files will be selected in common prcm.h based on defined
macros.
This commit
I2C support, especially R_I2C port, will be needed in future. Upcoming
support for H616 will need R_I2C to adjust DRAM voltage.
Reviewed-by: Samuel Holland
Signed-off-by: Jernej Skrabec
---
.../include/asm/arch-sunxi/clock_sun50i_h6.h | 1 +
arch/arm/mach-sunxi/Kconfig | 2
Dne ponedeljek, 11. januar 2021 ob 01:02:07 CET je André Przywara napisal(a):
> On 03/01/2021 09:26, Jernej Skrabec wrote:
> > This PMIC can be found on H616 boards and it's very similar to AXP805
> > and AXP806.
> >> Signed-off-by: Jernej Skrabec
>
> The existing sunxi PMIC code is the typical
H616 pinctrl is no different configuration wise than others, so just add
compatible for it.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
drivers/gpio/sunxi_gpio.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index
OrangePi Zero2 is SBC based on Allwinner H616 with 1 GiB of RAM, SD card
support, gigabit ethernet, micro HDMI, WIFI, Bluetooth and 1 USB 2.0
port. It also has two GPIO headers which allows further peripherals to
be used.
Device Tree file is taken from initial OrangePi Zero2 Linux submission
and
This commit introduces H616 DTSI file and dt-bindings headers needed for
device tree files.
Files are taken from initial Linux H616 support submission with minor
change - emac0 fallback has H6 compatible instead of A64, otherwise
network doesn't work. H616 DTSI is not merged upstream yet.
This commit introduces DM H616 clock driver.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi/Kconfig| 7 ++
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk_h616.c | 120 +++
3 files changed, 128 insertions(+)
From: Andre Przywara
So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.
To avoid
Allwinner H616 supports many types of DRAM. Most notably it supports
LPDDR4. However, all commercially available boards at this time use
only DDR3, so this commit adds only DDR3 support.
Controller and MBUS are very similar to H6 but PHY is completely
unknown.
Signed-off-by: Jernej Skrabec
---
From: Andre Przywara
At the moment we only consider the EPHY register for those SoCs were
we actually have an internal PHY to configure. However even other SoCs
have this register, an expect a bit to be cleared for proper operation
with an external PHY.
Rework sun8i_emac_set_syscon_ephy() to be
This PMIC can be found on H616 boards and it's very similar to AXP805
and AXP806.
Reviewed-by: Andre Przywara
Reviewed-by: Jaehoon Chung
Signed-off-by: Jernej Skrabec
---
arch/arm/mach-sunxi/pmic_bus.c | 6 +++
board/sunxi/board.c| 10 ++--
drivers/power/Kconfig | 13
It turns out that there are at least 2 other SoCs which have basically
the same memory map, similar clocks and other features as H6. It's very
likely that we'll see more such SoCs in the future. In order to ease
porting to new SoCs and lower ifdef clutter, introduce common symbol for
them.
It turns out that several SoCs share same mmc configuration as H6. In
order to lower ifdef clutter replace H6 specific macro with common one.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
arch/arm/include/asm/arch-sunxi/mmc.h | 2 +-
drivers/mmc/sunxi_mmc.c | 12
While currently none of the newer Allwinner SoCs currently has I2C
support implemented in U-Boot, this will change soon. mvtwsi driver is
good as it is for them except one macro. Update it to be ready once I2C
support lands for those SoCs.
Reviewed-by: Heiko Schocher
Reviewed-by: Samuel Holland
From: Andre Przywara
H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM
driver and need for PMIC configuration, which pulls several drivers which
are not needed otherwise.
spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with
that, reported in SPL header.
This port is used for debug terminal on all known H616 boards.
Reviewed-by: Samuel Holland
Signed-off-by: Jernej Skrabec
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c| 4
2 files changed, 5 insertions(+)
diff --git
H616 has mostly the same clocks as H6 with some small differences. Just
reuse H6 clocks for H616 and handle differences with macros.
Reviewed-by: Samuel Holland
Signed-off-by: Jernej Skrabec
---
.../include/asm/arch-sunxi/clock_sun50i_h6.h | 18 +-
This port is needed for communication with PMIC. SPL uses it to set DRAM
voltage on H616 boards.
Reviewed-by: Samuel Holland
Signed-off-by: Jernej Skrabec
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
board/sunxi/board.c| 4
2 files changed, 5 insertions(+)
diff
H616 is very similar to H6 so most of the infrastructure can be reused.
However, two big differences are that it doesn't have functional SRAM A2
which is usually used for TF-A and it doesn't have ARISC co-processor.
It also needs bigger SPL size - 48 KiB.
Signed-off-by: Jernej Skrabec
---
H616 mmc clock is on same address as H6.
Signed-off-by: Jernej Skrabec
---
drivers/mmc/sunxi_mmc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index d632b2332ca3..8458d154afd8 100644
--- a/drivers/mmc/sunxi_mmc.c
+++
H616 uses different address for reset. Add it.
Signed-off-by: Jernej Skrabec
---
arch/arm/cpu/armv8/fel_utils.S | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/fel_utils.S b/arch/arm/cpu/armv8/fel_utils.S
index 9510dcd9e4c1..2dbd4b365221 100644
---
From: Andre Przywara
---
drivers/net/sun8i_emac.c | 28
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index e0bf19e34c17..4867a8425404 100644
--- a/drivers/net/sun8i_emac.c
+++
On 1/12/21 5:11 AM, Jernej Skrabec wrote:
> H616 mmc clock is on same address as H6.
>
> Signed-off-by: Jernej Skrabec
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> drivers/mmc/sunxi_mmc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git
On 1/12/21 5:11 AM, Jernej Skrabec wrote:
> It turns out that several SoCs share same mmc configuration as H6. In
> order to lower ifdef clutter replace H6 specific macro with common one.
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Jernej Skrabec
Reviewed-by: Jaehoon Chung
Best Regards,
Dne ponedeljek, 11. januar 2021 ob 21:11:32 CET je Jernej Skrabec napisal(a):
> This series introduces H616 support. Later patches add also OrangePi
> Zero2 support but since H616 DT is not merged into Linux yet, I don't
> expect them to land yet.
>
> Most patches are ready to land, except those
On Sun, Jan 03, 2021 at 04:30:52AM -0600, Samuel Holland wrote:
> The R_INTC in the A31 and newer sun8i/sun50i SoCs has additional
> functionality compared to the sun7i/sun9i NMI controller. Among other
> things, it multiplexes up to 128 interrupts corresponding to (and in
> parallel to) the first
On Sun, 03 Jan 2021 04:30:53 -0600, Samuel Holland wrote:
> The Allwinner H3 SoC contains an R_INTC that is, as far as we know,
> compatible with the R_INTC present in other sun8i/sun50i SoCs starting
> with the A31. Since the R_INTC hardware is undocumented, introduce a new
> compatible for the
On 1/11/21 2:11 PM, Jernej Skrabec wrote:
> From: Andre Przywara
>
> H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM
> driver and need for PMIC configuration, which pulls several drivers which
> are not needed otherwise.
>
> spl_mmc_get_uboot_raw_sector() will now compare
On 1/11/21 2:11 PM, Jernej Skrabec wrote:
> There was no need to have prcm definitions for H6 and similar SoCs till
> now. However, support R_I2C will be needed soon in SPL.
>
> Move old definitions to prcm_sun6i.h and add new ones in prcm_sun50i.h.
> One of those files will be selected in common
On 1/11/21 2:11 PM, Jernej Skrabec wrote:
> It turns out that there are at least 2 other SoCs which have basically
> the same memory map, similar clocks and other features as H6. It's very
> likely that we'll see more such SoCs in the future. In order to ease
> porting to new SoCs and lower ifdef
39 matches
Mail list logo