Hi,
On 04/28/2014 07:55 AM, Julian Calaby wrote:
Hi Alexander,
On Mon, Apr 28, 2014 at 3:35 PM, Александр Берсенев b...@hackerdom.ru wrote:
I fixed all known kernel oopses by placing spinlock in interrupt handler and
changing driver initialization order.
Left to do:
1) deal with timers
I am going away for few days for not being too noisy.
There's nothing wrong with being too noisy.
Absolutely, thank you for working on this.
+1 on that. I was thinking about contacting Wingrime about taking on this
driver as I thought it would be quite a nice one to start mainlining
On Mon, 2014-04-28 at 01:58 +0200, Marek Vasut wrote:
On Sunday, April 27, 2014 at 09:29:02 PM, Ian Campbell wrote:
On Sun, 2014-04-27 at 21:15 +0200, Marek Vasut wrote:
On Sunday, April 27, 2014 at 08:38:52 PM, Ian Campbell wrote:
On Sun, 2014-04-27 at 20:07 +0200, Marek Vasut wrote:
Dear Ian,
On Sun, 2014-04-27 at 19:47 +0100, Ian Campbell wrote:
This is the driver for one particular ARM cache controller and not the
one used for the SoC. In any case it does proper start/end handling
only for cache flush operations, not cache invalidate.
Cache invalidate is a
Hi ,
i downloaded fedora image from this link.
http://dl.cubieboard.org/software/a20-cubietruck/fedora/ct-fedora20-lxde/
(LXDE Desktop)
now i tried by unpack by the command *imgrepacker*.
then i replace uImage and script by our uImage and script and then pack it.
but flashing to
Hi Julian,
thanks for your reply, i would like to try it but i would like to have some
steps to follow to use it.
regards
Armando
--
You received this message because you are subscribed to the Google Groups
linux-sunxi group.
To unsubscribe from this group and stop receiving emails from it,
Hi Armando,
On Tue, Apr 29, 2014 at 12:24 AM, hmandevt...@gmail.com wrote:
Hi Julian,
thanks for your reply, i would like to try it but i would like to have some
steps to follow to use it.
https://backports.wiki.kernel.org/index.php/Documentation
This is literally the third link on the
Hello,
This patch series adds support for some functions provided by the PRCM
(Power/Reset/Clock Management) unit:
- AR100, AHB0 and APB0 clocks
- APB0 reset controller
These functions are needed to get the P2WI driver working, but more
subdevices might be added later.
Best Regards,
Boris
The current implementation uses sunxi_reset_init function for both early
init and platform device probe.
The sunxi_reset_init function uses DT to retrieve device resources, which
will be an issue if reset controllers are registered from an MFD device
that define resources from mfd_cell
Add DT bindings documentation for sunxi's reset controllers.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../bindings/reset/allwinner,sunxi-clock-reset.txt | 21 +
1 file changed, 21 insertions(+)
create mode 100644
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and gates: used to clk
Add support for these clks in a separate driver so that they can be probed
as platform
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 49
1 file changed, 49 insertions(+)
diff --git
Document new compatible strings for clock provided by the PRCM
(Power/Reset/Clock Management) unit.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
Documentation/devicetree/bindings/clock/sunxi.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git
Document DT bindings of the PRCM (Power/Reset/Clock Management) unit.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/mfd/sun6i-prcm.txt | 71 ++
1 file changed, 71 insertions(+)
create mode 100644
The PRCM (Power/Reset/Clock Management) block exposes several subdevices
in different subsystems (clk, reset ...)
Add basic support for the PRCM unit with clk (AR100, AHB0, and APB0 clks)
and reset controller subdevices.
Other subdevices might be added later (if needed).
Signed-off-by: Boris
Hi Boris,
El 28/04/14 11:58, Boris BREZILLON escribió:
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and gates: used to clk
Add support for these clks
Hi,
On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and
On 28/04/2014 17:25, Emilio López wrote:
Hi Boris,
El 28/04/14 11:58, Boris BREZILLON escribió:
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and
On Fri, Apr 18, 2014 at 09:15:11PM +0200, Maxime Ripard wrote:
For some reason, the base address of the fifth I2C adapter in the A20 was
incorrect. Change this to the actual base address.
Reported-by: Marcus Cooper codekip...@gmail.com
Signed-off-by: Maxime Ripard
On Sun, Apr 20, 2014 at 01:15:34PM +1000, Julian Calaby wrote:
Hi Maxime
On Sat, Apr 19, 2014 at 4:52 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Enable the performance monitoring unit found in the A20 SoCs.
Don't you mean A_31_?
Right. Applied the two patches, with this
Hi,
On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
Hi everyone,
This patch adds a few Kconfig option for all the supported Allwinner
SoCs family.
Hopefully, this will reduce the size of the kernel images when we're
interested in only or a few of these family, but not all of them.
Maxime Ripard (2):
ARM: sunxi: Split the various SoCs support
This will allow to better isolate various options, and reduce the overall
kernel size if we're interested in only one of the SoCs.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/mach-sunxi/Kconfig | 35 +--
1 file changed, 29
Enable the new Kconfig option related to SoC support in multi_v7 and sunxi
defconfigs.
While we're at it, also enable the missing Allwinnner SPI options.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/configs/multi_v7_defconfig | 6 ++
On Sun, Apr 27, 2014 at 1:54 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 04/24/2014 06:39 PM, Chen-Yu Tsai wrote:
The original default may have been miscalculated as it was for 624MHz.
The A23 user manual states that PLL6 should be fixed to 600MHz, and
not any other rate.
Good
Hi Chen-Yu,
On 28/04/2014 17:59, Chen-Yu Tsai wrote:
Hi,
On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
-
On 28/04/2014 18:02, Chen-Yu Tsai wrote:
Hi,
On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: Boris BREZILLON
On Tue, Apr 29, 2014 at 1:27 AM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
On 28/04/2014 18:02, Chen-Yu Tsai wrote:
Hi,
On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Add DT definitions for PRCM (Power/Reset/Clock Management)
for me BFS performs bad .
tried it on A10/20 X86.
Effect from nothing to negative.
--
You received this message because you are subscribed to the Google Groups
linux-sunxi group.
To unsubscribe from this group and stop receiving emails from it, send an email
to
On Saturday 26 April 2014 18:16:53 Maxime Ripard wrote:
This will allow to better isolate various options, and reduce the overall
kernel size if we're interested in only one of the SoCs.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Looks good, just one small request:
diff
On Mon, 28 Apr 2014 11:02:09 -0700 (PDT)
nil minimize...@gmail.com wrote:
for me BFS performs bad .
tried it on A10/20 X86.
Effect from nothing to negative.
Thanks for your feedback. What are the exact steps to reproduce
these test results? I would love to see what's going on.
--
Best
Requested by Marek during upstream review.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
tools/mksunxiboot.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c
index 0de591b..00349d9 100644
---
In particular this removes the possibility that boot_buf is misaligned in
gen_check_sum by making the type explicit.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
tools/mksunxiboot.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/tools/mksunxiboot.c
The other existing designware glue files are under board/*.
Marek requested that it move out of drivers/net as part of upstream
review. His suggestion was to move to arch/arm/.../sunxi but I found all
the others under board/*
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
Raised by Marek during upstreaming.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/timer.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/timer.c b/arch/arm/cpu/armv7/sunxi/timer.c
index ca951a2..3626389 100644
Requested by Marek during upstream review.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
tools/mksunxiboot.c | 41 +++--
1 file changed, 19 insertions(+), 22 deletions(-)
diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c
index 50fcda5..0de591b
On Sat, Apr 26, 2014 at 12:16:12PM +0200, Hans de Goede wrote:
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
On Sat, Apr 26, 2014 at 12:16:05PM +0200, Hans de Goede wrote:
From: Emilio López emi...@elopez.com.ar
This commit implements .determine_rate, so that our factor clocks can be
reparented when needed.
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede
On Sat, Apr 26, 2014 at 12:16:14PM +0200, Hans de Goede wrote:
Add clk-nodes for the mmc clocks.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 32
1 file changed, 32 insertions(+)
diff --git
On Sat, Apr 26, 2014 at 12:16:16PM +0200, Hans de Goede wrote:
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
This is required at least on ARM.
When sending instead of simply invalidating the entire descriptor, flush
as little as possible while still respecting ARCH_DMA_MINALIGN, as
requested by Alexey.
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Alexey Brodkin abrod...@synopsys.com
---
v2: -
struct dw_eth_dev contains fields which are accessed via DMA, so make sure it
is aligned to a dma boundary. Without this I see:
ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Alexey Brodkin
This patch introduces Consumer IR(CIR) support for sunxi boards.
This is based on Alexsey Shestacov's work based on the original driver
supplied by Allwinner.
---
Changes since version 1:
- Fix timer memory leaks
- Fix race condition when driver unloads while interrupt handler is active
Siarhei,
Thanks for the fast reply!, Now is working!!
Leandro
El lunes, 28 de abril de 2014 16:03:04 UTC-3, Siarhei Siamashka escribió:
On Mon, 28 Apr 2014 10:25:22 -0700 (PDT)
DrOctavius1 lnge...@hotmail.com javascript: wrote:
Hello,
I'm trying to stress my olinuxino A13 board,
I connected with wingrime, it seems we are graduated from the same
university, it was very surprising for me :). He said he had ir driver
almost-ready last summer, but he hasn't much free time now.
Also I checked the patch with checkpatch.pl and all is ok:
total: 0 errors, 0 warnings, 430 lines
Hi Marek,
On Mon, 2014-04-28 at 07:55 +0200, Marek Vasut wrote:
On Monday, April 28, 2014 at 07:51:49 AM, Chen-Yu Tsai wrote:
On Mon, Apr 28, 2014 at 2:08 AM, Marek Vasut ma...@denx.de wrote:
On Sunday, April 27, 2014 at 05:29:29 PM, Chen-Yu Tsai wrote:
On Sun, Apr 27, 2014 at 11:25 PM,
On Monday, April 28, 2014 at 09:55:46 PM, Ian Campbell wrote:
On Sat, 2014-04-26 at 20:27 +0200, Marek Vasut wrote:
On Saturday, April 19, 2014 at 03:30:14 PM, Ian Campbell wrote:
On Sun, 2014-04-13 at 23:45 -0400, Shixin Zeng wrote:
Hi,
I compiled the current u-boot from
On Mon, Apr 28, 2014 at 08:07:38PM +0200, Arnd Bergmann wrote:
On Saturday 26 April 2014 18:16:53 Maxime Ripard wrote:
This will allow to better isolate various options, and reduce the overall
kernel size if we're interested in only one of the SoCs.
Signed-off-by: Maxime Ripard
This will allow to better isolate various options, and reduce the overall
kernel size if we're interested in only one of the SoCs.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
Changes from v1:
- Changed from config to menuconfig
- Enabled the SoCs variants by default if
Hi,
On Sat, Apr 26, 2014 at 08:31:07AM -0700, Guenter Roeck wrote:
On 04/23/2014 08:04 AM, Maxime Ripard wrote:
Most of the watchdog code is duplicated between the machine restart code and
the watchdog driver. Add the restart hook to the watchdog driver, to be able
to
remove it from the
Hi,
On Sat, Apr 26, 2014 at 08:32:27AM -0700, Guenter Roeck wrote:
On 04/23/2014 08:04 AM, Maxime Ripard wrote:
That code used to be in the machine code, but it's more fit here with other
restart hooks.
That will allow to cleanup the machine directory, while waiting for a proper
watchdog
Hi Boris,
On Mon, Apr 28, 2014 at 04:58:44PM +0200, Boris BREZILLON wrote:
Add DT bindings documentation for sunxi's reset controllers.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../bindings/reset/allwinner,sunxi-clock-reset.txt | 21
+
1
Hi Andi,
On Tue, Apr 29, 2014 at 12:44 AM, Andi Lamçe andila...@gmail.com wrote:
Hello,
I bought a development board olinuxino A20 of Olimex. I'm trying to install
debian on sd card and am following the tutorial of the community of Olimex.
when I run: make-A20 OLinuXino_MICRO CROSS_COMPILE =
Hi Boris,
On Mon, Apr 28, 2014 at 04:58:46PM +0200, Boris BREZILLON wrote:
The PRCM (Power/Reset/Clock Management) block exposes several subdevices
in different subsystems (clk, reset ...)
Add basic support for the PRCM unit with clk (AR100, AHB0, and APB0 clks)
and reset controller
On Mon, Apr 28, 2014 at 04:58:45PM +0200, Boris BREZILLON wrote:
The current implementation uses sunxi_reset_init function for both early
init and platform device probe.
The sunxi_reset_init function uses DT to retrieve device resources, which
will be an issue if reset controllers are
On Mon, Apr 28, 2014 at 04:58:47PM +0200, Boris BREZILLON wrote:
Document DT bindings of the PRCM (Power/Reset/Clock Management) unit.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/mfd/sun6i-prcm.txt | 71
++
1
Check on Olimex site, but something is messed up in your uboot
configuration. -m603e is asking for PowerPC build and A20 is ARM.
Try the sunxi BSP instead
http://linux-sunxi.org/BSP
jonsmirl@terra:/work2/sunxi-bsp$ ./configure | grep ol
Usage: ./configure board
supported boards:
*
On Mon, Apr 28, 2014 at 04:58:48PM +0200, Boris BREZILLON wrote:
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and gates: used to clk
Used to clk?
On Wed, Apr 23, 2014 at 9:02 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 23 April 2014 17:04:36 Maxime Ripard wrote:
-static void __init sunxi_dt_init(void)
-{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char * const
Ühel kenal päeval, E, 28.04.2014 kell 12:57, kirjutas Александр
Берсенев:
This patch introduces Consumer IR(CIR) support for sunxi boards.
This is based on Alexsey Shestacov's work based on the original
driver
supplied by Allwinner.
You need to also CC people/lists in charge of certian
Ühel kenal päeval, E, 28.04.2014 kell 20:18, kirjutas Ian Campbell:
Also propagate errors.
Requested by Marek as part of upstream review.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/board.c | 15 +--
drivers/net/sunxi_gmac.c | 6
61 matches
Mail list logo
