[linux-sunxi] How can I get pcDuino join sunxi-linux org?

2014-06-22 Thread Pillar Zuo
Hi I am a pcDuino software angineer PM.pcDuino always use the allwinner's chip.pcDuino user all over the world more then 100 countries.The numbers of users more then 50w.There are a lot of user saywhy I can't find any pcDuino information in sunxi-linux.org.and alse there are some users

Re: [linux-sunxi] How can I get pcDuino join sunxi-linux org?

2014-06-22 Thread Zoltan HERPAI
On Sun, 22 Jun 2014, Pillar Zuo wrote: Hi      I am a pcDuino software angineer PM.pcDuino always use the allwinner's chip.pcDuino user all over the world more then 100 countries.The numbers of users more then 50w.There are a lot of user saywhy I can't find any pcDuino information in

[linux-sunxi] Re: [PATCH v3 1/4] crypto: Add Allwinner Security System crypto accelerator

2014-06-22 Thread Corentin LABBE
Le 14/06/2014 21:01, Marek Vasut a écrit : On Tuesday, June 10, 2014 at 02:43:14 PM, LABBE Corentin wrote: Add support for the Security System included in Allwinner SoC A20. The Security System is a hardware cryptographic accelerator that support AES/MD5/SHA1/DES/3DES/PRNG algorithms.

[linux-sunxi] Re: [PATCH v3 1/4] crypto: Add Allwinner Security System crypto accelerator

2014-06-22 Thread Marek Vasut
On Sunday, June 22, 2014 at 01:58:08 PM, Corentin LABBE wrote: [...] + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation version 2 of the License The license

[linux-sunxi] Re: [PATCH v3 2/4] crypto: Update makefile and Kconfig for Security System

2014-06-22 Thread Marek Vasut
On Sunday, June 22, 2014 at 01:58:38 PM, Corentin LABBE wrote: Le 14/06/2014 21:01, Marek Vasut a écrit : On Tuesday, June 10, 2014 at 02:43:15 PM, LABBE Corentin wrote: Add necessary changes for configuring and compiling the Security System driver. Signed-off-by: LABBE Corentin

[linux-sunxi] Re: [PATCH v3 1/4] crypto: Add Allwinner Security System crypto accelerator

2014-06-22 Thread Russell King - ARM Linux
On Sun, Jun 22, 2014 at 02:23:15PM +0200, Marek Vasut wrote: On Sunday, June 22, 2014 at 01:58:08 PM, Corentin LABBE wrote: [...] + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the

[linux-sunxi] Re: [PATCH v3 1/4] crypto: Add Allwinner Security System crypto accelerator

2014-06-22 Thread Russell King - ARM Linux
On Tue, Jun 10, 2014 at 02:43:14PM +0200, LABBE Corentin wrote: +int sunxi_aes_poll(struct ablkcipher_request *areq) +{ ... + if (areq-src == NULL || areq-dst == NULL) { + dev_err(ss-dev, ERROR: Some SGs are NULL %u\n, areq-nbytes); + return -1; You return -1 from

[linux-sunxi] Re: [PATCH v3 1/4] crypto: Add Allwinner Security System crypto accelerator

2014-06-22 Thread Marek Vasut
On Sunday, June 22, 2014 at 02:33:35 PM, Russell King - ARM Linux wrote: On Sun, Jun 22, 2014 at 02:23:15PM +0200, Marek Vasut wrote: On Sunday, June 22, 2014 at 01:58:08 PM, Corentin LABBE wrote: [...] + * This program is free software; you can redistribute it and/or modify + * it

[linux-sunxi] DMA channels on A20

2014-06-22 Thread jonsm...@gmail.com
Why is the channel for TX one less than RX? In the manual both of the DRQs are 27. spi0: spi@01c05000 { compatible = allwinner,sun4i-a10-spi; reg = 0x01c05000 0x1000; interrupts = 0 10 4; clocks = ahb_gates 20, spi0_clk; clock-names = ahb, mod; dmas = dma 1 27, dma 1 26; dma-names = rx, tx;

Re: [linux-sunxi] DMA channels on A20

2014-06-22 Thread Chen-Yu Tsai
On Sun, Jun 22, 2014 at 11:48 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: Why is the channel for TX one less than RX? In the manual both of the DRQs are 27. If you looked at the bindings in the patch, you would see that dma 1 xx specifies dedicated DMA, which indeed has separate

Re: [linux-sunxi] DMA channels on A20

2014-06-22 Thread jonsm...@gmail.com
On Sun, Jun 22, 2014 at 12:36 PM, Chen-Yu Tsai w...@csie.org wrote: On Sun, Jun 22, 2014 at 11:48 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: Why is the channel for TX one less than RX? In the manual both of the DRQs are 27. If you looked at the bindings in the patch, you would see

[linux-sunxi] Re: Hans 3.15 kernel - second CPU

2014-06-22 Thread bruce bushby
Hi Jon Just read your fix for getting CPU 1 online .hoping I could bounce a couple of questions off you? How did you switch uboot . did you flash a new version over writing the factory version that shipped with your board? I'm using an Olimex A20-SOM eval kit and building from

Re: [linux-sunxi] Re: Hans 3.15 kernel - second CPU

2014-06-22 Thread bruce bushby
Hi Jon I am using the sunxi-next branch and everything compiles clean. I just don't know how to install / update the uboot that is in my module . no doubt I just need to RTFM a bit more. can' t imagine its that hard to flash the board with the new version of uboot? # Bootloaders

Re: [linux-sunxi] Re: Hans 3.15 kernel - second CPU

2014-06-22 Thread jonsm...@gmail.com
Just boot off of an SD Card until you are happy with everything. If there is a bootable SD Card in the device, the A20 will boot from it and ignore flash. That is how I do development so that I don't have to keep messing with refashing the target. To get started just make an SD Card with uboot

[linux-sunxi] linux-sunxi/sunxi-next, commit hash 119918d: emac is brocken

2014-06-22 Thread Arokux X
[root@alarm ~]# ip link set dev eth0 up [ 19.715477] sun4i-emac 1c0b000.ethernet eth0: could not find the PHY [ 19.721839] sun4i-emac 1c0b000.ethernet eth0: cannot probe MDIO bus [root@alarm ~]# ip link set dev eth0 up [ 63.860493] genirq: Flags mismatch irq 17. (eth0) vs.

[linux-sunxi] Re: linux-sunxi/sunxi-next, commit hash 119918d: emac is brocken

2014-06-22 Thread Arokux X
Hi guys, I'm sorry I've hit the send button to early, so here goes the explanation. I've built the most resent linux-sunxi/sunxi-next (119918d) and emac is brocken. After some debugging I've found out that this is bus_find_device which returns NULL, instead of some meaningful value