lör 2014-10-25 klockan 09:51 +0100 skrev Gnichi Mohamed:
This is the patch that i gathered from the discussion. I tested it
with mcp3008 adc full duplex communication and it works as a charm.
Do I read the patch correctly that DMA is not supported?
Regards
Henrik
--
You received this
Hi Henrik
I really dont know what you are asking about.
All i did is gathering the patch posted in the forum
On 26 Oct 2014 10:33, Henrik Nordström hen...@henriknordstrom.net wrote:
lör 2014-10-25 klockan 09:51 +0100 skrev Gnichi Mohamed:
This is the patch that i gathered from the discussion.
The A80 R-PIO controller has one more bank that what we've seen so far, add the
PN pin bank.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
Hi,
As usual when we support a new SoC, we need to add a new pinctrl
driver.
Here is it, this time for the A80, which doesn't bring anything new
beside one more bank compared to the previous SoCs, but less pins
overall.
Maxime
Maxime Ripard (4):
pinctrl: sunxi: Add PN bank base pin
The A80 pinctrl driver is just as usual our pinctrl/gpio/external interrupt
controller.
Nothing really out of the extraordinary here...
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun9i-a80.dtsi | 16
1 file changed, 16 insertions(+)
Enable the UART0 muxing, as set up by the bootloader.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun9i-a80-optimus.dts | 2 ++
arch/arm/boot/dts/sun9i-a80.dtsi| 7 +++
2 files changed, 9 insertions(+)
diff --git
Hi,
On Sun, Oct 26, 2014 at 11:36 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
The A80 pinctrl driver is just as usual our pinctrl/gpio/external interrupt
controller.
Nothing really out of the extraordinary here...
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
