The cubieboard uses the internal codec to output sound to its mini-jack.
Enable it.
Signed-off-by: Chen-Yu Tsai
---
Hi Maxime,
This patch applies on top of your audio codec DT series.
Tested with 44.1 kHz and 48 kHz mp3 files using mpg123.
ChenYu
---
arch/arm/boot/dts/sun4i-a10-cubieboard.dt
From: Hans de Goede
Date: Tue, 20 Oct 2015 10:42:24 +0200
> Fix sun4i-emac not releasing the following resources:
> -iomapped memory not released on probe-failure nor on remove
> -clock not getting disabled on probe-failure nor on remove
> -sram not being released on remove
>
> And while at it a
This is the fex file for the Yones TopTech BS1078 v2 board.
A31s SOC, 1024x600 LCD, 1GB RAM, 8GB NAND, rtl8723as wifi
Device Page: http://linux-sunxi.org/Yones_Toptech_BS1078_V2
---
sys_config/a31s/yonestoptech_bs1078_v2.fex | 1065
1 file changed, 1065 insertions(+)
Hi Jens,
On Thu, Oct 22, 2015 at 3:13 AM, Jens Kuske wrote:
> The H3 clock control unit is similar to the those of other sun8i family
> members like the A23.
>
> It adds a new bus gates clock similar to the simple gates, but with a
> different parent clock for each single gate.
> Some of the gate
Hi,
On 21-10-15 18:13, Jens Kuske wrote:
Hi everyone,
This is v3 of my patch series introducing basic kernel support for Allwinner's
H3 SoC. It mainly adds basic clocks and pinctrl. It also adds interrupts,
timers, watchdog, RTC, dmaengine, MMC and UARTs, which are mostly compatible
to those in
Hi Jens,
On 21-10-15 18:13, Jens Kuske wrote:
Hi everyone,
This is v3 of my patch series introducing basic kernel support for Allwinner's
H3 SoC. It mainly adds basic clocks and pinctrl. It also adds interrupts,
timers, watchdog, RTC, dmaengine, MMC and UARTs, which are mostly compatible
to tho
On 21 October 2015 at 19:11, Code Kipper wrote:
> On 21 October 2015 at 18:13, Jens Kuske wrote:
>> Hi everyone,
>>
>> This is v3 of my patch series introducing basic kernel support for
>> Allwinner's
>> H3 SoC. It mainly adds basic clocks and pinctrl. It also adds interrupts,
>> timers, watchdo
On 21 October 2015 at 18:13, Jens Kuske wrote:
> Hi everyone,
>
> This is v3 of my patch series introducing basic kernel support for Allwinner's
> H3 SoC. It mainly adds basic clocks and pinctrl. It also adds interrupts,
> timers, watchdog, RTC, dmaengine, MMC and UARTs, which are mostly compatibl
The H3 uses the same pin controller as previous SoC's from Allwinner.
Add support for the pins controlled by the main PIO controller.
Signed-off-by: Jens Kuske
---
.../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
drivers/pinctrl/sunxi/Kconfig | 4 +
drivers/pinc
The Orange Pi Plus is a SBC based on the Allwinner H3 SoC
with 8GB eMMC, multiple USB ports through a USB hub chip, SATA through
a USB-SATA bridge, one uSD slot, a 10/100/1000M ethernet port,
WiFi, HDMI, headphone jack, IR receiver, a microphone, a CSI connector
and a 40-pin GPIO header.
Signed-of
Adding a new compatible allows us to define SoC specific behaviour
if necessary, for example forcing a particular device out of reset
even if no driver is actually using it.
Signed-off-by: Jens Kuske
---
Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt | 1 +
drivers/reset
The Allwinner H3 is a home entertainment system oriented SoC with
four Cortex-A7 cores and a Mali-400MP2 GPU.
Signed-off-by: Jens Kuske
---
arch/arm/boot/dts/sun8i-h3.dtsi | 499
1 file changed, 499 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8
On Mon, Oct 19, 2015 at 2:59 AM, Chen-Yu Tsai wrote:
> On Mon, Oct 19, 2015 at 2:07 AM, Lawrence Yu wrote:
>> Enable the axp221 PMIC chip in the dts file.
>>
>> Allows board to power off correctly from the poweroff command
>>
>> This board requires dc1sw to be enabled in order to provide a power
Currently, the sunxi clock driver gets the name for the base factor clock
of divs clocks from the name field in factors_data. This prevents reusing
of the factor clock for clocks with same properties, but different name.
This commit makes the divs setup function try to get a name from
clock-output
Hi everyone,
This is v3 of my patch series introducing basic kernel support for Allwinner's
H3 SoC. It mainly adds basic clocks and pinctrl. It also adds interrupts,
timers, watchdog, RTC, dmaengine, MMC and UARTs, which are mostly compatible
to those in earlier SoCs like A23 and A31, and can simp
The H3 clock control unit is similar to the those of other sun8i family
members like the A23.
It adds a new bus gates clock similar to the simple gates, but with a
different parent clock for each single gate.
Some of the gates use the new AHB2 clock as parent, whose clock source
is muxable between
Quoting Maxime Ripard (2015-10-21 07:53:35)
> On Tue, Oct 20, 2015 at 09:29:39AM -0700, Michael Turquette wrote:
> > Quoting Maxime Ripard (2015-10-20 07:40:47)
> > > Hi Mike,
> > >
> > > On Tue, Oct 20, 2015 at 06:43:43AM -0700, Michael Turquette wrote:
> > > > Hi Maxime,
> > > >
> > > > Quoting
On Tue, Oct 20, 2015 at 09:29:39AM -0700, Michael Turquette wrote:
> Quoting Maxime Ripard (2015-10-20 07:40:47)
> > Hi Mike,
> >
> > On Tue, Oct 20, 2015 at 06:43:43AM -0700, Michael Turquette wrote:
> > > Hi Maxime,
> > >
> > > Quoting Maxime Ripard (2015-10-20 00:36:45)
> > > > +struct clk *cl
Hi Chen-Yu,
On Mon, Oct 19, 2015 at 05:59:20PM +0800, Chen-Yu Tsai wrote:
> > +/* Voltage source for I2C pullup resistors for I2C Bus 0 */
> > +®_dldo3 {
> > + regulator-always-on;
> > + regulator-min-microvolt = <280>;
> > + regulator-max-microvolt = <280>;
> > + r
On Tuesday, October 20, 2015 at 10:59:37 AM UTC+2, Petar Dimitrijevic wrote:
>
> Hi all,
>
> I'm in need of help and advice.
>
> I'm working on a project for reading MBus data (hardware attached on
> /dev/ttyS7) and sending it over modem attached to /dev/ttyS1.
> Data is read from python script
Allwinner Reduced Serial Bus support is only needed for sun[89]i
platforms. Having it built-in for multi-platform kernels leads to
a bigger kernel image, without any benefit for non sun[89]i systems.
The driver already exports the needed symbols and supports module
loading/unloading. Change the Kc
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