[linux-sunxi] Re: [PATCH 02/11] crypto: sunxi-ss: prevent compilation on 64-bit

On Mon, Feb 01, 2016 at 05:39:21PM +, Andre Przywara wrote: > The driver for the sunxi-ss crypto engine is not entirely 64-bit safe, > compilation on arm64 spits some warnings. > The proper fix was deemed to involved [1], so since 64-bit SoCs won't > have this IP block we just disable this

[linux-sunxi] Re: [PATCH 10/11] arm64: dts: add Allwinner A64 SoC .dtsi

Hi Andre, On Mon, Feb 01, 2016 at 05:39:29PM +, Andre Przywara wrote: > The Allwinner A64 SoC is low-cost SoC with 4 ARM Cortex-A53 cores > and the typical tablet / TV box peripherals. > The Soc is based on the (32-bit) Allwinner H3 chip, sharing most of > the peripherals and the memory map.

[linux-sunxi] Re: [PATCH v2 07/51] mtd: nand: core: use mtd_ooblayout_xxx() helpers where appropriate

On Thu, 4 Feb 2016 11:06:30 +0100 Boris Brezillon wrote: > The mtd_ooblayout_xxx() helper functions have been added to avoid direct > accesses to the ecclayout field, and thus ease for future reworks. > Use these helpers in all places where the oobfree[] and

[linux-sunxi] Re: [PATCH v4 2/2] ASoC: sunxi: Add support for the SPDIF block

On 5 February 2016 at 10:27, Maxime Ripard wrote: > Hi, > > On Thu, Feb 04, 2016 at 12:09:22PM +0100, codekip...@gmail.com wrote: >> From: Marcus Cooper >> >> The sun4i, sun5i and sun7i SoC families have an SPDIF >> block which is capable

[linux-sunxi] Re: [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set

On Thu, Feb 4, 2016 at 7:33 AM, Krzysztof Adamski wrote: > sunxi_pmx_set accepts pin number and then calculates offset by > subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand, > gets offset so we have to convert it to pin number so we won't get > negative value

[linux-sunxi] Re: [PATCH v2 10/26] ARM: sun5i: a13: Add display and TCON clocks

On Thu, Feb 4, 2016 at 4:31 AM, Maxime Ripard wrote: > Hi, > > On Sun, Jan 17, 2016 at 01:06:07AM +0800, Chen-Yu Tsai wrote: >> > + compatible = "allwinner,sun4i-a10-tcon-ch0-clk"; >> > + reg = <0x01c20118 0x4>; >> > +

[linux-sunxi] Re: [PATCH v3 1/5] clk: sunxi: Add apb0 gates for H3

Hi, On Thu, Feb 04, 2016 at 03:47:52PM +0100, Jean-Francois Moine wrote: > On Thu, 4 Feb 2016 00:33:46 +0100 > Krzysztof Adamski wrote: > > > This patch adds support for APB0 in H3. It seems to be compatible with > > earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO,

[linux-sunxi] Re: [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set

On Thu, Feb 04, 2016 at 12:33:50AM +0100, Krzysztof Adamski wrote: > sunxi_pmx_set accepts pin number and then calculates offset by > subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand, > gets offset so we have to convert it to pin number so we won't get > negative value in

[linux-sunxi] Re: [PATCH v3 1/5] clk: sunxi: Add apb0 gates for H3

Hi, On Thu, Feb 04, 2016 at 09:56:02PM +0100, Krzysztof Adamski wrote: > On Thu, Feb 04, 2016 at 03:47:52PM +0100, Jean-Francois Moine wrote: > >On Thu, 4 Feb 2016 00:33:46 +0100 > >Krzysztof Adamski wrote: > > > >>This patch adds support for APB0 in H3. It seems to be compatible

[linux-sunxi] Re: [PATCH v3 1/5] clk: sunxi: Add apb0 gates for H3

On Fri, Feb 05, 2016 at 12:11:52PM +0100, Maxime Ripard wrote: Hi, On Thu, Feb 04, 2016 at 03:47:52PM +0100, Jean-Francois Moine wrote: On Thu, 4 Feb 2016 00:33:46 +0100 Krzysztof Adamski wrote: > This patch adds support for APB0 in H3. It seems to be compatible with >

[linux-sunxi] Re: [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux

On Wed, Feb 3, 2016 at 8:57 AM, Krzysztof Adamski wrote: > It seems that on H3, just like on A10, when GPIOs are configured as > external interrupt data registers does not contain their value. When > value is read, GPIO function must be temporary switched to input for > reads. >

[linux-sunxi] Re: [PATCH RFC 10/11] clk: sunxi: rewrite sun6i-ar100 using factors clk

On Mon, Feb 1, 2016 at 12:59 AM, Paul Gortmaker wrote: > On Mon, Jan 25, 2016 at 8:15 AM, Chen-Yu Tsai wrote: >> sun6i's AR100 clock is a classic factors clk case: >> >> AR100 = ((parent mux) >> p) / (m + 1) >> >> Signed-off-by: Chen-Yu Tsai

[linux-sunxi] Re: [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux

On Fri, Feb 05, 2016 at 02:39:23PM +0100, Linus Walleij wrote: On Wed, Feb 3, 2016 at 8:57 AM, Krzysztof Adamski wrote: It seems that on H3, just like on A10, when GPIOs are configured as external interrupt data registers does not contain their value. When value is read, GPIO

[linux-sunxi] Re: [PATCH v4 2/2] ASoC: sunxi: Add support for the SPDIF block

Hi, On Thu, Feb 04, 2016 at 12:09:22PM +0100, codekip...@gmail.com wrote: > From: Marcus Cooper > > The sun4i, sun5i and sun7i SoC families have an SPDIF > block which is capable of playback and capture. > > This patch enables the playback of this block for > the sun4i

[linux-sunxi] Re: [PATCH v2 05/51] mtd: add mtd_ooblayout_xxx() helper functions

On Thu, 4 Feb 2016 11:06:28 +0100 Boris Brezillon wrote: > In order to make the ecclayout definition completely dynamic we need to > rework the way the OOB layout are defined and iterated. > > Create a few mtd_ooblayout_xxx() helpers to ease OOB bytes

[linux-sunxi] Re: [PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi

On Thu, Feb 4, 2016 at 7:33 AM, Krzysztof Adamski wrote: > Add the corresponding device node for R_PIO on H3 to the dtsi. Support > for the controller was added in earlier commit. > > Signed-off-by: Krzysztof Adamski > --- > arch/arm/boot/dts/sun8i-h3.dtsi | 12

[linux-sunxi] Re: [PATCH v3 3/5] pinctrl: sunxi: Add H3 R_PIO controller support

On Thu, Feb 04, 2016 at 12:33:48AM +0100, Krzysztof Adamski wrote: > H3 has additional PIO controller similar to what we can find on A23. > It's a 12 pin port, described in H3 Datasheet rev 1.1, pages 345-350. > > Signed-off-by: Krzysztof Adamski Acked-by: Maxime Ripard

[linux-sunxi] Re: [PATCH 11/11] arm64: dts: add Pine64 support

Hi, On 05/02/16 09:03, Maxime Ripard wrote: > Hi, > > On Mon, Feb 01, 2016 at 05:39:30PM +, Andre Przywara wrote: >> The Pine64 is a cost-efficient development board based on the >> Allwinner A64 SoC. >> There are three models: the basic version with Fast Ethernet and >> 512 MB of DRAM

[linux-sunxi] Re: [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux

On Fri, Feb 5, 2016 at 9:39 PM, Linus Walleij wrote: > On Wed, Feb 3, 2016 at 8:57 AM, Krzysztof Adamski wrote: > >> It seems that on H3, just like on A10, when GPIOs are configured as >> external interrupt data registers does not contain their value.