Hi,
On 21-03-16 08:59, Maxime Ripard wrote:
Hi,
On Sun, Mar 20, 2016 at 07:55:02PM +0100, Hans de Goede wrote:
From: Krzysztof Adamski
OrangePi Plus board has two leds - green ("pwr") and red ("status")
and two switches ("sw4" and "sw2"). This patch describes them in
Add a missing MODULE_DEVICE_TABLE() line which was causing the
sunxi-musb glue to not auto-load when build as a module.
Signed-off-by: Hans de Goede
---
drivers/usb/musb/sunxi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/musb/sunxi.c
Changes in v2:
- Rebased to current master
- Added some formatting adjustments
- Added a second patch that simplifies hexdump()
Bernhard Nortmann (2):
fel: Minor fixes
fel: Simplify hexdump() single character output, using putchar()
fel.c | 43 ---
1
Signed-off-by: Bernhard Nortmann
---
fel.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/fel.c b/fel.c
index 616cd05..da006ac 100644
--- a/fel.c
+++ b/fel.c
@@ -322,16 +322,14 @@ void hexdump(void *data, uint32_t offset, size_t size)
- Do a clean shutdown / exit(0) after printing usage help,
instead of continuing execution. This avoids the "ERROR:
Allwinner USB FEL device not found!" when doing a plain
./sunxi-fel without any arguments.
- Convert C++ style comments for a uniform coding style.
- Some small formatting
From: Marcus Cooper
Add the SPDIF transceiver controller block to the A10 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun4i-a10.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi
From: Marcus Cooper
Enable the S/PDIF transmitter that is present on the Itead Ibox.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 24
1 file changed, 24 insertions(+)
diff --git
From: Marcus Cooper
Add the SPDIF TX pin to the A10 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun4i-a10.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi
From: Marcus Cooper
Add the SPDIF clock to the A10 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi
From: Marcus Cooper
Add the SPDIF TX pin to the A20 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun7i-a20.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi
From: Marcus Cooper
Add the SPDIF transceiver controller block to the A20 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun7i-a20.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi
From: Marcus Cooper
Hi All,
now that the sun4i-spdif driver has made it into linux-next then this patch
series completes what is needed to have SPDIF working on both A10 and A20
devices.
Enjoy,
CK
---
Changes since v2:
- Split the patches up, added and removed some
On 21/03/16 19:22, Siarhei Siamashka wrote:
> On Mon, 21 Mar 2016 14:24:14 +0100
> Jens Kuske wrote:
>
>> This workaround is necessary for A80, which sometimes
>> fails at reading DACR.
>>
>> Signed-off-by: Jens Kuske
>> ---
>> fel.c | 9 +
>>
On Mon, 21 Mar 2016 14:24:15 +0100
Jens Kuske wrote:
> The A80 has the V bit in SCTLR set to 0 because of the BROM
> being at 0x now, so the SCTLR check has to be relaxed.
>
> Signed-off-by: Jens Kuske
Thanks!
> ---
> fel.c | 21
On Mon, Mar 21, 2016 at 05:10:38PM +0100, codekip...@gmail.com wrote:
> From: Andrea Venturi
>
> add CLK_SET_RATE_PARENT to modify the rate on clk upstream
>
> Signed-off-by: Marcus Cooper
Applied, thanks
Maxime
--
Maxime Ripard, Free
On Mon, 21 Mar 2016 14:24:14 +0100
Jens Kuske wrote:
> This workaround is necessary for A80, which sometimes
> fails at reading DACR.
>
> Signed-off-by: Jens Kuske
> ---
> fel.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
>
On Mon, Mar 21, 2016 at 05:10:41PM +0100, codekip...@gmail.com wrote:
> From: Marcus Cooper
>
> Enable the S/PDIF transmitter that is present on the A1000.
>
> Signed-off-by: Marcus Cooper
> ---
> arch/arm/boot/dts/sun4i-a10-a1000.dts | 23
On Mon, Mar 21, 2016 at 05:10:39PM +0100, codekip...@gmail.com wrote:
> From: Marcus Cooper
>
> Add the SPDIF pins to the A10 and A20 dtsi.
>
> Signed-off-by: Marcus Cooper
> ---
> arch/arm/boot/dts/sun4i-a10.dtsi | 21 +
>
On Mon, Mar 21, 2016 at 05:10:40PM +0100, codekip...@gmail.com wrote:
> From: Marcus Cooper
>
> Add the SPDIF transceiver controller and clock to the A10 and
> A20 dtsi.
>
> Signed-off-by: Marcus Cooper
>
> ---
> arch/arm/boot/dts/sun4i-a10.dtsi |
On Mon, Mar 21, 2016 at 07:06:05PM +0100, Maxime Ripard wrote:
> I don't think you should focus too much on alsamixer, there's other
> tools to modify the configuration.
The expectation is that most users will use something like UCM and only
system integrators will see the full control set in
On Sat, Mar 19, 2016 at 05:51:24PM +0100, Danny Milosavljevic wrote:
> Hi Maxime,
>
> > IIRC, in order to have shared controls, you just needed to share the
> > controls structure.
>
> Yeah. I did this and it actually works in a way, but in doesn't do all that I
> want.
>
> There are two
On Sat, Mar 19, 2016 at 05:13:36PM +0100, Danny Milosavljevic wrote:
> Hi Mark,
>
> my question is whether it's possible to group together the left and
> right channel into one selem, and also if it's possible to reuse
> volumes then. For example:
>
> For sun4i-codec Mic there's right now:
> -
From: Marcus Cooper
Enable the S/PDIF transmitter that is present on the Itead Ibox.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 24
1 file changed, 24 insertions(+)
diff --git
From: Marcus Cooper
Enable the S/PDIF transmitter that is present on the A1000.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun4i-a10-a1000.dts | 23 +++
1 file changed, 23 insertions(+)
diff --git
From: Andrea Venturi
add CLK_SET_RATE_PARENT to modify the rate on clk upstream
Signed-off-by: Marcus Cooper
---
drivers/clk/sunxi/clk-a10-mod1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Marcus Cooper
Add the SPDIF transceiver controller and clock to the A10 and
A20 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun4i-a10.dtsi | 24
arch/arm/boot/dts/sun7i-a20.dtsi | 24
From: Marcus Cooper
Add the SPDIF pins to the A10 and A20 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun4i-a10.dtsi | 21 +
arch/arm/boot/dts/sun7i-a20.dtsi | 21 +
2 files changed, 42
From: Marcus Cooper
Hi All,
now that the sun4i-spdif driver has made it into linux-next then this patch
series completes what is needed to have SPDIF working on both A10 and A20
devices.
Enjoy,
CK
---
Changes since v1:
- Added defines to the dma properties and changed
On Sat, Mar 19, 2016 at 05:13:36PM +0100, Danny Milosavljevic wrote:
> Hi Mark,
> my question is whether it's possible to group together the left and right
> channel into one selem, and also if it's possible to reuse volumes then. For
> example:
Please fix your mail client to word wrap within
This workaround is necessary for A80, which sometimes
fails at reading DACR.
Signed-off-by: Jens Kuske
---
fel.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/fel.c b/fel.c
index a905ad5..ba58105 100644
--- a/fel.c
+++ b/fel.c
@@ -767,10
The A80 has the V bit in SCTLR set to 0 because of the BROM
being at 0x now, so the SCTLR check has to be relaxed.
Signed-off-by: Jens Kuske
---
fel.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/fel.c b/fel.c
index
Hi,
On 21-03-16 12:49, Chen-Yu Tsai wrote:
Hi,
I've been looking at the new EMAC driver and help cleaning
up the platform related (probe/remove/DT) bits.
The new hardware has the same glue layer like we had with
earlier SoCs with the GMAC. So for the A83T we could just
re-use the clock driver
On Wed, 09 Mar 2016, Maxime Ripard wrote:
> Now that we have a GPIO driver for the AXP209, we can add it to our MFD.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/mfd/axp20x.c | 3 +++
> 1 file changed, 3 insertions(+)
Applied, thanks.
> diff --git
On Sun, 20 Mar 2016 16:09:40 +0100
Bernhard Nortmann wrote:
> Hi Siarhei!
>
> Am 20.03.2016 um 15:49 schrieb Siarhei Siamashka:
> > This patch is just unsafe if pushed alone, that's why it implicitly
> > depends on the other "fel: Move the temporary scratch buffer
Hi,
On Mon, Mar 21, 2016 at 6:18 PM, Hans de Goede wrote:
> Hi,
>
>
> On 21-03-16 11:06, Chen-Yu Tsai wrote:
>>
>> Hi,
>>
>> On Mon, Mar 21, 2016 at 5:57 PM, Hans de Goede
>> wrote:
>>>
>>> HI,
>>>
>>>
>>> On 21-03-16 10:49, wens Tsai wrote:
Hi,
On 21-03-16 11:06, Chen-Yu Tsai wrote:
Hi,
On Mon, Mar 21, 2016 at 5:57 PM, Hans de Goede wrote:
HI,
On 21-03-16 10:49, wens Tsai wrote:
Hi Hans,
I updated U-boot on my boards to your latest sunxi-wip branch:
f965340 ("sunxi: Enable support for the eMMC
Hi,
On Mon, Mar 21, 2016 at 5:57 PM, Hans de Goede wrote:
> HI,
>
>
> On 21-03-16 10:49, wens Tsai wrote:
>>
>> Hi Hans,
>>
>> I updated U-boot on my boards to your latest sunxi-wip branch:
>>
>> f965340 ("sunxi: Enable support for the eMMC found on the orangepi
>>
HI,
On 21-03-16 10:49, wens Tsai wrote:
Hi Hans,
I updated U-boot on my boards to your latest sunxi-wip branch:
f965340 ("sunxi: Enable support for the eMMC found on the orangepi plus")
My Hummingbird A31 fails to boot after this. See log:
HELLO! BOOT0 is starting!
boot0 version :
Hi Hans,
I updated U-boot on my boards to your latest sunxi-wip branch:
f965340 ("sunxi: Enable support for the eMMC found on the orangepi plus")
My Hummingbird A31 fails to boot after this. See log:
HELLO! BOOT0 is starting!
boot0 version : 3.0.0
reg_addr 0x01f00100 =0x
reg_addr
Hi Yassin,
On Thu, Mar 17, 2016 at 07:43:42PM +1100, yassinjaf...@gmail.com wrote:
> From: Yassin Jaffer
>
> This patch adds a composite clock type consisting of
> a clock gate, mux, configurable dividers, and a reset control.
>
> Signed-off-by: Yassin Jaffer
On Thu, Mar 17, 2016 at 07:43:42PM +1100, yassinjaf...@gmail.com wrote:
> From: Yassin Jaffer
>
> This patch adds a composite clock type consisting of
> a clock gate, mux, configurable dividers, and a reset control.
>
> Signed-off-by: Yassin Jaffer
On Wednesday, December 18, 2013 at 2:46:27 PM UTC+5:30, Peter Chen wrote:
> hey, guys.
> I'v finished sunxi CAN drive in the socketcan mode.And I write a C program
> proved it works.I can send and receive packet correctlly.
> Since I'm not an android app developer, I wonder how can I write a demo
The Sinlinx A31s SDK is a A31s based module/baseboard development kit.
The core module has the SoC, PMIC, DRAM, eMMC and supporting components.
There are also pads for UART0, JTAG and I2S.
The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0
hub chip, MMC, HDMI, SPDIF, CIR,
On Sun, Mar 20, 2016 at 05:00:28PM +0100, Hans de Goede wrote:
> Hi Maxime and Chen-Yu,
>
> Here is a series with various improvements for the Orangepi Plus dts.
> Some (most) of these patches have been submitted before, esp. the USB
> ones have multiple revisions before. But I lost count of
Hi,
On Sun, Mar 20, 2016 at 07:55:02PM +0100, Hans de Goede wrote:
> From: Krzysztof Adamski
>
> OrangePi Plus board has two leds - green ("pwr") and red ("status")
> and two switches ("sw4" and "sw2"). This patch describes them in
> devicetree.
>
> Signed-off-by: Krzysztof
On Sat, Mar 19, 2016 at 11:18:59PM +0800, Chen-Yu Tsai wrote:
> On Sat, Mar 19, 2016 at 3:53 PM, Hans de Goede wrote:
> > The Dserve DSRV9703C is a 9.7" A10 tablet with a 1024x768 ips LCD,
> > 1G RAM, 4GB flash, a Focaltech FT5406EE8 touchscreen and rtl8188ctv wifi.
> >
> >
On Sat, Mar 19, 2016 at 10:13:47AM +0100, Hans de Goede wrote:
> Hi,
>
> On 18-03-16 18:48, Maxime Ripard wrote:
> >On Thu, Mar 17, 2016 at 02:28:03PM +0800, Chen-Yu Tsai wrote:
> >>On Wed, Mar 16, 2016 at 10:19 PM, Hans de Goede wrote:
> >>>u-boot uses the kernel as the
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