Thanks, it is /sys/devices/soc.0/usbc0.5 on this Allwinner 3.10 Android kernel.
I turned it on, but still no Android adb. Host machine is unable to
USB reset the Android device.
So more poking around to see what else I need to turn on.
On Mon, Jul 25, 2016 at 3:38 PM, Thomas Kaiser
On Wed, Jul 20, 2016 at 10:03:16AM +0200, LABBE Corentin wrote:
> This patch add support for sun8i-emac ethernet MAC hardware.
> It could be found in Allwinner H3/A83T/A64 SoCs.
>
> It supports 10/100/1000 Mbit/s speed with half/full duplex.
> It can use an internal PHY (MII 10/100) or an
Jon Smirl wrote:
>
> Is there some way to manually poke the kernel and force the port to
> switch modes?
>
In case /sys/bus/platform/devices/sunxi_usb_udc/otg_role exists, setting it
to 2 should switch to OTG role (assumption based on similarities in
Allwinner's BSP legacy kernel for H3, A83T
The Pine64 has the OTG controller attached to the top normal USB jack.
So there is no OTG detection pin to tell the OTG controller when to
switch between host and device mode.
Is there some way to manually poke the kernel and force the port to
switch modes?
--
Jon Smirl
jonsm...@gmail.com
--
On Wednesday, July 20, 2016 at 5:03:41 AM UTC-3, clabbe.montjoie wrote:
> Hello
>
> This patch series add the driver for sun8i-emac which handle the Ethernet MAC
> present on Allwinner H3/A83T/A64 SoCs.
>
> It supports 10/100/1000 Mbit/s speed with half/full duplex.
> It can use an internal PHY
A33-OLinuXino is A33 development board designed by Olimex LTD.
It has AXP233 PMU, 1GB DRAM, a micro SD card, one USB-OTG connector,
headphone and mic jacks, connector for LiPo battery and optional
4GB NAND Flash.
It has two 40-pin headers. One for LCD panel, and one for
additional modules. Also
On Sun, 24 Jul 2016 20:41:30 -0500
Scott Wood wrote:
> On Wed, Jun 15, 2016 at 10:42:18AM +0200, Boris Brezillon wrote:
> > diff --git a/cmd/nand.c b/cmd/nand.c
> > index 583a18f..3a5e3a0 100644
> > --- a/cmd/nand.c
> > +++ b/cmd/nand.c
> > @@ -306,7 +306,7 @@ static void
On Tue, Jul 19, 2016 at 07:10:54AM -0700, Thomas Kaiser wrote:
> Hi,
>
> Ondřej Jirman wrote:
> >
> > We have boards that have 1.1/1.3V switching, only 1.3V, fine tuned
> > voltage regulation and every such board will need it's own set of
> > operating points.
> >
>
> Yes, and Allwinner's
On Sun, Jul 17, 2016 at 04:39:27PM +0200, Ondřej Jirman wrote:
>
>
> On 25.6.2016 09:02, Maxime Ripard wrote:
> > On Sat, Jun 25, 2016 at 09:02:48AM +0800, Chen-Yu Tsai wrote:
> >> On Sat, Jun 25, 2016 at 6:51 AM, Ondřej Jirman wrote:
> >>> Hello,
> >>>
> >>> comments below.
Hello,
On 25 July 2016 at 09:32, Maxime Ripard
wrote:
> On Fri, Jun 17, 2016 at 12:34:44PM +0200, Michal Suchanek wrote:
>> Hello,
>>
>> On 13 June 2016 at 21:57, Maxime Ripard
>> wrote:
>> > On Mon, Jun 13, 2016 at 05:46:48PM
On Fri, Jun 17, 2016 at 12:34:44PM +0200, Michal Suchanek wrote:
> Hello,
>
> On 13 June 2016 at 21:57, Maxime Ripard
> wrote:
> > On Mon, Jun 13, 2016 at 05:46:48PM -, Michal Suchanek wrote:
> >> Hello,
> >>
> >> This is update of the sunxi spi patches that
Hi Hans,
On Fri, Jul 15, 2016 at 09:08:39AM +0200, Hans de Goede wrote:
> Attached, I believe this is the relevant line:
>
> [ 72.562876] [drm:drm_mode_prune_invalid] Not using 800x480 mode: CLOCK_LOW
>
> Although I'm not sure if these are normal either:
Indeed, the mode pixel clock is not
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