[linux-sunxi] [PATCH 3/3] arm64: dts: add BananaPi-M64 support

The Banana Pi M64 board is a typical single board computer based on the Allwinner A64 SoC. Aside from the usual peripherals it features eMMC storage, which is connected to the 8-bit capable SDHC2 controller. Also it has a soldered WiFi/Bluetooth chip, so we enable UART1 and SDHC1 as those two

[linux-sunxi] [PATCH 2/3] arm64: dts: sun50i: add UART1 pin nodes

On many boards UART1 connects to a Bluetooth chip, so add the pinctrl nodes for the only pins providing access to that UART. That includes those pins for hardware flow control (RTS/CTS). Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10

[linux-sunxi] [PATCH 1/3] arm64: dts: Pine64: add MMC support

All Pine64 boards connect an micro-SD card slot to the first MMC controller. Enable the respective DT node and specify the (always-on) regulator and card-detect pin. As a micro-SD slot does not feature a write-protect switch, we disable this feature. Signed-off-by: Andre Przywara

[linux-sunxi] [PATCH 0/3] arm64: dts: A64 board MMC support

These patches here go on top of Maxime's latest A64 MMC series and enable the MMC controllers on the boards using the A64 SoC. As the BananaPi-M64 DT now looks different, lets adds support for that board as well, with one major difference to the Pine64 being the eMMC chip. I could't find commit

Re: [linux-sunxi] Re: PoC tvin2jpeg_h264 with veisp scaling

Hi. On Mon, 9 Jan 2017 01:50:40 -0800 (PST) Milos Ladni wrote: > Hello Manuel, > I just added hw JPEG decoder in my apps. > Now i can do simultaneous h264 encoding, jpeg encoding and jpeg > decoding with just ~20% CPU and 25 fps. Great. > How app works: > Take

[linux-sunxi] [PATCH] sunxi-cedrus: Fix compilation errors from bad types under GCC 6.2

Compiling with armhf GCC 6.2 from Debian testing reports type mismatch errors stemming from a function call where pointers to members of struct sunxi_cedrus_dev, are provided as parameters to dma_alloc_coherent(). An example error report is given below. To fix this, we modify the types of the

[linux-sunxi] Applied "ASoC: sun4i-codec: Add "Right Mixer" to "Line Out Mono Diff." route" to the asoc tree

The patch ASoC: sun4i-codec: Add "Right Mixer" to "Line Out Mono Diff." route has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next

[linux-sunxi] Re: [PATCH 1/6] drivers: pinctrl: add driver for Allwinner H5 SoC

On Thu, Jan 5, 2017 at 11:08 PM, Maxime Ripard wrote: > On Tue, Dec 27, 2016 at 12:25:13AM +0800, Icenowy Zheng wrote: >> +builtin_platform_driver(sun50i_h5_pinctrl_driver); > > This also looks very much like the H3. I'll post a patchset during the > weekend to

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: fix PLL_CPUX adjusting on H3

Dne 9.1.2017 v 10:59 Maxime Ripard napsal(a): > On Sat, Jan 07, 2017 at 04:49:18PM +0100, Ondřej Jirman wrote: >> Maxime, >> >> Dne 25.11.2016 v 01:28 meg...@megous.com napsal(a): >>> From: Ondrej Jirman >>> >>> When adjusting PLL_CPUX on H3, the PLL is temporarily driven >>>

[linux-sunxi] Re: [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers

On Fri, Jan 06, 2017 at 07:13:17AM +0800, Icenowy Zheng wrote: > > > 06.01.2017, 06:16, "Maxime Ripard" : > > On Thu, Dec 29, 2016 at 02:50:48AM +0800, Icenowy Zheng wrote: > >>  Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like > >>  DesignWare

Re: [linux-sunxi] Re: [PATCH 3/6] clk: sunxi-ng: Add H5 clocks

On Fri, Jan 06, 2017 at 06:48:31AM +0800, Icenowy Zheng wrote: > > 2017年1月6日 06:04于 Maxime Ripard 写道： > > > > On Tue, Dec 27, 2016 at 12:25:15AM +0800, Icenowy Zheng wrote: > > > Add the H5 CCU clocks set based on the H3 one. > > > > > > Signed-off-by: Icenowy

Re: [linux-sunxi] Re: [RFC PATCH 1/4] sunxi: add DDR2 support to H3-like DRAM controller

Hi, On 05/01/17 22:55, Icenowy Zheng wrote: > > 2017年1月6日 06:37于 Maxime Ripard 写道： >> >> On Thu, Dec 29, 2016 at 03:00:58AM +0800, Icenowy Zheng wrote: >>> H3-like DRAM controller needs some special code to operate a DDR2 DRAM >>> chip. Add the logic to probe

Re: [linux-sunxi][PATCH 3/3] ARM: dts: sun6i: Add SPDIF to the Mele I7

On Sun, Jan 08, 2017 at 03:16:22AM +0800, Chen-Yu Tsai wrote: > On Tue, Dec 20, 2016 at 6:40 PM, wrote: > > From: Marcus Cooper > > > > Enable the S/PDIF transmitter that is present on the Mele I7. > > > > Signed-off-by: Marcus Cooper

Re: [linux-sunxi] Re: [RFC PATCH 1/4] sunxi: add DDR2 support to H3-like DRAM controller

On Fri, Jan 06, 2017 at 06:55:05AM +0800, Icenowy Zheng wrote: > > > +    MCTL_CR_32BIT /* fixme, thats wrong but what boot0 does */ | > > > > What's wrong about it? > > V3s DRAM seems to be 16-bit. > > However, boot0 has this bit set, and without this bit, it cannot work. > > According

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: fix PLL_CPUX adjusting on H3

On Sat, Jan 07, 2017 at 04:49:18PM +0100, Ondřej Jirman wrote: > Maxime, > > Dne 25.11.2016 v 01:28 meg...@megous.com napsal(a): > > From: Ondrej Jirman > > > > When adjusting PLL_CPUX on H3, the PLL is temporarily driven > > too high, and the system becomes unstable (oopses

[linux-sunxi] Re: PoC tvin2jpeg_h264 with veisp scaling

Hello Manuel, I just added hw JPEG decoder in my apps. Now i can do simultaneous h264 encoding, jpeg encoding and jpeg decoding with just ~20% CPU and 25 fps. How app works: Take frame from camera tv-in CVBS 720x576, show it on display by sunxi display engine in smaller resolution 542x359