2017年2月17日 04:58于 Florian Fainelli 写道:
>
> On 02/16/2017 04:48 AM, Corentin Labbe wrote:
> > This patch adds documentation for Device-Tree bindings for the
> > Allwinner dwmac-sun8i driver.
> >
> > Signed-off-by: Corentin Labbe
> > ---
> >
2017年2月17日 16:55于 Corentin Labbe 写道:
>
> On Thu, Feb 16, 2017 at 08:08:27PM +0100, Maxime Ripard wrote:
> > Hi,
> >
> > On Thu, Feb 16, 2017 at 01:48:58PM +0100, Corentin Labbe wrote:
> > > From: LABBE Corentin
> > >
> > > Enable the
On 17/02/17 17:37, Icenowy Zheng wrote:
> R40 is a new SoC by Allwinner, with peripherals as rich as A20, and quad
> core Cortex-A7.
>
> Add a DTSI file for it.
>
> Signed-off-by: Icenowy Zheng
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 404
>
Banana Pi M2 Ultra is a new board by Sinovoip (BPi), with R40 SoC,
AXP221 PMIC, 2GiB DRAM, 8GiB eMMC, a 40-pin RPi-like GPIO connector, a
HDMI connector, a SATA connector (native in SoC) as well as its power
supply, a Headphone jack, two USB ports, a 1000Mbps Ethernet port
(with RTL8211E PHY), a
R40 is a new SoC by Allwinner, with peripherals as rich as A20, and quad
core Cortex-A7.
Add a DTSI file for it.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-r40.dtsi | 404 +++
1 file changed, 404 insertions(+)
create mode
Banana Pi M2 Ultra board features two USB host ports, connected to the
two USB host ports on the SoC.
Add support for them.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 23 +++
1 file changed, 23 insertions(+)
diff
Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
Add support for the ports in the DTSI file.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-r40.dtsi | 89
1 file changed, 89 insertions(+)
diff --git
Allwinner R40 features a USB PHY like the one in A64, but with 3 ports.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt | 1 +
drivers/phy/phy-sun4i-usb.c | 17 +
2 files
Allwinner R40 have a pin controller similar to A20, only added 8-bit
eMMC function to mmc2 at PC bank.
Add support for it in the already renamed sunxi-a20-r40 driver via
variant framework.
Signed-off-by: Icenowy Zheng
---
drivers/pinctrl/sunxi/pinctrl-sunxi-a20-r40.c | 161
Allwinner R40 SoC have a clock controller module in the style of the
SoCs beyond sun6i, however, it's more rich and complex.
Add support for it.
As the user manual is still not available, this driver is made with
knowledge from clk-sun8iw11.c in the BSP kernel source.
---
The new R40 SoC come with a largely similar version of the pin
controller in A20.
Rename the driver, in order to extend it with R40 support.
Signed-off-by: Icenowy Zheng
---
drivers/pinctrl/sunxi/Kconfig | 2 +-
Allwinner R40 is a new SoC, with Quad Core Cortex-A7 and peripherals
like A20.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Documentation/arm/sunxi/README | 4
arch/arm/mach-sunxi/sunxi.c| 1 +
2 files changed, 5 insertions(+)
diff --git
This patchset is an experiment to add R40 support to mainline Linux.
As we have still no user manual for R40, the patchset is developed
by reading the BSP source code and device tree, educated guess and
try and error.
Note: the PATCH 1~3 and 7 is not RFC (I want them to be merged now),
but they
On Thu, Feb 16, 2017 at 08:05:24PM +0100, Maxime Ripard wrote:
> Hi,
>
[...]
> > +
> > +struct emac_variant {
> > + u32 default_syscon_value;
>
> Why do you need a default value? Can't you read it from the syscon
> directly?
>
Why not, but you can see the default value as "value for
On Thu, Feb 16, 2017 at 07:48:18PM +0100, Maxime Ripard wrote:
> Hi,
>
> On Thu, Feb 16, 2017 at 01:48:42PM +0100, Corentin Labbe wrote:
> > This patch adds documentation for Device-Tree bindings for the
> > Allwinner dwmac-sun8i driver.
> >
> > Signed-off-by: Corentin Labbe
On Thu, Feb 16, 2017 at 08:06:32PM +0100, Maxime Ripard wrote:
> On Thu, Feb 16, 2017 at 01:48:46PM +0100, Corentin Labbe wrote:
> > This patch add pinctrl node for dwmac-sun8i on H3.
> >
> > Signed-off-by: Corentin Labbe
> > ---
> > arch/arm/boot/dts/sun8i-h3.dtsi |
On Thu, Feb 16, 2017 at 08:08:27PM +0100, Maxime Ripard wrote:
> Hi,
>
> On Thu, Feb 16, 2017 at 01:48:58PM +0100, Corentin Labbe wrote:
> > From: LABBE Corentin
> >
> > Enable the dwmac-sun8i driver in the sunxi default configuration
> >
> > Signed-off-by: Corentin
On Thu, Feb 16, 2017 at 01:48:46PM +0100, Corentin Labbe wrote:
> This patch add pinctrl node for dwmac-sun8i on H3.
>
> Signed-off-by: Corentin Labbe
> ---
> arch/arm/boot/dts/sun8i-h3.dtsi | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git
On Wed, Feb 15, 2017 at 11:06:05PM +0300, lis8...@gmail.com wrote:
> From: Siarhei Volkau
>
> This patch not introduce new features, just prepare code for adding
> sun6i PWM driver in next commit.
>
> A31 SoC have a different set of prescalers than sun4i
> compatible ASoCs,
Hi,
On Wed, Feb 15, 2017 at 11:06:04PM +0300, lis8...@gmail.com wrote:
> From: Siarhei Volkau
>
> sun6i PWM has different register map in comparison to sun4i compatible
> SoCs. But bit map of the registers and behavior are very similar.
>
> This patch introduces a uniform
Hi,
On Thu, Feb 16, 2017 at 01:48:58PM +0100, Corentin Labbe wrote:
> From: LABBE Corentin
>
> Enable the dwmac-sun8i driver in the sunxi default configuration
>
> Signed-off-by: Corentin Labbe
> ---
> arch/arm/configs/sunxi_defconfig | 1
Hi,
On Thu, Feb 16, 2017 at 01:48:42PM +0100, Corentin Labbe wrote:
> This patch adds documentation for Device-Tree bindings for the
> Allwinner dwmac-sun8i driver.
>
> Signed-off-by: Corentin Labbe
> ---
> .../devicetree/bindings/net/dwmac-sun8i.txt| 86
>
Hi,
On Thu, Feb 16, 2017 at 01:48:43PM +0100, Corentin Labbe wrote:
> The dwmac-sun8i is a heavy hacked version of stmmac hardware by
> allwinner.
> In fact the only common part is the descriptor management and the first
> register function.
>
> Signed-off-by: Corentin Labbe
On Thu, Feb 16, 2017 at 09:38:33PM +0100, Peter Korsgaard wrote:
> > "Corentin" == Corentin Labbe writes:
>
> > Instead of ading more ifthen login for adding a new mac_device_info
>
> s/login/logic/
>
> --
> Bye, Peter Korsgaard
Thanks, will fix it.
Regards
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