Re: [linux-sunxi] [PATCH 0/5] AXP803 regulator support for Pine64 and SoPine

2017-07-19 Thread Chen-Yu Tsai
On Thu, Jul 20, 2017 at 12:10 AM, Icenowy Zheng wrote: > The Pine64 and SoPine w/ baseboard boards have an AXP803 PMIC, and the > regulators of the PMIC are used. > > This patchset adds the regulators to the device tree of these two boards. > > The first patch introduces proper

[linux-sunxi] [PATCH v2 09/10] ARM: dts: sun8i: a83t: cubietruck-plus: Enable micro-SD card and eMMC

2017-07-19 Thread Chen-Yu Tsai
Now that we support the MMC controllers on the A83T SoC, we can enable them on some boards. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 27 1 file changed, 27 insertions(+) diff --git

[linux-sunxi] [PATCH v2 02/10] clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching

2017-07-19 Thread Chen-Yu Tsai
All of our MMC clocks are of the MP clock type. A few MMC clocks on some SoCs, such as MMC2 on the A83T, support new/old timing mode switching. >From a clock rate point of view, when the new timing mode is active. the output clock rate is halved. This patch adds a special wrapper class of

[linux-sunxi] [PATCH v2 03/10] clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock

2017-07-19 Thread Chen-Yu Tsai
The MMC2 clock supports a new timing mode. When the new mode is active, the output clock rate is halved. This patch sets the feature flag for the new timing mode, and adds a pre-divider based on the mode bit. Signed-off-by: Chen-Yu Tsai --- drivers/clk/sunxi-ng/ccu-sun8i-a83t.c

[linux-sunxi] [PATCH v2 07/10] ARM: dts: sun8i: a83t: Add MMC controller device nodes

2017-07-19 Thread Chen-Yu Tsai
The A83T has 3 MMC controllers. The third one is a bit special, as it supports a wider 8-bit bus, and a "new timing mode". Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 59 +++ 1 file changed, 59 insertions(+) diff --git

[linux-sunxi] [PATCH v2 05/10] mmc: sunxi: Support MMC DDR52 transfer mode with new timing mode

2017-07-19 Thread Chen-Yu Tsai
The MMC controller can support DDR52 transfers under the new timing mode. According to the BSP kernel, the module clock has to be double the card clock, regardless of the bus width. The default timings in the hardware can be used. This also reworks the code setting the internal divider, getting

[linux-sunxi] [PATCH v2 10/10] ARM: dts: sun8i: a83t: h8homlet: Enable micro-SD card and onboard eMMC

2017-07-19 Thread Chen-Yu Tsai
The H8 homlet has a micro-SD card slot connected to mmc0, and onboard eMMC from FORESEE, connected to mmc2. Signed-off-by: Chen-Yu Tsai --- .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 21 + 1 file changed, 21 insertions(+) diff --git

[linux-sunxi] [PATCH v2 06/10] mmc: sunxi: Add support for A83T eMMC (MMC2)

2017-07-19 Thread Chen-Yu Tsai
The third MMC controller (MMC2) on the Allwinner A83T SoC is slightly different. It supports a wider 8-bit bus, has a dedicated controllable reset pin for eMMC, and a "new timing mode" which is supposed to deliver better signals and thus better performance. Add a compatible for this one to use

[linux-sunxi] [PATCH v2 04/10] mmc: sunxi: Support controllers that can use both old and new timings

2017-07-19 Thread Chen-Yu Tsai
On the SoCs that introduced the new timing mode for MMC controllers, both the old (where the clock delays are set in the CCU) and new (where the clock delays are set in the MMC controller) timing modes are available, and we have to support them both. However there are two bits that control which

[linux-sunxi] [PATCH v2 01/10] clk: sunxi-ng: Add interface to query or configure MMC timing modes.

2017-07-19 Thread Chen-Yu Tsai
Starting with the A83T SoC, Allwinner introduced a new timing mode for its MMC clocks. The new mode changes how the MMC controller sample and output clocks are delayed to match chip and board specifics. There are two controls for this, one on the CCU side controlling how the clocks behave, and one

[linux-sunxi] [PATCH v2 00/10] ARM: sun8i: a83t: Add support for MMC controllers

2017-07-19 Thread Chen-Yu Tsai
Hi everyone, This is v2 of my MMC controller support series. Changes since v1: - Fix patches already applied have been dropped - V2 now exports sunxi-ng mmc timing mode API functions (in case mmc driver is built as a module) - Added stub functions for the timing mode API functions,

[linux-sunxi] [PATCH v2 08/10] ARM: dts: sun8i: a83t: Add pingroup for 8-bit eMMC on mmc2

2017-07-19 Thread Chen-Yu Tsai
mmc2 can support 8-bit eMMC chips, with a dedicated reset line. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

2017-07-19 Thread icenowy
在 2017-07-20 10:03,icen...@aosc.io 写道: 在 2017-07-20 06:59,Ondřej Jirman 写道: Hi, Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800: From: Icenowy Zheng Now we have driver for the PRCM CCU, switch to use it instead of old-style clock nodes for apb0-related clocks in

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

2017-07-19 Thread icenowy
在 2017-07-20 06:59,Ondřej Jirman 写道: Hi, Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800: From: Icenowy Zheng Now we have driver for the PRCM CCU, switch to use it instead of old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi . The mux 3 of R_CCU is still

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

2017-07-19 Thread 'Ondřej Jirman' via linux-sunxi
Hi, Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800: > From: Icenowy Zheng > > Now we have driver for the PRCM CCU, switch to use it instead of > old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi . > > The mux 3 of R_CCU is still the internal oscillator,

[linux-sunxi] [PATCH 5/5] arm: allwinner: a64: drop vcc3v3 and vcc1v8 dummy regulators for SoPine

2017-07-19 Thread Icenowy Zheng
The device tree of SoPine SoM and its baseboard used to contain two dummy regulators: vcc3v3 and vcc1v8. As proper AXP803 regulator support is added, drop the dummy regulators, and use the correct ones. Signed-off-by: Icenowy Zheng ---

[linux-sunxi] [PATCH 2/5] arm: allwinner: a64: drop the dummy vcc3v3 regulator in Pine64 DT

2017-07-19 Thread Icenowy Zheng
The Pine64 DT used to contain a dummy vcc3v3 regulator, in order to satisfy some device nodes when proper AXP803 regulator support is available. It's in fact the DCDC1 regulator of AXP803. Drop the dummy regulator, and fix the reference of this regulator to DCDC1. Signed-off-by: Icenowy Zheng

[linux-sunxi] [PATCH 3/5] arm64: allwinner: a64: add AXP803 PMIC to SoPine DTSI

2017-07-19 Thread Icenowy Zheng
The SoPine SoM has an AXP803 PMIC connected to the RSB bus of the A64 SoC. Add its device tree node to the DTSI. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git

[linux-sunxi] [PATCH 4/5] arm64: allwinner: a64: add AXP803 regulators support for SoPine

2017-07-19 Thread Icenowy Zheng
The SoPine SoM has an AXP803 PMIC chip, and the regulators of this chip are used both on the SoM itself and the baseboard. Add regulators nodes to the SoPine DTSI and the SoPine baseboard DT. Regulators used by the SoM itself are added to the SoPine DTSI, and regulators left free for the

[linux-sunxi] [PATCH 0/5] AXP803 regulator support for Pine64 and SoPine

2017-07-19 Thread Icenowy Zheng
The Pine64 and SoPine w/ baseboard boards have an AXP803 PMIC, and the regulators of the PMIC are used. This patchset adds the regulators to the device tree of these two boards. The first patch introduces proper AXP803 regulators to Pine64 DT, and the second patch removed dummy regulators in the

[linux-sunxi] [PATCH 1/5] arm64: allwinner: a64: enable AXP803 regulators for Pine64

2017-07-19 Thread Icenowy Zheng
Add support of AXP803 regulators in the Pine64 device tree. The phy-supply regulator is also set in EMAC device node, in order to prevent Ethernet regression by regulator get disabled by regulator framework. Signed-off-by: Icenowy Zheng ---

[linux-sunxi] Re: A80 (CubieBoard4) u-boot - what to inject in boot0 area?

2017-07-19 Thread Chen-Yu Tsai
On Wed, Jul 19, 2017 at 11:03 PM, Konrad Rzeszutek Wilk wrote: > On Tue, Jul 18, 2017 at 11:22:00AM +0800, Chen-Yu Tsai wrote: >> "Hi, >> >> On Tue, Jul 18, 2017 at 10:40 AM, Konrad Rzeszutek Wilk >> wrote: >> > Hey, >> > >> > I am trying to install an

[linux-sunxi] Re: [PATCH v2 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

2017-07-19 Thread kbuild test robot
-of-A10-A20-pinctrl-driver/20170719-062420 base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel config: arm-sunxi_defconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705 reproduce: wget https://raw.githubusercontent.com

[linux-sunxi] Re: [PATCH 05/11] mmc: sunxi: Support controllers that can use both old and new timings

2017-07-19 Thread Maxime Ripard
On Wed, Jul 19, 2017 at 04:59:23PM +0800, Chen-Yu Tsai wrote: > On Mon, Jul 17, 2017 at 5:17 PM, Maxime Ripard > wrote: > > Hi, > > > > On Fri, Jul 14, 2017 at 02:42:56PM +0800, Chen-Yu Tsai wrote: > >> On the SoCs that introduced the new timing mode for MMC

[linux-sunxi] Re: [PATCH 05/11] mmc: sunxi: Support controllers that can use both old and new timings

2017-07-19 Thread Chen-Yu Tsai
On Mon, Jul 17, 2017 at 5:17 PM, Maxime Ripard wrote: > Hi, > > On Fri, Jul 14, 2017 at 02:42:56PM +0800, Chen-Yu Tsai wrote: >> On the SoCs that introduced the new timing mode for MMC controllers, >> both the old (where the clock delays are set in the CCU) and