Re: [linux-sunxi] Re: [PATCH 3/5] sunxi: add 3GiB DRAM detection support in main U-Boot

在 2018-02-08 08:37，André Przywara 写道： On 07/02/18 19:35, Icenowy Zheng wrote: Hi, Some Allwinner SoCs can use 3GiB DRAM (part of 4GiB or larger module). As the common get_ram_size function cannot detect non-pow-of-2 memory, add special detect code into the DRAM size code in main U-Boot.

[linux-sunxi] Re: [PATCH 4/5] sunxi: let sunxi_dram_init return unsigned long long

在 2018-02-08 08:37，André Przywara 写道： On 07/02/18 19:35, Icenowy Zheng wrote: Hi, As 4GiB capacity is above the range of 32-bit unsigned integer, raise the return type of sunxi_dram_init() to unsigned long long, thus it can hold 4GiB capacity (or maybe more on A80). Some controllers that

Re: [linux-sunxi] Re: [PATCH 2/5] sunxi: add Kconfig option for the maximum accessible DRAM

在 2018-02-08 10:14，Chen-Yu Tsai 写道： On Thu, Feb 8, 2018 at 8:35 AM, André Przywara wrote: On 07/02/18 19:35, Icenowy Zheng wrote: Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is

Re: [linux-sunxi] Re: [PATCH 2/5] sunxi: add Kconfig option for the maximum accessible DRAM

On Thu, Feb 8, 2018 at 8:35 AM, André Przywara wrote: > On 07/02/18 19:35, Icenowy Zheng wrote: >> Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map >> has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is >> accessible. >> >> Add a Kconfig

[linux-sunxi] Re: [PATCH 3/5] sunxi: add 3GiB DRAM detection support in main U-Boot

On 07/02/18 19:35, Icenowy Zheng wrote: Hi, > Some Allwinner SoCs can use 3GiB DRAM (part of 4GiB or larger module). > > As the common get_ram_size function cannot detect non-pow-of-2 memory, > add special detect code into the DRAM size code in main U-Boot. The original get_ram_size() function

[linux-sunxi] Re: [PATCH 4/5] sunxi: let sunxi_dram_init return unsigned long long

On 07/02/18 19:35, Icenowy Zheng wrote: Hi, > As 4GiB capacity is above the range of 32-bit unsigned integer, raise > the return type of sunxi_dram_init() to unsigned long long, thus it can > hold 4GiB capacity (or maybe more on A80). > Some controllers that are possible to use 4GiB+ memory

[linux-sunxi] Re: [PATCH 2/5] sunxi: add Kconfig option for the maximum accessible DRAM

On 07/02/18 19:35, Icenowy Zheng wrote: > Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map > has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is > accessible. > > Add a Kconfig option for the maximum accessible DRAM. That looks fine to me, but have you checked

[linux-sunxi] Re: [PATCH 1/5] sunxi: map DRAM part with 3G size

On 07/02/18 19:35, Icenowy Zheng wrote: Hi, > All Allwinner 64-bit SoCs now are known to be able to access 3GiB of > external DRAM, however the size of DRAM part in the MMU translation > table is still 2GiB. > > Change the size of DRAM part in MMU table to 3GiB. This is needed for the (new)

[linux-sunxi] [PATCH v4 07/12] drm/sun4i: Add has_channel_0 TCON quirk

Some TCONs on newer SoCs doesn't support channel 0, since they are meant to be used only with TV or HDMI encoder. Prepare support for them with adding has_channel_0 quirk. Acked-by: Maxime Ripard Signed-off-by: Jernej Skrabec ---

[linux-sunxi] [PATCH v4 12/12] ARM: dts: sun8i: a83t: Enable HDMI on BananaPi M3

BananaPi M3 includes HDMI connector, so add support for it. Signed-off-by: Jernej Skrabec --- arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 25 + 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts

[linux-sunxi] [PATCH v4 06/12] dt-bindings: display: sun4i-drm: Add A83T HDMI pipeline

This commit adds all necessary compatibles and descriptions needed to implement A83T HDMI pipeline. Mixer is already properly described, so only compatible is added. However, A83T TV TCON, which is connected to HDMI, doesn't have channel 0, contrary to all TCONs currently described. Because of

[linux-sunxi] [PATCH v4 11/12] ARM: dts: sun8i: a83t: Add HDMI display pipeline

This commit adds all bits necessary for HDMI on A83T - mixer1, tcon1, hdmi, hdmi phy and hdmi pinctrl entries. Signed-off-by: Jernej Skrabec --- arch/arm/boot/dts/sun8i-a83t.dtsi | 119 +- 1 file changed, 118 insertions(+), 1

[linux-sunxi] [PATCH v4 10/12] drm/sun4i: Implement A83T HDMI driver

A83T has DW HDMI IP block with a custom PHY similar to Synopsys gen2 HDMI PHY. Only video output was tested, while HW also supports audio and CEC. Support for them will be added later. Signed-off-by: Jernej Skrabec --- drivers/gpu/drm/sun4i/Kconfig | 9 ++

[linux-sunxi] [PATCH v4 09/12] drm/sun4i: Add support for A83T second DE2 mixer

It supports 1 VI and 1 UI plane and HW scaling on both planes. Acked-by: Maxime Ripard Signed-off-by: Jernej Skrabec --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 11 +++ 1 file changed, 11 insertions(+) diff --git

[linux-sunxi] [PATCH v4 01/12] clk: sunxi-ng: Mask nkmp factors when setting register

Currently, if one of the factors isn't present, bit 0 gets always set to 1. For example, A83T has NMP PLLs modelled as NKMP PLL without K. Since K is not specified, it's offset, width and shift is 0. Driver assumes that lowest value possible is 1, otherwise we would get division by 0. That

[linux-sunxi] [PATCH v4 08/12] drm/sun4i: Add support for A83T second TCON

This TCON is connected to HDMI encoder. Acked-by: Maxime Ripard Signed-off-by: Jernej Skrabec --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c

[linux-sunxi] [PATCH v4 05/12] drm/bridge/synopsys: dw-hdmi: don't clobber drvdata

dw_hdmi shouldn't set drvdata since some drivers might need to store it's own data there. Rework dw_hdmi in a way to return struct dw_hdmi instead to store it in drvdata. This way drivers are responsible to store and pass structure when needed. Idea was taken from the following commit:

[linux-sunxi] [PATCH v4 04/12] drm/bridge/synopsys: dw-hdmi: Export some PHY related functions

Parts of PHY code could be useful also for custom PHYs. For example, Allwinner A83T has custom PHY which is probably Synopsys gen2 PHY with few additional memory mapped registers, so most of the Synopsys PHY related code could be reused. Functions exported here are actually not specific to

[linux-sunxi] [PATCH v4 02/12] clk: sunxi-ng: Use u64 for calculation of nkmp rate

When parent rate is 24MHz and multiplier N >= 180, intermediate clock rate doesn't fit in 32 bit variable anymore. Because of that, introduce function for calculating clock rate which uses 64 bit variable for intermediate result. Signed-off-by: Jernej Skrabec ---

[linux-sunxi] [PATCH v4 03/12] drm/bridge/synopsys: dw-hdmi: Enable workaround for v1.32a

Allwinner SoCs have dw hdmi controller v1.32a which exhibits same magenta line issue as i.MX6Q and i.MX6DL. Enable workaround for it. Tests show that one iteration is enough. Acked-by: Laurent Pinchart Signed-off-by: Jernej Skrabec

[linux-sunxi] [PATCH v4 00/12] drm/sun4i: Add A83T HDMI support

This patch series implements support for A83T DW HDMI and PHY. Contrary to v1 series, this one is based on latest linux-next, since all needed patches were merged. While exactly this combination of HDMI controller and PHY is not common in Allwinner SoCs, this patch series nevertheless makes

[linux-sunxi] [PATCH v2 0/2] ARM: dts: sun8i: h3-h5: Move pinctrl of mmc0 and mmc1 to dtsi

Hi, This short patch series moves mmc0 and mmc1 pinctrl in H3 and H2+ boards' dts files to the dtsi file in order to make it easier to do changes in the future to pinctrl attributes if required. This sort of cleaning up of the dts files was discussed earlier in the email thread with the subject

[linux-sunxi] [PATCH v2 2/2] ARM: dts: sun8i: h3-h5: Move pinctrl of mmc1 from dts to dtsi

Most of the boards use the mmc1 pins and their attributes defined in mmc1_pins_a. Let's default to that by moving the pinctrl attributes to the dtsi file. This makes it easier to modify device trees in the future as there is only one place to change the pinctrl attributes. Signed-off-by: Joonas

[linux-sunxi] [PATCH v2 1/2] ARM: dts: sun8i: h3-h5: Move pinctrl of mmc0 from dts to dtsi

Most of the boards use the mmc0 pins and their attributes defined in mmc0_pins_a. Let's default to those by moving the pinctrl attributes to the dtsi file. This makes it easier to modify device trees in the future as there is only one place to change the pinctrl attributes. As a side effect this

[linux-sunxi] [PATCH 5/5] sunxi: restrict the ram_size to the accessible range in SPL

On newer Allwinner SoCs with the BROM start at 0x0 and the DRAM space at <0x4000 0xc000>, some parts of DRAM will be inaccessible when 4GiB module is used. Restrict the ram_size written to global_data in SPL. Signed-off-by: Icenowy Zheng --- board/sunxi/board.c | 13

[linux-sunxi] [PATCH 3/5] sunxi: add 3GiB DRAM detection support in main U-Boot

Some Allwinner SoCs can use 3GiB DRAM (part of 4GiB or larger module). As the common get_ram_size function cannot detect non-pow-of-2 memory, add special detect code into the DRAM size code in main U-Boot. Signed-off-by: Icenowy Zheng --- board/sunxi/board.c| 23

[linux-sunxi] [PATCH 4/5] sunxi: let sunxi_dram_init return unsigned long long

As 4GiB capacity is above the range of 32-bit unsigned integer, raise the return type of sunxi_dram_init() to unsigned long long, thus it can hold 4GiB capacity (or maybe more on A80). Some controllers that are possible to use 4GiB+ memory module are also changed to calculate its memory capacity

[linux-sunxi] [PATCH 2/5] sunxi: add Kconfig option for the maximum accessible DRAM

Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is accessible. Add a Kconfig option for the maximum accessible DRAM. For A80 it should be a much higher value (8GiB), but as I have no A80 device to test and

[linux-sunxi] [PATCH 1/5] sunxi: map DRAM part with 3G size

All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng --- arch/arm/mach-sunxi/board.c | 2 +-

[linux-sunxi] [PATCH 0/5] Add 3GiB DRAM support to 64-bit Allwinner SoCs

Allwinner 64-bit SoCs have allocated 3GiB space in the memory map for DRAM. If memory bigger than 3GiB is installed (as memory usually come as pow of 2 and they are not known to support 3GiB LPDDR3 modules, it means 4GiB memory is installed), the whole 3GiB space can be all used. However, in many

Re: [linux-sunxi] [RFC PATCH 8/8] sunxi: enable PSCI for A83T SoC

于 2018年2月8日 GMT+08:00 上午2:02:39, "Mr. Fülöp" 写到: >Hi Guys, > >I think I reached a dead end... >Can you please tell me why does it hang on "(XEN) Bringing up CPU1"? >I compiled many xen version, but my feeling is that in the u-boot is >sth. that makes Xen hang... >

Re: [linux-sunxi] [RFC PATCH 8/8] sunxi: enable PSCI for A83T SoC

Hi Guys, I think I reached a dead end... Can you please tell me why does it hang on "(XEN) Bringing up CPU1"? I compiled many xen version, but my feeling is that in the u-boot is sth. that makes Xen hang... Any suggestions? Thank you in advance! = Xen

[linux-sunxi] Re: [PATCH v2 4/6] clk: sunxi-ng: add support for the Allwinner H6 CCU

于 2018年2月7日 GMT+08:00 下午5:02:10, Maxime Ripard 写到: >Hi, > >On Sat, Feb 03, 2018 at 11:49:40PM +0800, Icenowy Zheng wrote: >> +/* Force the output divider of video PLLs to 0 */ >> +for (i = 0; i < ARRAY_SIZE(pll_video_regs); i++) { >> +val =

[linux-sunxi] A80 OpenCL Support

Hello, I am looking for the status of OpenCL for AllWInner A80 SoC. On its technical details confirm that it can be executed, I can not find specific information of the binaries or the code. Is there a library that has the compiled OpenCL functions / to be compiled for this architecture? Is