Hi,
On Wed, 28 Mar 2018 16:29:47 -0700
Martin Kelly wrote:
> On 03/05/2018 05:51 PM, Yong Deng wrote:
> > This patchset add initial support for Allwinner V3s CSI.
> >
> > Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
> > interface and CSI1 is used for
On 03/05/2018 05:51 PM, Yong Deng wrote:
This patchset add initial support for Allwinner V3s CSI.
Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
interface and CSI1 is used for parallel interface. This is not
documented in datasheet but by test and guess.
This patchset
Hi,
On 28/03/18 10:52, Jagan Teki wrote:
> On Wed, Mar 28, 2018 at 4:23 AM, André Przywara
> wrote:
>> On 27/03/18 18:58, Jagan Teki wrote:
>>> On Sat, Mar 24, 2018 at 6:37 AM, André Przywara
>>> wrote:
On 23/03/18 18:14, Jagan Teki wrote:
Hi,
On 28/03/18 10:08, cr33dc0...@gmail.com wrote:
> First of all thank you for your fast reply!
>
> Am Montag, 26. März 2018 01:24:44 UTC+2 schrieb André Przywara:
>
> On 25/03/18 18:41, cr33d...@gmail.com wrote:
> > Hi Everyone!,
> >
> > During my process of get Xen running
于 2018年3月28日 GMT+08:00 下午7:28:07, Maxime Ripard 写到:
>On Mon, Mar 26, 2018 at 03:11:04PM +0800, Icenowy Zheng wrote:
>>
>>
>> 于 2018年3月26日 GMT+08:00 下午3:06:33, Maxime Ripard
> 写到:
>> >On Fri, Mar 23, 2018 at 05:41:43PM +0800, Icenowy Zheng
On Wed, Mar 28, 2018 at 4:23 AM, André Przywara wrote:
> On 27/03/18 18:58, Jagan Teki wrote:
>> On Sat, Mar 24, 2018 at 6:37 AM, André Przywara
>> wrote:
>>> On 23/03/18 18:14, Jagan Teki wrote:
On Wed, Mar 14, 2018 at 7:27 AM, Andre
First of all thank you for your fast reply!
Am Montag, 26. März 2018 01:24:44 UTC+2 schrieb André Przywara:
>
> On 25/03/18 18:41, cr33d...@gmail.com wrote:
> > Hi Everyone!,
> >
> > During my process of get Xen running on the Orange Pi PC 2, i run into a
> > deadlock (in case of my