Am Freitag, 27. April 2018 11:16:00 UTC+2 schrieb Kai:
>
>
>
> On 4.16.4 .
> I'm not able to debug it myself for now, however, A20 was abandoned by
> everyone?
>
I don't think A20 was abandond - at least not when it comes to using the
devices. Development might be stalled since Linux support
Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
configs/orangepi_prime_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig
index df39caa903..6161863258 10064
orangepi-prime has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/dts/sun50i-h5-orangepi-prime.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts
b/arch
Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
configs/orangepi_pc2_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
index dd5f2c78ab..ca1e586e89 100644
---
Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
configs/Sinovoip_BPI_M2_Plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/Sinovoip_BPI_M2_Plus_defconfig
b/configs/Sinovoip_BPI_M2_Plus_defconfig
index da5620a77
Sync bananapi-m64 usb host nodes from Linux.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/dts/sun50i-a64-bananapi-m64.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts
b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
index
Bananapi-m2-plus has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
b/
orangepi-pc2 has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
b/arch/arm/d
Order sun50i-h5-orangepi-pc2.dts nodes in alphabetic
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 56 -
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
b/arch/ar
Allwinner USB PHY handling can be done through driver-model
generic-phy so add the generic-phy ops to relevant places
on host and musb sunxi driver and enable them in respective
SOC's.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/mach-sunxi/Kconfig | 9 +++
drivers/usb/ho
Sync bananapi-m64 usb_otg node from Linux.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/dts/sun50i-a64-bananapi-m64.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts
b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
index 02db1141
Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
configs/bananapi_m64_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig
index 47f31c6d9d..40c1c18aca 100644
---
Allwinner PHY USB code is now part of generic-phy framework,
so drop existing legacy handling like arch/arm/mach-sunxi.c
and related code areas.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/include/asm/arch-sunxi/usb_phy.h | 20 --
arch/arm/mach-sunxi/Makefile | 3 -
Allwinner PHY USB code is now part of generic-phy framework,
so use it in board_usb_cable_connected.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
board/sunxi/board.c | 33 -
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/board/sunxi/board.c b/bo
Sync sun8i-a83t usbphy node details from Linux.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/dts/sun8i-a83t.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi
index bab6c1812b..2953e0fdac 100644
The sunxi otg phy has a bug where it wrongly detects a high speed squelch
when reset on the root port gets de-asserted with a lo-speed device.
The workaround for this is to disable squelch detect before de-asserting
reset, and re-enabling it after the reset de-assert is done. Add a sunxi
specific
clock gating bits on a64 are different than H3_H5, so fixed
only required bits on clock_sun6i.h.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/ar
Allwinner A31 has 3 USB PHY's and rest similar to A10.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/phy/allwinner/phy-sun4i-usb.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-sun4i-usb.c
index abb3d
Filling musb_hdrc pdata using structure will unnecessary
add extra ifdefs, so fill them inside probe call for
better code understanding and get rid ifdefs using
devicetree compatible.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/usb/musb-new/sunxi.c | 23 ++-
1 fi
H3/H5 has 4 USB PHY, rest are similar to A64.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/phy/allwinner/phy-sun4i-usb.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-sun4i-usb.c
index 7f2970b96b..9
ID and VBUS detection code require when musb changing
between Host and/or Peripheral modes.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/phy/allwinner/phy-sun4i-usb.c | 39 +++
include/phy-sun4i-usb.h | 26 +++
2 files
Unlike, other Allwinner SUN4I Phy supporting SOC, A83T has
2 USB PHY's and second one is HSIC. So phy control need to
configure to handle these HSIC and SIDDQ requirement.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/phy/allwinner/phy-sun4i-usb.c | 85
Like other Allwinner SoC, the H3/H5/A64 is missing the config register
from the musb hardware block. Use a known working value for it
like other SoC.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/usb/musb-new/musb_regs.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --
Unlike other Allwinner SOC's H3/H5/V3s OTG support 4 endpoints
with relevant fifo configs, rest all have 5 endpoints.
So add the fifo configs and defer them based on driver_data.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/usb/musb-new/sunxi.c | 70 ++
USB PHY implementation for Allwinner SOC's can be handling
in to single driver with different phy configs.
This driver handle all Allwinner USB PHY's start from 4I to
50I(except 9I). Currently added A64 compatibility more will
add in next coming patches.
Current implementation is unable to get pi
Add PHY configs for Allwinner A10/A13/A20 which are SUN4I.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/phy/allwinner/phy-sun4i-usb.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-s
Use BIT is possible areas instead of numerical shift.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/usb/musb-new/sunxi.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index
- add proper macros for musb_config members
- use bool 'true' for multipoint and dyn_fifo instead of numerical 1
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/usb/musb-new/sunxi.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/musb-new/sun
Add OTG device clkgate and reset for H3/H5 through driver_data.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/usb/musb-new/sunxi.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 77ee619a95..b473e
From: Chen-Yu Tsai
Clock gating bits on H43/H5 were wrong, fix them.
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Jagan Teki
Acked-by: Jun Nie
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/ar
Move struct sunxi_ccm_reg pointer to private structure
so-that accessing ccm reg base become more proper way
and avoid local initialization in each function.
Signed-off-by: Jagan Teki
Acked-by: Jun Nie
---
drivers/usb/host/ehci-sunxi.c | 15 +--
drivers/usb/host/ohci-sunxi.c | 19 ++
This series rework of previous version where it removes legacy
usb phy handling and added phy driver on generic-phy framework.
Current implementation phy driver is unable to get pinctrl, clock
and reset details from DT since the dm code on these will add it future.
Changes for v8, v9, v10:
- reba
Amarula A64-Relic is A64 based IoT device, which support
- Allwinner A64 Cortex-A53
- Mali-400MP2 GPU
- AXP803 PMIC
- 1GB DDR3 RAM
- 8GB eMMC
- AP6330 Wifi/BLE
- MIPI-DSI
- CSI: OV5640 sensor
- USB OTG
- 12V DC power supply
Signed-off-by: Jagan Teki
---
Changes for v3:
- Use sun50i-a64-relic.dts
From: Michael Trimarchi
clk-gate core will take bit_idx through clk_register_gate
and then do clk_gate_ops by using BIT(bit_idx), but rtc-sun6i
is passing bit_idx as BIT(bit_idx) it becomes BIT(BIT(bit_idx)
which is wrong and eventually external gate clock is not enabling.
This patch fixed by pa
Hi Maxime
On Mon, May 14, 2018 at 1:17 PM, Maxime Ripard
wrote:
> On Mon, May 14, 2018 at 03:12:49PM +0530, Jagan Teki wrote:
>> On Mon, May 14, 2018 at 2:36 PM, Maxime Ripard
>> wrote:
>> > On Mon, May 14, 2018 at 02:34:22PM +0530, Jagan Teki wrote:
>> >> On Mon, May 14, 2018 at 1:57 PM, Maxime
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