Hi,
On Mon, 8 Apr 2019 at 18:41, Clément Péron wrote:
>
> Beelink GS1 is an Allwinner H6 based TV box,
> which support:
> - Allwinner H6 Quad-core 64-bit ARM Cortex-A53
> - GPU Mali-T720
> - 2GB LPDDR3 RAM
> - 16GB eMMC
> - AXP805 PMIC
> - 1Gbps GMAC via RTL8211E
> - USB 2.0 and 3.0 Host
> -
Allwinner A64 and H6 use the Sun4i SPDIF driver.
Enable this to allow a proper support for these SoCs.
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index
The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).
Add this node in the SoC device-tree and as they are only one pinmuxing
available set it as default.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 39
1 file changed, 39
Beelink GS1 board has a SPDIF out connector, so enable it in
the device-tree of the board.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
*H6 DMA support IS REQUIRED*
Allwinner H6 SoC has a SPDIF controller called One Wire Audio (OWA) which
is different from the previous H3 generation but still compatible.
Difference are an increase of fifo sizes and there is now the possibility
to output the master clock on a pin.
Also this
Allwinner H6 has a SPDIF controller with an increase of the fifo
size and the possibility to output the master clock.
However it's still compatible with the already existing driver for
Allwiner H3.
Add this compatible in the device-tree bindings documentation.
Signed-off-by: Clément Péron
---
On Thu, Apr 11, 2019 at 10:27 AM Maxime Ripard
wrote:
>
> On Thu, Apr 11, 2019 at 05:23:25PM +0200, Jernej Škrabec wrote:
> > Dne četrtek, 11. april 2019 ob 17:20:04 CEST je Clément Péron napisal(a):
> > > Hi,
> > >
> > > On Thu, 11 Apr 2019 at 17:05, Jernej Škrabec
> > wrote:
> > > > Dne
Hi,
On Fri, Apr 05, 2019 at 12:27:48PM -0400, Nicolas Dufresne wrote:
> Le vendredi 05 avril 2019 à 17:15 +0200, Maxime Ripard a écrit :
> > Hi Nicolas,
> >
> > On Thu, Apr 04, 2019 at 11:41:13AM -0400, Nicolas Dufresne wrote:
> > > > > > +* - __u16
> > > > > > + -
On Thu, Apr 11, 2019 at 05:42:56PM +0200, Jernej Škrabec wrote:
> Dne četrtek, 11. april 2019 ob 17:27:52 CEST je Maxime Ripard napisal(a):
> > On Thu, Apr 11, 2019 at 05:23:25PM +0200, Jernej Škrabec wrote:
> > > Dne četrtek, 11. april 2019 ob 17:20:04 CEST je Clément Péron napisal(a):
> > > >
Dne četrtek, 11. april 2019 ob 17:27:52 CEST je Maxime Ripard napisal(a):
> On Thu, Apr 11, 2019 at 05:23:25PM +0200, Jernej Škrabec wrote:
> > Dne četrtek, 11. april 2019 ob 17:20:04 CEST je Clément Péron napisal(a):
> > > Hi,
> > >
> > > On Thu, 11 Apr 2019 at 17:05, Jernej Škrabec
> >
> >
On Thu, 11 Apr 2019 at 17:34, Clément Péron wrote:
>
> Hi,
>
> Allwinner H6 SoC has two watchdogs. The documented watchdog is identicaly
> the same reading the user manual as the one used in the A64.
>
> After investigation it seems that on some SoC the first watchdog doesn't
> make the board
Allwinner H6 has a watchog identical to A64 one.
Declare it in the device tree but leave it disable
with a comment as it is broken on some H6 revisions.
Test has been performs on 3 boards.
Chen-Yu Tsai boards:
Pine H64 - H6 V200-AWIN H6448BA 7782 => OK
OrangePi Lite 2 - H6 V200-AWIN H8068BA
Hi,
Allwinner H6 SoC has two watchdogs. The documented watchdog is identicaly
the same reading the user manual as the one used in the A64.
After investigation it seems that on some SoC the first watchdog doesn't
make the board reboot.
Some tests has been performed and it seems that first H6
Allwinner H6 has a r_watchdog similar to A64.
Declare it in the device-tree.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
The SUNXI_WATCHDOG option is required to make the
watchdog available on Allwinner H6.
Enable this option as a module.
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
On Thu, Apr 11, 2019 at 05:23:25PM +0200, Jernej Škrabec wrote:
> Dne četrtek, 11. april 2019 ob 17:20:04 CEST je Clément Péron napisal(a):
> > Hi,
> >
> > On Thu, 11 Apr 2019 at 17:05, Jernej Škrabec
> wrote:
> > > Dne četrtek, 11. april 2019 ob 12:57:16 CEST je Clément Péron napisal(a):
> > > >
Dne četrtek, 11. april 2019 ob 17:20:04 CEST je Clément Péron napisal(a):
> Hi,
>
> On Thu, 11 Apr 2019 at 17:05, Jernej Škrabec
wrote:
> > Dne četrtek, 11. april 2019 ob 12:57:16 CEST je Clément Péron napisal(a):
> > > Add the mali gpu node to the H6 device-tree.
> > >
> > > Signed-off-by:
Hi,
On Thu, 11 Apr 2019 at 17:05, Jernej Škrabec wrote:
>
> Dne četrtek, 11. april 2019 ob 12:57:16 CEST je Clément Péron napisal(a):
> > Add the mali gpu node to the H6 device-tree.
> >
> > Signed-off-by: Clément Péron
> > ---
> > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 14
Hi,
On Thu, 11 Apr 2019 at 17:01, Jernej Škrabec wrote:
>
> Hi!
>
> Dne četrtek, 11. april 2019 ob 14:32:23 CEST je Maxime Ripard napisal(a):
> > On Thu, Apr 11, 2019 at 12:57:12PM +0200, Clément Péron wrote:
> > > Hi,
> > >
> > > The Allwinner H6 has a Mali-T720 MP2. The drivers are
> > >
Dne četrtek, 11. april 2019 ob 12:57:16 CEST je Clément Péron napisal(a):
> Add the mali gpu node to the H6 device-tree.
>
> Signed-off-by: Clément Péron
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git
Hi!
Dne četrtek, 11. april 2019 ob 14:32:23 CEST je Maxime Ripard napisal(a):
> On Thu, Apr 11, 2019 at 12:57:12PM +0200, Clément Péron wrote:
> > Hi,
> >
> > The Allwinner H6 has a Mali-T720 MP2. The drivers are
> > out-of-tree so this series only introduce the dt-bindings.
> >
> > The first
Hi,
On Thu, 11 Apr 2019 at 14:30, Maxime Ripard wrote:
>
> On Thu, Apr 11, 2019 at 12:57:14PM +0200, Clément Péron wrote:
> > Some SoCs adds a bus clock gate to the Mali Midgard GPU.
> >
> > Add the binding for the bus clock.
> >
> > Signed-off-by: Icenowy Zheng
> > Signed-off-by: Clément Péron
On Thu, Apr 11, 2019 at 12:57:12PM +0200, Clément Péron wrote:
> Hi,
>
> The Allwinner H6 has a Mali-T720 MP2. The drivers are
> out-of-tree so this series only introduce the dt-bindings.
>
> The first patch is from Neil Amstrong and has been already
> merged in linux-amlogic. It is required for
On Thu, Apr 11, 2019 at 12:57:14PM +0200, Clément Péron wrote:
> Some SoCs adds a bus clock gate to the Mali Midgard GPU.
>
> Add the binding for the bus clock.
>
> Signed-off-by: Icenowy Zheng
> Signed-off-by: Clément Péron
I'm not quite sure what you did there. If Icenowy is the author and
On Thu, Apr 11, 2019 at 08:54:48AM -0300, pgr...@centosproject.org wrote:
> From: Pablo Greco
>
> This is the equivalent of Commit 02b301f5d18c5015a33b25d0283306ebe96fa794
> ("ARM: dts: sun8i: r40: bananapi-m2-ultra: Sort device node dereferences")
Please describe what you are doing and why
Hi,
On Thu, Apr 11, 2019 at 08:54:49AM -0300, pgr...@centosproject.org wrote:
> From: Pablo Greco
>
> BPi M2 Berry is a trimmed down version of the BPi M2 Ultra, completely
> software compatible.
>
> Changes include:
> - 2GiB -> 1GiB
> - no eMMC
> - no onboard microphone
> - no IR
> - no blue
On Thu, Apr 11, 2019 at 12:19:47PM +0200, meg...@megous.com wrote:
> From: Ondrej Jirman
>
> Orange Pi 3 board requires enabling DDC I2C bus via some GPIO connected
> transistors, before the bus can be used.
>
> Model this as a power supply for DDC bus on the HDMI connector connected
> to the
Hi,
On Thu, Apr 11, 2019 at 12:19:44PM +0200, meg...@megous.com wrote:
> From: Ondrej Jirman
>
> H6 SoC has a "pio group withstand voltage mode" register (datasheet
> description), that needs to be used to select either 1.8V or 3.3V I/O mode,
> based on what voltage is powering the respective
Hi,
On Mon, 8 Apr 2019 at 18:47, Clément Péron wrote:
>
> +Chen-Yu.
>
> I would like to fix the reset using the R_WDOG instead of WDOG.
>
> What do you think?
Adding information about the issue as explained on ATF:
"
There seems to have a HW errata in the new revision of the SoC.
Only SoC used
Enable and add supply to the Mali GPU node on the
Orange Pi One Plus and Lite2 boards.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
Enable and add supply to the Mali GPU node on the
Orange Pi 3 board.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
Some SoCs adds a bus clock gate to the Mali Midgard GPU.
Add the binding for the bus clock.
Signed-off-by: Icenowy Zheng
Signed-off-by: Clément Péron
---
Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git
Add the mali gpu node to the H6 device-tree.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index
Enable and add supply to the Mali GPU node on the
Beelink GS1 board.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
From: Neil Armstrong
The Amlogic ARM Mali Midgard requires reset controls to power on and
software reset the GPU, adds these as optional in the bindings.
Signed-off-by: Neil Armstrong
Reviewed-by: Rob Herring
Signed-off-by: Kevin Hilman
---
.../devicetree/bindings/gpu/arm,mali-midgard.txt
Hi,
The Allwinner H6 has a Mali-T720 MP2. The drivers are
out-of-tree so this series only introduce the dt-bindings.
The first patch is from Neil Amstrong and has been already
merged in linux-amlogic. It is required for this series.
The second patch is from Icenowy Zheng where I changed the
This add the H6 mali compatible in the dt-bindings to later support
specific implementation.
Signed-off-by: Clément Péron
---
.../devicetree/bindings/gpu/arm,mali-midgard.txt | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
Enable and add supply to the Mali GPU node on the
Pine H64 board.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
On Thu, Apr 11, 2019 at 08:34:33PM +1000, Julian Calaby wrote:
> Hi Ondrej
>
> On Thu, Apr 11, 2019 at 8:19 PM megous via linux-sunxi
> wrote:
> >
> > From: Ondrej Jirman
> >
> > H6 has a different I/O voltage bias setting method than A80. Prepare
> > existing code for using alternative bias
Hi Ondrej
On Thu, Apr 11, 2019 at 8:19 PM megous via linux-sunxi
wrote:
>
> From: Ondrej Jirman
>
> H6 has a different I/O voltage bias setting method than A80. Prepare
> existing code for using alternative bias voltage setting methods.
>
> Signed-off-by: Ondrej Jirman
> diff --git
From: Ondrej Jirman
MMC1 is used on some H6 boards we want to support. Typical use is 4-bit
SDIO interface with a WiFi chip. Add pin definitions for this use case.
As this is the only possible configration for mmc1, make it the default
one, too.
Signed-off-by: Ondrej Jirman
---
From: Icenowy Zheng
The EMAC on Allwinner H6 is just like the one on A64. The "internal PHY" on
H6 is on a co-packaged AC200 chip, and it's not really internal (it's
connected via RMII at PA GPIO bank).
Add support for the Allwinner H6 EMAC in the dwmac-sun8i driver.
Signed-off-by: Icenowy
From: Ondrej Jirman
Orange Pi 3 has two regulators that power the Realtek RTL8211E. According
to the phy datasheet, both regulators need to be enabled at the same time,
but we can only specify a single phy-supply in the DT.
This can be achieved by making one regulator depedning on the other via
From: Icenowy Zheng
The PHY selection bit also exists on SoCs without an internal PHY; if it's
set to 1 (internal PHY, default value) then the MAC will not make use of
any PHY such SoCs.
This problem appears when adapting for H6, which has no real internal PHY
(the "internal PHY" on H6 is not
From: Ondrej Jirman
H6 SoC has a "pio group withstand voltage mode" register (datasheet
description), that needs to be used to select either 1.8V or 3.3V I/O mode,
based on what voltage is powering the respective pin banks and is thus used
for I/O signals.
Add support for configuring this
From: Ondrej Jirman
Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable
on-board voltage shifting logic for the DDC bus to be usable. Use
ddc-supply on the hdmi-connector to model this.
Add binding documentation for optional ddc-supply property.
Signed-off-by: Ondrej
From: Ondrej Jirman
H6 has a different I/O voltage bias setting method than A80. Prepare
existing code for using alternative bias voltage setting methods.
Signed-off-by: Ondrej Jirman
---
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 2 +-
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 47
From: Ondrej Jirman
Orange Pi 3 has a DDC_CEC_EN signal connected to PH2, that enables the DDC
I2C bus voltage shifter. Before EDID can be read, we need to pull PH2 high.
Signed-off-by: Ondrej Jirman
---
.../dts/allwinner/sun50i-h6-orangepi-3.dts| 35 +++
1 file changed,
From: Ondrej Jirman
This series implements support for Xunlong Orange Pi 3 board.
Unfortunately, this board needs some small driver patches, so I have
split the boards DT patch into chunks that require patches for drivers
in various subsystems.
Suggested merging plan/dependencies:
- Pinctrl
From: Ondrej Jirman
SDIO based brcm43456 is currently misdetected as brcm43455 and the wrong
firmware name is used. Correct the detection and load the correct firmware
file. Chiprev for brcm43456 is "9".
Signed-off-by: Ondrej Jirman
---
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
From: Ondrej Jirman
Orange Pi 3 board requires enabling DDC I2C bus via some GPIO connected
transistors, before the bus can be used.
Model this as a power supply for DDC bus on the HDMI connector connected
to the output port (port 1) of the HDMI controller.
Signed-off-by: Ondrej Jirman
---
Hi,
Here is a new version of the H264 decoding support in the cedrus
driver.
As you might already know, the cedrus driver relies on the Request
API, and is a reverse engineered driver for the video decoding engine
found on the Allwinner SoCs.
This work has been possible thanks to the work done
The H264_SLICE_RAW format is meant to hold the parsed slice data without
the start code. This will be needed by stateless decoders.
Signed-off-by: Maxime Ripard
---
drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
include/media/h264-ctrls.h | 5 +
2 files changed, 6 insertions(+)
diff
From: Pawel Osciak
Stateless video codecs will require both the H264 metadata and slices in
order to be able to decode frames.
This introduces the definitions for the structures used to pass the
metadata from the userspace to the kernel.
Reviewed-by: Paul Kocialkowski
Reviewed-by: Tomasz Figa
The H264_SLICE_RAW format introduced before is meant for stateless
decoders that will need the H264 parsed slice data without the start code.
Let's document it.
Signed-off-by: Maxime Ripard
---
Documentation/media/uapi/v4l/pixfmt-compressed.rst | 25 +++-
1 file changed, 25
Introduce some basic H264 decoding support in cedrus. So far, only the
baseline profile videos have been tested, and some more advanced features
used in higher profiles are not even implemented.
Reviewed-by: Jernej Skrabec
Reviewed-by: Paul Kocialkowski
Signed-off-by: Maxime Ripard
---
On Thu, Apr 11, 2019 at 09:56:15AM +0200, Clément Péron wrote:
> Hi,
>
> On Thu, 11 Apr 2019 at 09:28, Maxime Ripard wrote:
> >
> > On Thu, Apr 11, 2019 at 01:25:39AM +0200, Clément Péron wrote:
> > > Add the mali gpu node to the H6 device-tree.
> > >
> > > Signed-off-by: Clément Péron
> > > ---
Hi,
Le mercredi 10 avril 2019 à 15:44 +0200, Paul Kocialkowski a écrit :
> Hi,
>
> Le jeudi 04 avril 2019 à 14:59 +0200, Maxime Ripard a écrit :
> > From: Pawel Osciak
> >
> > Stateless video codecs will require both the H264 metadata and slices in
> > order to be able to decode frames.
> >
>
Hi,
On Thu, 11 Apr 2019 at 09:27, Maxime Ripard wrote:
>
> On Thu, Apr 11, 2019 at 01:25:38AM +0200, Clément Péron wrote:
> > This add the H6 mali compatible in the dt-bindings to later support
> > specific implementation.
> >
> > Signed-off-by: Clément Péron
> > ---
> >
Hi,
On Thu, 11 Apr 2019 at 09:28, Maxime Ripard wrote:
>
> On Thu, Apr 11, 2019 at 01:25:39AM +0200, Clément Péron wrote:
> > Add the mali gpu node to the H6 device-tree.
> >
> > Signed-off-by: Clément Péron
> > ---
> > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 80
> >
On Thu, Apr 11, 2019 at 01:25:39AM +0200, Clément Péron wrote:
> Add the mali gpu node to the H6 device-tree.
>
> Signed-off-by: Clément Péron
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 80
> 1 file changed, 80 insertions(+)
>
> diff --git
On Thu, Apr 11, 2019 at 01:25:38AM +0200, Clément Péron wrote:
> This add the H6 mali compatible in the dt-bindings to later support
> specific implementation.
>
> Signed-off-by: Clément Péron
> ---
> .../devicetree/bindings/gpu/arm,mali-midgard.txt | 8 +++-
> 1 file changed, 7
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