[linux-sunxi] [DO NOT MERGE] [PATCH v14 7/7] arm64: dts: allwinner: bananapi-m64: Enable Bananapi S070WV20-CT16 DSI panel
This patch add support for Bananapi S070WV20-CT16 DSI panel to
BPI-M64 board.
DSI panel connected via board DSI port with,
- DLDO1 as VCC-DSI supply
- DCDC1 as VDD supply
- PD7 gpio for lcd enable pin
- PD6 gpio for lcd reset pin
- PD5 gpio for backlight enable pin
Signed-off-by: Jagan Teki
---
.../dts/allwinner/sun50i-a64-bananapi-m64.dts | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 208373efee49..6beaecdd802a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -45,6 +45,7 @@
#include "sun50i-a64.dtsi"
#include
+#include
/ {
model = "BananaPi-M64";
@@ -56,6 +57,14 @@
serial1 =
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <_pwm 0 5 PWM_POLARITY_INVERTED>;
+ brightness-levels = <1 2 4 8 16 32 64 128 255>;
+ default-brightness-level = <2>;
+ enable-gpios = < 3 5 GPIO_ACTIVE_HIGH>; /* LCD-BL-EN: PD5 */
+ };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -116,6 +125,24 @@
status = "okay";
};
+ {
+ status = "okay";
+};
+
+ {
+ vcc-dsi-supply = <_dldo1>; /* VCC3V3-DSI */
+ status = "okay";
+
+ panel@0 {
+ compatible = "bananapi,s070wv20-ct16-icn6211";
+ reg = <0>;
+ enable-gpios = < 3 7 GPIO_ACTIVE_HIGH>; /* LCD-PWR-EN: PD7
*/
+ reset-gpios = < 3 6 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD6 */
+ vdd-supply = <_dcdc1>;
+ backlight = <>;
+ };
+};
+
{
status = "okay";
};
@@ -206,6 +233,10 @@
status = "okay";
};
+_pwm {
+ status = "okay";
+};
+
_rsb {
status = "okay";
--
2.18.0.321.gffc6fa0e3
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[linux-sunxi] [PATCH v14 5/7] drm/sun4i: dsi: Add Allwinner A64 MIPI DSI support
The MIPI DSI controller in Allwinner A64 is similar to A33.
But unlike A33, A64 doesn't have DSI_SCLK gating so add compatible
for Allwinner A64 with uninitialized has_mod_clk driver.
Signed-off-by: Jagan Teki
Tested-by: Merlijn Wajer
---
Changes for v14:
- none
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index 2577b237d06a..4a024951aa11 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -1256,6 +1256,7 @@ static const struct dev_pm_ops sun6i_dsi_pm_ops = {
static const struct of_device_id sun6i_dsi_of_table[] = {
{ .compatible = "allwinner,sun6i-a31-mipi-dsi" },
+ { .compatible = "allwinner,sun50i-a64-mipi-dsi" },
{ }
};
MODULE_DEVICE_TABLE(of, sun6i_dsi_of_table);
--
2.18.0.321.gffc6fa0e3
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[linux-sunxi] [PATCH v14 2/7] dt-bindings: sun6i-dsi: Add A64 DPHY compatible (w/ A31 fallback)
The MIPI DSI PHY controller on Allwinner A64 is similar on the one on A31. Add A64 compatible and append A31 compatible as fallback. Reviewed-by: Rob Herring Signed-off-by: Jagan Teki --- Changes for v14: - none .../bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml index fa46670de299..8841938050b2 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml @@ -15,7 +15,11 @@ properties: const: 0 compatible: -const: allwinner,sun6i-a31-mipi-dphy +oneOf: + - const: allwinner,sun6i-a31-mipi-dphy + - items: + - const: allwinner,sun50i-a64-mipi-dphy + - const: allwinner,sun6i-a31-mipi-dphy reg: maxItems: 1 -- 2.18.0.321.gffc6fa0e3 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20191222132229.30276-3-jagan%40amarulasolutions.com.
[linux-sunxi] [PATCH v14 6/7] arm64: dts: allwinner: a64: Add MIPI DSI pipeline
Add MIPI DSI pipeline for Allwinner A64.
- dsi node, with A64 compatible since it doesn't support
DSI_SCLK gating unlike A33
- dphy node, with A64 compatible with A33 fallback since
DPHY on A64 and A33 is similar
- finally, attach the dsi_in to tcon0 for complete MIPI DSI
Signed-off-by: Jagan Teki
Tested-by: Merlijn Wajer
---
Changes for v14:
- none
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 27e48234f1c2..1db8378f59a4 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -382,6 +382,12 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
+
+ tcon0_out_dsi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint =
<_in_tcon0>;
+ allwinner,tcon-channel = <1>;
+ };
};
};
};
@@ -1014,6 +1020,37 @@
status = "disabled";
};
+ dsi: dsi@1ca {
+ compatible = "allwinner,sun50i-a64-mipi-dsi";
+ reg = <0x01ca 0x1000>;
+ interrupts = ;
+ clocks = < CLK_BUS_MIPI_DSI>;
+ resets = < RST_BUS_MIPI_DSI>;
+ phys = <>;
+ phy-names = "dphy";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port {
+ dsi_in_tcon0: endpoint {
+ remote-endpoint = <_out_dsi>;
+ };
+ };
+ };
+
+ dphy: d-phy@1ca1000 {
+ compatible = "allwinner,sun50i-a64-mipi-dphy",
+"allwinner,sun6i-a31-mipi-dphy";
+ reg = <0x01ca1000 0x1000>;
+ clocks = < CLK_BUS_MIPI_DSI>,
+< CLK_DSI_DPHY>;
+ clock-names = "bus", "mod";
+ resets = < RST_BUS_MIPI_DSI>;
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
hdmi: hdmi@1ee {
compatible = "allwinner,sun50i-a64-dw-hdmi",
"allwinner,sun8i-a83t-dw-hdmi";
--
2.18.0.321.gffc6fa0e3
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[linux-sunxi] [PATCH v14 3/7] drm/sun4i: dsi: Get the mod clock for A31
As per the user manual, look like mod clock is not mandatory
for all Allwinner MIPI DSI controllers, it is connected to
CLK_DSI_SCLK for A31 and not available in A64.
So, add compatible check for A31 and get mod clock accordingly.
Tested-by: Merlijn Wajer
Signed-off-by: Jagan Teki
---
Changes for v14:
- none
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index c958ca9bae63..68b88a3dc4c5 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -1120,10 +1120,13 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
return PTR_ERR(dsi->reset);
}
- dsi->mod_clk = devm_clk_get(dev, "mod");
- if (IS_ERR(dsi->mod_clk)) {
- dev_err(dev, "Couldn't get the DSI mod clock\n");
- return PTR_ERR(dsi->mod_clk);
+ if (of_device_is_compatible(dev->of_node,
+ "allwinner,sun6i-a31-mipi-dsi")) {
+ dsi->mod_clk = devm_clk_get(dev, "mod");
+ if (IS_ERR(dsi->mod_clk)) {
+ dev_err(dev, "Couldn't get the DSI mod clock\n");
+ return PTR_ERR(dsi->mod_clk);
+ }
}
/*
--
2.18.0.321.gffc6fa0e3
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[linux-sunxi] [PATCH v14 4/7] drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk
regmap has special API to enable the controller bus clock while
initializing register space, and current driver is using
devm_regmap_init_mmio_clk which require to specify bus
clk_id argument as "bus"
But, the usage of clocks are varies between different Allwinner
DSI controllers. Clocking in A33 would need bus and mod clocks
where as A64 would need only bus clock.
Since A64 support only single bus clock, it is optional to
specify the clock-names on the controller device tree node.
So using NULL on clk_id would get the attached clock.
To support clk_id as "bus" and "NULL" during clock enablement
between controllers, this patch add generic code to handle
the bus clock using regmap_mmio_attach_clk with associated
regmap APIs.
Signed-off-by: Jagan Teki
---
Changes for v14:
- drop regmap_exit, clk_put
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 37 --
1 file changed, 29 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index 68b88a3dc4c5..2577b237d06a 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -1081,6 +1081,7 @@ static const struct component_ops sun6i_dsi_ops = {
static int sun6i_dsi_probe(struct platform_device *pdev)
{
struct device *dev = >dev;
+ const char *bus_clk_name = NULL;
struct sun6i_dsi *dsi;
struct resource *res;
void __iomem *base;
@@ -1094,6 +1095,10 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
dsi->host.ops = _dsi_host_ops;
dsi->host.dev = dev;
+ if (of_device_is_compatible(dev->of_node,
+ "allwinner,sun6i-a31-mipi-dsi"))
+ bus_clk_name = "bus";
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(dev, res);
if (IS_ERR(base)) {
@@ -1107,25 +1112,35 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
return PTR_ERR(dsi->regulator);
}
- dsi->regs = devm_regmap_init_mmio_clk(dev, "bus", base,
- _dsi_regmap_config);
- if (IS_ERR(dsi->regs)) {
- dev_err(dev, "Couldn't create the DSI encoder regmap\n");
- return PTR_ERR(dsi->regs);
- }
-
dsi->reset = devm_reset_control_get_shared(dev, NULL);
if (IS_ERR(dsi->reset)) {
dev_err(dev, "Couldn't get our reset line\n");
return PTR_ERR(dsi->reset);
}
+ dsi->regs = devm_regmap_init_mmio(dev, base, _dsi_regmap_config);
+ if (IS_ERR(dsi->regs)) {
+ dev_err(dev, "Couldn't init regmap\n");
+ return PTR_ERR(dsi->regs);
+ }
+
+ dsi->bus_clk = devm_clk_get(dev, bus_clk_name);
+ if (IS_ERR(dsi->bus_clk)) {
+ dev_err(dev, "Couldn't get the DSI bus clock\n");
+ return PTR_ERR(dsi->bus_clk);
+ } else {
+ ret = regmap_mmio_attach_clk(dsi->regs, dsi->bus_clk);
+ if (ret)
+ return ret;
+ }
+
if (of_device_is_compatible(dev->of_node,
"allwinner,sun6i-a31-mipi-dsi")) {
dsi->mod_clk = devm_clk_get(dev, "mod");
if (IS_ERR(dsi->mod_clk)) {
dev_err(dev, "Couldn't get the DSI mod clock\n");
- return PTR_ERR(dsi->mod_clk);
+ ret = PTR_ERR(dsi->mod_clk);
+ goto err_attach_clk;
}
}
@@ -1164,6 +1179,9 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
pm_runtime_disable(dev);
err_unprotect_clk:
clk_rate_exclusive_put(dsi->mod_clk);
+err_attach_clk:
+ if (!IS_ERR(dsi->bus_clk))
+ regmap_mmio_detach_clk(dsi->regs);
return ret;
}
@@ -1177,6 +1195,9 @@ static int sun6i_dsi_remove(struct platform_device *pdev)
pm_runtime_disable(dev);
clk_rate_exclusive_put(dsi->mod_clk);
+ if (!IS_ERR(dsi->bus_clk))
+ regmap_mmio_detach_clk(dsi->regs);
+
return 0;
}
--
2.18.0.321.gffc6fa0e3
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[linux-sunxi] [PATCH v14 0/7] drm/sun4i: Allwinner A64 MIPI-DSI support
This is v14 version for Allwinner A64 MIPI-DSI support and here is the previous version set[1] Changes for v14: - drop explicit regmap_exit, clk_put Changes for v13: - update dt-bindings for A64 - drop has_mod_clk variant - use regmap bus clock properly Changes for v12: - use enum insted of oneOf+const - handle bus clock using regmap attach clk - tested on A64, A33 boards. Changes for v11: - fix dt-bindings for dphy - fix dt-bindings for dsi controller - add bus clock handling code - tested on A64, A33 boards. Changes for v10: - updated dt-bindings as per .yaml format - rebased on drm-misc/for-linux-next Changes for v9: - moved dsi fixes in separate series on top of A33 - rebase on linux-next Changes for v8: - rebased on drm-misc change along with linux-next - reworked video start delay patch - tested on 4 different dsi panels - reworked commit messages Changes for v7: - moved vcc-dsi binding to required filed. - drop quotes on fallback dphy bindings. - drop min_rate clock pll-mipi patches. - introduce dclk divider computation as like A64 BSP. - add A64 DSI quark patches. - fixed A64 DSI pipeline. - add proper commit messages. - collect Merlijn Wajer Tested-by credits. Changes for v6: - dropped unneeded changes, patches - fixed all burst mode patches as per previous version comments - rebase on master - update proper commit message - dropped unneeded comments - order the patches that make review easy Changes for v5: - collect Rob, Acked-by - droped "Fix VBP size calculation" patch - updated vblk timing calculation. - droped techstar, bananapi dsi panel drivers which may require bridge or other setup. it's under discussion. Changes for v4: - droppoed untested CCU_FEATURE_FIXED_POSTDIV check code in nkm min, max rate patches - create two patches for "Add Allwinner A64 MIPI DSI support" one for has_mod_clk quirk and other one for A64 support - use existing driver code construct for hblk computation - dropped "Increase hfp packet overhead" patch [2], though BSP added this but we have no issues as of now. (no issues on panel side w/o this change) - create separate function for vblk computation - enable vcc-dsi regulator in dsi_runtime_resume - collect Rob, Acked-by - update MAINTAINERS file for panel drivers - cleanup commit messages - fixed checkpatch warnings/errors [1] https://patchwork.freedesktop.org/series/71131/ Any inputs? Jagan. Jagan Teki (7): dt-bindings: sun6i-dsi: Document A64 MIPI-DSI controller dt-bindings: sun6i-dsi: Add A64 DPHY compatible (w/ A31 fallback) drm/sun4i: dsi: Get the mod clock for A31 drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk drm/sun4i: dsi: Add Allwinner A64 MIPI DSI support arm64: dts: allwinner: a64: Add MIPI DSI pipeline [DO NOT MERGE] arm64: dts: allwinner: bananapi-m64: Enable Bananapi S070WV20-CT16 DSI panel .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 33 - .../phy/allwinner,sun6i-a31-mipi-dphy.yaml| 6 ++- .../dts/allwinner/sun50i-a64-bananapi-m64.dts | 31 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++ drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c| 47 ++- 5 files changed, 140 insertions(+), 14 deletions(-) -- 2.18.0.321.gffc6fa0e3 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20191222132229.30276-1-jagan%40amarulasolutions.com.
[linux-sunxi] [PATCH v14 1/7] dt-bindings: sun6i-dsi: Document A64 MIPI-DSI controller
The MIPI DSI controller in Allwinner A64 is similar to A33. But unlike A33, A64 doesn't have DSI_SCLK gating so it is valid to have separate compatible for A64 on the same driver. DSI_SCLK uses mod clock-names on dt-bindings, so the same is not required for A64. On that note - A64 require minimum of 1 clock like the bus clock - A33 require minimum of 2 clocks like both bus, mod clocks So, update dt-bindings so-that it can document both A33, A64 bindings requirements. Reviewed-by: Rob Herring Signed-off-by: Jagan Teki --- Changes for v14: - none .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 33 +-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml index dafc0980c4fa..d41ecb5e7f7c 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml @@ -15,7 +15,9 @@ properties: "#size-cells": true compatible: -const: allwinner,sun6i-a31-mipi-dsi +enum: + - allwinner,sun6i-a31-mipi-dsi + - allwinner,sun50i-a64-mipi-dsi reg: maxItems: 1 @@ -24,6 +26,8 @@ properties: maxItems: 1 clocks: +minItems: 1 +maxItems: 2 items: - description: Bus Clock - description: Module Clock @@ -63,13 +67,38 @@ required: - reg - interrupts - clocks - - clock-names - phys - phy-names - resets - vcc-dsi-supply - port +allOf: + - if: + properties: + compatible: + contains: + const: allwinner,sun6i-a31-mipi-dsi + +then: +properties: + clocks: +minItems: 2 + +required: + - clock-names + + - if: + properties: + compatible: + contains: + const: allwinner,sun50i-a64-mipi-dsi + +then: +properties: + clocks: +minItems: 1 + additionalProperties: false examples: -- 2.18.0.321.gffc6fa0e3 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20191222132229.30276-2-jagan%40amarulasolutions.com.
[linux-sunxi] Re: Developing Linux Kernel Driver for media Codec Driver
Hi Naveen Karuthedath, I am working on nvp6134 driver. Did you complete driver.? Can you guide me or send me example code? Thank you. On Thursday, 20 October 2016 13:08:03 UTC+3, Naveen Karuthedath wrote: > > Hi Hao Zhang > > I am trying to develop device driver for NVP 6134 decoder chip. > It would be great help if your work is available for reference. Is it > already submitted. > Kindly let me know. > > Thanks > Naveen > > On Thursday, 7 July 2016 13:42:23 UTC+5:30, Hao Zhang wrote: >> >> hi all >> >> i am developing a linux kernel driver for a 4-CH AHD2.0 RX and 9-CH >> Audio Codec which is named nvp6124 . >> >> wedsite : http://www.nextchip.com/ch/products/product.asp?hGubun=AHD. >> >> below are few of its characteristics: >> >> video codec: >> it digitizes and decodes ntsc/pal/comet/AHD1.0/AHD2.O video signal into >> digital >> video components which represents 8bit bt656/1120 4:2:2 byte interleave >> fotmat. >> >> audio codec: >> output pcm digital signal converted from analog audio input signals and >> analog >> audio signals converted from pcm digital audio. >> >> control interface: >> control and configure through i2c interface. >> >> video interface: >> 4ch analog video input and output 2ch digital signal, each channal has >> 8 data ports and a clk clock port >> which can connect to the embedded processer. >> >> >> audio interface(two i2s interface): >> audio data convert to PCM data,and outputed via i2s interface . >> PCM data can also input via i2s interface, the input audio data is >> outputed via internal DAC. >> >> >> i want to submit the driver, but i have some problem on the below points: >> >> 1.must i submit the driver through device tree binding? Does the >> kernel tree accept the driver without device tree binding? >> just see the video interface ,i know i2c port can binding below the >> i2c node, but, how can i bind other data port and clock signal port >> with device trees? >> >> 2.how to use device tree to bind device and how does the kernel uses >> it to match device? can i obtain some document about this? >> >> 3.i creat the driver for Cubieboard one(allwinner a10 processer) and >> Banana PI BPI-M1(allwinner a20 processer) ,if i submit patch >> ,which kernel version shoudle i use ? must i use the lastest kernel >> (download in www.kernel.org isn't the sdk of the board)in that boards >> ? >> >> 4.does someone know which lastest kernel version does Cubieboard one >> and Banana PI BPI-M1 supports? >> >> 5.the maintainer doesn't has the device, how do they know the driver >> is work well on my board? just buit without error or warning ? >> >> >> >> Best regards :) >> >> Hao Zhang >> > -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/92199c91-5319-4a4a-8637-a2d99c04db4d%40googlegroups.com.
