Hi
I am working on allwinner v3s(lichee pi zero board) and it is booting
successfully with 4.17 and 5.12.
I want to use cedrus driver for h264 video encoding (bootlin cedrus 4.17
kernal) with v3s but no successfull result, but according to sunxi and
google v3s supports cedrus driver but not
Some code were left in the final driver but without any use.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c | 5 -
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h| 8
2 files changed, 13 deletions(-)
diff --git
Removing the driver cause an oops due to the fact we clean an extra
channel.
Let's give the right index to the cleaning function.
Fixes: 06f751b61329 ("crypto: allwinner - Add sun8i-ce Crypto Engine")
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 4 ++--
Removing the driver cause an oops due to the fact we clean an extra
channel.
Let's give the right index to the cleaning function.
Fixes: f08fcced6d00 ("crypto: allwinner - Add sun8i-ss cryptographic offloader")
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
On Mon, 6 Jan 2020 21:37:38 +0800
Chen-Yu Tsai wrote:
Hi,
> On Mon, Jan 6, 2020 at 4:56 PM Maxime Ripard wrote:
> >
> > On Mon, Jan 06, 2020 at 12:38:49AM +, Andre Przywara wrote:
> > > The Allwinner R40 SoC contains four SPI controllers, using the newer
> > > sun6i design (but at the
On Mon, Jan 6, 2020 at 4:56 PM Maxime Ripard wrote:
>
> On Mon, Jan 06, 2020 at 12:38:49AM +, Andre Przywara wrote:
> > The Allwinner R40 SoC contains four SPI controllers, using the newer
> > sun6i design (but at the legacy addresses).
> > The controller seems to be fully compatible to the
On Sat, 04 Jan 2020, Samuel Holland wrote:
> On AXP288 and newer PMICs, bit 7 of AXP20X_VBUS_IPSOUT_MGMT can be set
> to prevent using the VBUS input. However, when the VBUS unplugged and
> plugged back in, the bit automatically resets to zero.
>
> We need to set the register as volatile to
