Re: [linux-sunxi] [PATCH 1/8] clk: sunxi-ng: sun8i-de2: Swap A64 and H6 definitions
On Sat, Jan 25, 2020 at 7:20 AM Jernej Skrabec wrote: > > For some reason, A64 and H6 have swapped clocks and resets definitions. > H6 doesn't have rotation unit while A64 has. Swap around to correct the > issue. > > Signed-off-by: Jernej Skrabec Could you add Fixes tags for this one? ChenYu -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/CAGb2v6680yWT8KtjK0uKM00%2B6ed4NoPpsMaDyfYERwOXgb8Vbg%40mail.gmail.com.
[linux-sunxi] [PATCH 6/8] media: sun8i: Add Allwinner A83T Rotate driver
Allwinner A83T contains rotation core which can rotate and flip images.
Add a driver for it.
Signed-off-by: Jernej Skrabec
---
MAINTAINERS | 8 +
drivers/media/platform/Kconfig| 12 +
drivers/media/platform/sunxi/Makefile | 1 +
.../platform/sunxi/sun8i-rotate/Makefile | 2 +
.../sunxi/sun8i-rotate/sun8i-formats.c| 273 ++
.../sunxi/sun8i-rotate/sun8i-formats.h| 25 +
.../sunxi/sun8i-rotate/sun8i-rotate.c | 924 ++
.../sunxi/sun8i-rotate/sun8i-rotate.h | 135 +++
8 files changed, 1380 insertions(+)
create mode 100644 drivers/media/platform/sunxi/sun8i-rotate/Makefile
create mode 100644 drivers/media/platform/sunxi/sun8i-rotate/sun8i-formats.c
create mode 100644 drivers/media/platform/sunxi/sun8i-rotate/sun8i-formats.h
create mode 100644 drivers/media/platform/sunxi/sun8i-rotate/sun8i-rotate.c
create mode 100644 drivers/media/platform/sunxi/sun8i-rotate/sun8i-rotate.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 98cf0b034f61..6aab509b8a2c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14322,6 +14322,14 @@ F: include/net/rose.h
F: include/uapi/linux/rose.h
F: net/rose/
+ROTATION DRIVER FOR ALLWINNER A83T
+M: Jernej Skrabec
+L: linux-me...@vger.kernel.org
+T: git git://linuxtv.org/media_tree.git
+S: Maintained
+F: drivers/media/platform/sunxi/sun8i-rot/
+F: Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-rotate.yaml
+
RTL2830 MEDIA DRIVER
M: Antti Palosaari
L: linux-me...@vger.kernel.org
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index 995f4c67f764..fc2c8a009b2f 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -507,6 +507,18 @@ config VIDEO_SUN8I_DEINTERLACE
capability found on some SoCs, like H3.
To compile this driver as a module choose m here.
+config VIDEO_SUN8I_ROTATE
+ tristate "Allwinner DE2 rotation driver"
+ depends on VIDEO_DEV && VIDEO_V4L2
+ depends on ARCH_SUNXI || COMPILE_TEST
+ depends on COMMON_CLK && OF
+ depends on PM
+ select VIDEOBUF2_DMA_CONTIG
+ select V4L2_MEM2MEM_DEV
+ help
+ Support for the Allwinner DE2 rotation unit.
+ To compile this driver as a module choose m here.
+
endif # V4L_MEM2MEM_DRIVERS
# TI VIDEO PORT Helper Modules
diff --git a/drivers/media/platform/sunxi/Makefile
b/drivers/media/platform/sunxi/Makefile
index 3878cb4efdc2..ff0993f70dc3 100644
--- a/drivers/media/platform/sunxi/Makefile
+++ b/drivers/media/platform/sunxi/Makefile
@@ -1,3 +1,4 @@
obj-y += sun4i-csi/
obj-y += sun6i-csi/
obj-y += sun8i-di/
+obj-y += sun8i-rotate/
diff --git a/drivers/media/platform/sunxi/sun8i-rotate/Makefile
b/drivers/media/platform/sunxi/sun8i-rotate/Makefile
new file mode 100644
index ..2f815f4af126
--- /dev/null
+++ b/drivers/media/platform/sunxi/sun8i-rotate/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_VIDEO_SUN8I_ROTATE) += sun8i-rotate.o sun8i-formats.o
diff --git a/drivers/media/platform/sunxi/sun8i-rotate/sun8i-formats.c
b/drivers/media/platform/sunxi/sun8i-rotate/sun8i-formats.c
new file mode 100644
index ..cebfbc5def38
--- /dev/null
+++ b/drivers/media/platform/sunxi/sun8i-rotate/sun8i-formats.c
@@ -0,0 +1,273 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright (C) 2020 Jernej Skrabec */
+
+#include "sun8i-formats.h"
+#include "sun8i-rotate.h"
+
+/*
+ * Formats not included in array:
+ * ROTATE_FORMAT_BGR565
+ * ROTATE_FORMAT_VYUV
+ */
+
+static const struct rotate_format rotate_formats[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_ARGB32,
+ .hw_format = ROTATE_FORMAT_ARGB32,
+ .planes = 1,
+ .bpp = { 4, 0, 0 },
+ .hsub = 1,
+ .vsub = 1,
+ .flags = ROTATE_FLAG_OUTPUT
+ }, {
+ .fourcc = V4L2_PIX_FMT_ABGR32,
+ .hw_format = ROTATE_FORMAT_ABGR32,
+ .planes = 1,
+ .bpp = { 4, 0, 0 },
+ .hsub = 1,
+ .vsub = 1,
+ .flags = ROTATE_FLAG_OUTPUT
+ }, {
+ .fourcc = V4L2_PIX_FMT_RGBA32,
+ .hw_format = ROTATE_FORMAT_RGBA32,
+ .planes = 1,
+ .bpp = { 4, 0, 0 },
+ .hsub = 1,
+ .vsub = 1,
+ .flags = ROTATE_FLAG_OUTPUT
+ }, {
+ .fourcc = V4L2_PIX_FMT_BGRA32,
+ .hw_format = ROTATE_FORMAT_BGRA32,
+ .planes = 1,
+ .bpp = { 4, 0, 0 },
+ .hsub = 1,
+ .vsub = 1,
+ .flags = ROTATE_FLAG_OUTPUT
+ }, {
+ .fourcc = V4L2_PIX_FMT_XRGB32,
+ .hw_format = ROTATE_FORMAT_XRGB32,
+ .planes = 1,
+ .bpp = {
[linux-sunxi] [PATCH 3/8] ARM: dts: sunxi: Fix DE2 clocks register range
As it can be seen from DE2 manual, clock range is 0x1.
Fix it.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +-
arch/arm/boot/dts/sun8i-r40.dtsi | 2 +-
arch/arm/boot/dts/sun8i-v3s.dtsi | 2 +-
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 74ac7ee9383c..053d439b01a7 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -314,7 +314,7 @@ soc {
display_clocks: clock@100 {
compatible = "allwinner,sun8i-a83t-de2-clk";
- reg = <0x0100 0x10>;
+ reg = <0x0100 0x1>;
clocks = < CLK_BUS_DE>,
< CLK_PLL_DE>;
clock-names = "bus",
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 8f09a24b36ec..a9d037667a83 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -119,7 +119,7 @@ soc {
display_clocks: clock@100 {
compatible = "allwinner,sun8i-r40-de2-clk",
"allwinner,sun8i-h3-de2-clk";
- reg = <0x0100 0x10>;
+ reg = <0x0100 0x1>;
clocks = < CLK_BUS_DE>,
< CLK_DE>;
clock-names = "bus",
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 81ea50838cd5..e5312869c0d2 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -105,7 +105,7 @@ soc {
display_clocks: clock@100 {
compatible = "allwinner,sun8i-v3s-de2-clk";
- reg = <0x0100 0x10>;
+ reg = <0x0100 0x1>;
clocks = < CLK_BUS_DE>,
< CLK_DE>;
clock-names = "bus",
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 5e9c3060aa08..799f32bafd80 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -114,7 +114,7 @@ soc {
display_clocks: clock@100 {
/* compatible is in per SoC .dtsi file */
- reg = <0x0100 0x10>;
+ reg = <0x0100 0x1>;
clocks = < CLK_BUS_DE>,
< CLK_DE>;
clock-names = "bus",
--
2.25.0
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[linux-sunxi] [PATCH 0/8] media: sunxi: Add DE2 rotate driver
Some of Allwinner SoCs like A83T and A64 SoCs contain DE2 rotate core which can flip image horizontal and vertical and rotate it in 90 deg. steps. It support a lot of output formats, but a bit less capture formats. All YUV input formats get converted to yuv420p, while RGB formats are preserved. Patches 1-2 fix few issues with DE2 clocks. Patches 3-4 fix register range of DE2 clocks (it would overlap with rotate driver) Patches 5-8 provide binding, implement driver and add nodes. v4l2-compliance SHA: ec55a961487b449bedbe07650674b4965814cf07, 32 bits, 32-bit time_t Compliance test for sun8i-rotate device /dev/video0: Driver Info: Driver name : sun8i-rotate Card type: sun8i-rotate Bus info : platform:sun8i-rotate Driver version : 5.5.0 Capabilities : 0x84208000 Video Memory-to-Memory Streaming Extended Pix Format Device Capabilities Device Caps : 0x04208000 Video Memory-to-Memory Streaming Extended Pix Format Required ioctls: test VIDIOC_QUERYCAP: OK Allow for multiple opens: test second /dev/video0 open: OK test VIDIOC_QUERYCAP: OK test VIDIOC_G/S_PRIORITY: OK test for unlimited opens: OK test invalid ioctls: OK Debug ioctls: test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported) test VIDIOC_LOG_STATUS: OK Input ioctls: test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported) test VIDIOC_G/S_FREQUENCY: OK (Not Supported) test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported) test VIDIOC_ENUMAUDIO: OK (Not Supported) test VIDIOC_G/S/ENUMINPUT: OK (Not Supported) test VIDIOC_G/S_AUDIO: OK (Not Supported) Inputs: 0 Audio Inputs: 0 Tuners: 0 Output ioctls: test VIDIOC_G/S_MODULATOR: OK (Not Supported) test VIDIOC_G/S_FREQUENCY: OK (Not Supported) test VIDIOC_ENUMAUDOUT: OK (Not Supported) test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported) test VIDIOC_G/S_AUDOUT: OK (Not Supported) Outputs: 0 Audio Outputs: 0 Modulators: 0 Input/Output configuration ioctls: test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported) test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported) test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported) test VIDIOC_G/S_EDID: OK (Not Supported) Control ioctls: test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK test VIDIOC_QUERYCTRL: OK test VIDIOC_G/S_CTRL: OK test VIDIOC_G/S/TRY_EXT_CTRLS: OK test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK test VIDIOC_G/S_JPEGCOMP: OK (Not Supported) Standard Controls: 4 Private Controls: 0 Format ioctls: test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK test VIDIOC_G/S_PARM: OK (Not Supported) test VIDIOC_G_FBUF: OK (Not Supported) test VIDIOC_G_FMT: OK test VIDIOC_TRY_FMT: OK test VIDIOC_S_FMT: OK test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported) test Cropping: OK (Not Supported) test Composing: OK (Not Supported) test Scaling: OK (Not Supported) Codec ioctls: test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported) test VIDIOC_G_ENC_INDEX: OK (Not Supported) test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported) Buffer ioctls: test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK test VIDIOC_EXPBUF: OK test Requests: OK (Not Supported) Total for sun8i-rotate device /dev/video0: 45, Succeeded: 45, Failed: 0, Warnings: 0 Best regards, Jernej Jernej Skrabec (8): clk: sunxi-ng: sun8i-de2: Swap A64 and H6 definitions clk: sunxi-ng: sun8i-de2: Fix A83T clocks and reset ARM: dts: sunxi: Fix DE2 clocks register range arm64: dts: allwinner: a64: Fix display clock register range media: dt-bindings: media: Add Allwinner A83T Rotate driver media: sun8i: Add Allwinner A83T Rotate driver ARM: dts: sun8i: a83t: Add device node for rotation core arm64: dts: allwinner: a64: add node for rotation core .../allwinner,sun8i-a83t-de2-rotate.yaml | 70 ++ MAINTAINERS | 8 + arch/arm/boot/dts/sun8i-a83t.dtsi | 13 +- arch/arm/boot/dts/sun8i-r40.dtsi | 2 +- arch/arm/boot/dts/sun8i-v3s.dtsi | 2 +- arch/arm/boot/dts/sunxi-h3-h5.dtsi| 2 +- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14 +- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 49 +- drivers/media/platform/Kconfig| 12 + drivers/media/platform/sunxi/Makefile | 1 + .../platform/sunxi/sun8i-rotate/Makefile | 2 + .../sunxi/sun8i-rotate/sun8i-formats.c| 273 ++ .../sunxi/sun8i-rotate/sun8i-formats.h| 25 + .../sunxi/sun8i-rotate/sun8i-rotate.c | 924 ++ .../sunxi/sun8i-rotate/sun8i-rotate.h |
[linux-sunxi] [PATCH 5/8] media: dt-bindings: media: Add Allwinner A83T Rotate driver
Some Allwinner SoCs like A83T and A64 contain rotate core which can
rotate and flip images.
Add a binding for it.
Signed-off-by: Jernej Skrabec
---
.../allwinner,sun8i-a83t-de2-rotate.yaml | 70 +++
1 file changed, 70 insertions(+)
create mode 100644
Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml
diff --git
a/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml
b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml
new file mode 100644
index ..75196d11da58
--- /dev/null
+++
b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-de2-rotate.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A83T DE2 Rotate Device Tree Bindings
+
+maintainers:
+ - Jernej Skrabec
+ - Chen-Yu Tsai
+ - Maxime Ripard
+
+description: |-
+ The Allwinner A83T and A64 have a rotation core used for
+ rotating and flipping images.
+
+properties:
+ compatible:
+oneOf:
+ - const: allwinner,sun8i-a83t-de2-rotate
+ - items:
+- const: allwinner,sun50i-a64-de2-rotate
+- const: allwinner,sun8i-a83t-de2-rotate
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+items:
+ - description: Rotate interface clock
+ - description: Rotate module clock
+
+ clock-names:
+items:
+ - const: bus
+ - const: mod
+
+ resets:
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+
+rotate: rotate@102 {
+compatible = "allwinner,sun8i-a83t-de2-rotate";
+reg = <0x102 0x1>;
+interrupts = ;
+clocks = <_clocks CLK_BUS_ROT>,
+ <_clocks CLK_ROT>;
+clock-names = "bus",
+ "mod";
+resets = <_clocks RST_ROT>;
+};
+
+...
--
2.25.0
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[linux-sunxi] [PATCH 7/8] ARM: dts: sun8i: a83t: Add device node for rotation core
Allwinner A83T contains rotation core. Add a node for it.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 053d439b01a7..749d8e1e08cb 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -324,6 +324,17 @@ display_clocks: clock@100 {
#reset-cells = <1>;
};
+ rotate: rotate@102 {
+ compatible = "allwinner,sun8i-a83t-de2-rotate";
+ reg = <0x102 0x1>;
+ interrupts = ;
+ clocks = <_clocks CLK_BUS_ROT>,
+<_clocks CLK_ROT>;
+ clock-names = "bus",
+ "mod";
+ resets = <_clocks RST_ROT>;
+ };
+
mixer0: mixer@110 {
compatible = "allwinner,sun8i-a83t-de2-mixer-0";
reg = <0x0110 0x10>;
--
2.25.0
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[linux-sunxi] [PATCH 4/8] arm64: dts: allwinner: a64: Fix display clock register range
Register range of display clocks is 0x1, as it can be seen from
DE2 documentation.
Fix it.
Signed-off-by: Jernej Skrabec
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 862b47dc9dc9..baa6f08dc108 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -264,7 +264,7 @@ bus@100 {
display_clocks: clock@0 {
compatible = "allwinner,sun50i-a64-de2-clk";
- reg = <0x0 0x10>;
+ reg = <0x0 0x1>;
clocks = < CLK_BUS_DE>,
< CLK_DE>;
clock-names = "bus",
--
2.25.0
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[linux-sunxi] [PATCH 2/8] clk: sunxi-ng: sun8i-de2: Fix A83T clocks and reset
A83T also contains rotation core, but related clocks and reset are
missing. Add them.
With that fixed, H3 and V3s capabilities no longer match (they don't
have rotation core), so create new struct for them.
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 31 ++--
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index 08074d935317..800659cf7347 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
@@ -50,6 +50,8 @@ static SUNXI_CCU_M(mixer1_div_a83_clk, "mixer1-div",
"pll-de", 0x0c, 4, 4,
CLK_SET_RATE_PARENT);
static SUNXI_CCU_M(wb_div_a83_clk, "wb-div", "pll-de", 0x0c, 8, 4,
CLK_SET_RATE_PARENT);
+static SUNXI_CCU_M(rot_div_a83_clk, "rot-div", "pll-de", 0x0c, 0x0c, 4,
+ CLK_SET_RATE_PARENT);
static struct ccu_common *sun50i_a64_de2_clks[] = {
_clk.common,
@@ -81,6 +83,10 @@ static struct ccu_common *sun8i_a83t_de2_clks[] = {
_div_a83_clk.common,
_div_a83_clk.common,
_div_a83_clk.common,
+
+ _rot_clk.common,
+ _clk.common,
+ _div_a83_clk.common,
};
static struct ccu_common *sun8i_h3_de2_clks[] = {
@@ -113,16 +119,19 @@ static struct clk_hw_onecell_data sun8i_a83t_de2_hw_clks
= {
[CLK_MIXER0]= _clk.common.hw,
[CLK_MIXER1]= _clk.common.hw,
[CLK_WB]= _clk.common.hw,
+ [CLK_ROT] = _clk.common.hw,
[CLK_BUS_MIXER0]= _mixer0_clk.common.hw,
[CLK_BUS_MIXER1]= _mixer1_clk.common.hw,
[CLK_BUS_WB]= _wb_clk.common.hw,
+ [CLK_BUS_ROT] = _rot_clk.common.hw,
[CLK_MIXER0_DIV]= _div_a83_clk.common.hw,
[CLK_MIXER1_DIV]= _div_a83_clk.common.hw,
[CLK_WB_DIV]= _div_a83_clk.common.hw,
+ [CLK_ROT_DIV] = _div_a83_clk.common.hw,
},
- .num= CLK_NUMBER_WITHOUT_ROT,
+ .num= CLK_NUMBER_WITH_ROT,
};
static struct clk_hw_onecell_data sun8i_h3_de2_hw_clks = {
@@ -179,8 +188,18 @@ static struct clk_hw_onecell_data sun50i_a64_de2_hw_clks =
{
static struct ccu_reset_map sun8i_a83t_de2_resets[] = {
[RST_MIXER0]= { 0x08, BIT(0) },
/*
-* For A83T, H3 and R40, mixer1 reset line is shared with wb, so
+* A83T and R40 mixer1 reset line is shared with wb, so
* only RST_WB is exported here.
+*/
+ [RST_WB]= { 0x08, BIT(2) },
+ [RST_ROT] = { 0x08, BIT(3) },
+};
+
+static struct ccu_reset_map sun8i_h3_de2_resets[] = {
+ [RST_MIXER0]= { 0x08, BIT(0) },
+ /*
+* H3 mixer1 reset line is shared with wb, so only RST_WB
+* is exported here.
* For V3s there's just no mixer1, so it also shares this struct.
*/
[RST_WB]= { 0x08, BIT(2) },
@@ -215,8 +234,8 @@ static const struct sunxi_ccu_desc sun8i_h3_de2_clk_desc = {
.hw_clks= _h3_de2_hw_clks,
- .resets = sun8i_a83t_de2_resets,
- .num_resets = ARRAY_SIZE(sun8i_a83t_de2_resets),
+ .resets = sun8i_h3_de2_resets,
+ .num_resets = ARRAY_SIZE(sun8i_h3_de2_resets),
};
static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc = {
@@ -245,8 +264,8 @@ static const struct sunxi_ccu_desc sun8i_v3s_de2_clk_desc =
{
.hw_clks= _v3s_de2_hw_clks,
- .resets = sun8i_a83t_de2_resets,
- .num_resets = ARRAY_SIZE(sun8i_a83t_de2_resets),
+ .resets = sun8i_h3_de2_resets,
+ .num_resets = ARRAY_SIZE(sun8i_h3_de2_resets),
};
static int sunxi_de2_clk_probe(struct platform_device *pdev)
--
2.25.0
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[linux-sunxi] [PATCH 1/8] clk: sunxi-ng: sun8i-de2: Swap A64 and H6 definitions
For some reason, A64 and H6 have swapped clocks and resets definitions.
H6 doesn't have rotation unit while A64 has. Swap around to correct the
issue.
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index d9668493c3f9..08074d935317 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
@@ -51,7 +51,7 @@ static SUNXI_CCU_M(mixer1_div_a83_clk, "mixer1-div",
"pll-de", 0x0c, 4, 4,
static SUNXI_CCU_M(wb_div_a83_clk, "wb-div", "pll-de", 0x0c, 8, 4,
CLK_SET_RATE_PARENT);
-static struct ccu_common *sun50i_h6_de3_clks[] = {
+static struct ccu_common *sun50i_a64_de2_clks[] = {
_clk.common,
_clk.common,
_clk.common,
@@ -156,7 +156,7 @@ static struct clk_hw_onecell_data sun8i_v3s_de2_hw_clks = {
.num= CLK_NUMBER_WITHOUT_ROT,
};
-static struct clk_hw_onecell_data sun50i_h6_de3_hw_clks = {
+static struct clk_hw_onecell_data sun50i_a64_de2_hw_clks = {
.hws= {
[CLK_MIXER0]= _clk.common.hw,
[CLK_MIXER1]= _clk.common.hw,
@@ -190,13 +190,13 @@ static struct ccu_reset_map sun50i_a64_de2_resets[] = {
[RST_MIXER0]= { 0x08, BIT(0) },
[RST_MIXER1]= { 0x08, BIT(1) },
[RST_WB]= { 0x08, BIT(2) },
+ [RST_ROT] = { 0x08, BIT(3) },
};
static struct ccu_reset_map sun50i_h6_de3_resets[] = {
[RST_MIXER0]= { 0x08, BIT(0) },
[RST_MIXER1]= { 0x08, BIT(1) },
[RST_WB]= { 0x08, BIT(2) },
- [RST_ROT] = { 0x08, BIT(3) },
};
static const struct sunxi_ccu_desc sun8i_a83t_de2_clk_desc = {
@@ -220,20 +220,20 @@ static const struct sunxi_ccu_desc sun8i_h3_de2_clk_desc
= {
};
static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc = {
- .ccu_clks = sun8i_h3_de2_clks,
- .num_ccu_clks = ARRAY_SIZE(sun8i_h3_de2_clks),
+ .ccu_clks = sun50i_a64_de2_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun50i_a64_de2_clks),
- .hw_clks= _h3_de2_hw_clks,
+ .hw_clks= _a64_de2_hw_clks,
.resets = sun50i_a64_de2_resets,
.num_resets = ARRAY_SIZE(sun50i_a64_de2_resets),
};
static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = {
- .ccu_clks = sun50i_h6_de3_clks,
- .num_ccu_clks = ARRAY_SIZE(sun50i_h6_de3_clks),
+ .ccu_clks = sun8i_h3_de2_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_h3_de2_clks),
- .hw_clks= _h6_de3_hw_clks,
+ .hw_clks= _h3_de2_hw_clks,
.resets = sun50i_h6_de3_resets,
.num_resets = ARRAY_SIZE(sun50i_h6_de3_resets),
--
2.25.0
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[linux-sunxi] [PATCH 8/8] arm64: dts: allwinner: a64: add node for rotation core
Allwinner A64 contains rotation core compatible to A83T.
Add a node for it.
Signed-off-by: Jernej Skrabec
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index baa6f08dc108..fd6ed305c14c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -274,6 +274,18 @@ display_clocks: clock@0 {
#reset-cells = <1>;
};
+ rotate: rotate@2 {
+ compatible = "allwinner,sun50i-a64-de2-rotate",
+"allwinner,sun8i-a83t-de2-rotate";
+ reg = <0x2 0x1>;
+ interrupts = ;
+ clocks = <_clocks CLK_BUS_ROT>,
+<_clocks CLK_ROT>;
+ clock-names = "bus",
+ "mod";
+ resets = <_clocks RST_ROT>;
+ };
+
mixer0: mixer@10 {
compatible = "allwinner,sun50i-a64-de2-mixer-0";
reg = <0x10 0x10>;
--
2.25.0
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[linux-sunxi] Re: [PATCH 3/9] arm64: dts: allwinner: pinebook: Remove unused AXP803 regulators
On Fri, Jan 24, 2020 at 8:36 AM Maxime Ripard wrote:
>
> On Tue, Jan 21, 2020 at 09:14:02PM -0600, Samuel Holland wrote:
> > On 1/21/20 3:05 AM, Maxime Ripard wrote:
> > > On Sun, Jan 19, 2020 at 10:30:58AM -0600, Samuel Holland wrote:
> > >> The Pinebook does not use the CSI bus on the A64. In fact it does not
> > >> use GPIO port E for anything at all. Thus the following regulators are
> > >> not used and do not need voltages set:
> > >>
> > >> - ALDO1: Connected to VCC-PE only
> > >> - DLDO3: Not connected
> > >> - ELDO3: Not connected
> > >>
> > >> Signed-off-by: Samuel Holland
> > >> ---
> > >> .../boot/dts/allwinner/sun50i-a64-pinebook.dts | 16 +---
> > >> 1 file changed, 1 insertion(+), 15 deletions(-)
> > >>
> > >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> > >> b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> > >> index ff32ca1a495e..8e7ce6ad28dd 100644
> > >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> > >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> > >> @@ -202,9 +202,7 @@
> > >> };
> > >>
> > >> _aldo1 {
> > >> - regulator-min-microvolt = <280>;
> > >> - regulator-max-microvolt = <280>;
> > >> - regulator-name = "vcc-csi";
> > >> + regulator-name = "vcc-pe";
> > >> };
> > >
> > > If it's connected to PE, I'd expect the voltage to be at 3.3v?
> >
> > If we provide voltage constraints, the regulator core will enable the
> > regulator
> > and set its voltage at boot. That seems like a bit of a waste.
>
> I'm not sure the regulator core enables them if there's neither
> regulator-boot-on nor regulator-always-on.
>
> > I don't think the voltage really matters, since nothing is plugged in to the
> > port. ALDO1 can't go over 3.3V anyway, so even if it does get turned on for
> > some
> > reason, nothing will get damaged.
>
> Looking at the schematics, it looks like the PE pins are connected to
> the front-facing camera?
The only camera on Pinebook is UVC
>
> Maxime
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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[linux-sunxi] Re: [PATCH 0/4] sunxi: R40: Enable USB and Ethernet
On Thu, Jan 2, 2020 at 5:15 AM Andre Przywara wrote: > > This series enables the USB ports on boards with the Allwinner R40 SoC, > also updates the Bananapi M2 Berry board support. > Patch 1/4 updates the M2 Berry .dts file, so that we get the USB and > Ethernet nodes that we need to enable Ethernet in patch 2/4. > Patch 3/4 adds support for the USB PHY in the R40 SoC, so that the final > patch can enable USB for the two R40 boards that U-Boot supports. > > Tested on the Bananapi M2 Berry. I don't have the M2 Ultra, but USB > should work there with this series too. Ethernet was already enabled. > > Cheers, > Andre. > > Andre Przywara (4): > sunxi: dts: R40: Update Bananapi M2 Berry .dts > sunxi: defconfig: Bananapi M2 Berry: enable Ethernet > phy: sun4i-usb: Add Allwinner R40 support > sunxi: defconfig: R40 boards: enable USB > > arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 135 > --- > arch/arm/mach-sunxi/Kconfig | 1 + > configs/Bananapi_M2_Ultra_defconfig | 4 + > configs/bananapi_m2_berry_defconfig | 6 ++ > drivers/phy/allwinner/phy-sun4i-usb.c| 12 +++ > 5 files changed, 143 insertions(+), 15 deletions(-) Applied all to u-boot-sunxi/master -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/CAMty3ZCgqRjM1BH0Ew1B7b3spisdN4%3Dn0_paWtucg1s%2B1u6PRw%40mail.gmail.com.
[linux-sunxi] Re: [PATCH 1/6] sunxi: move CONFIG_SYS_SPI_U_BOOT_OFFS out of defconfig
On Mon, Jan 6, 2020 at 6:59 AM Andre Przywara wrote: > > For Allwinner SoCs the CONFIG_SYS_SPI_U_BOOT_OFFS value is not really a > board choice: The boot ROM only loads the SPL from offset 0 of the SPI > NOR flash, and loads at most 32KB. This is a similar situation as on MMC, > so consequently we create our "joint" image (SPL + U-Boot proper) with > that 32KB offset during the build. > > So define the value of this symbol to be 32KB by default for every > Allwinner SoC. This removes the definition of this symbol from the > _defconfig files, and avoids every board to define this over and over > again. > > Signed-off-by: Andre Przywara > --- Applied to u-boot-sunxi/master -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/CAMty3ZCkhKWq_Tm_-TB5ths%2BHge0u2DJ0yonU2Au8uDP47X2%3Dg%40mail.gmail.com.
