[linux-sunxi] Re: [PATCH 3/3] dt-bindings: arm: sunxi: note that old PineTab compatible has old panel

2020-12-10 Thread Rob Herring
On Thu, 10 Dec 2020 16:45:58 +0800, Icenowy Zheng wrote: > As the old LCD panel used by PineTab developer samples are discontinued, > there won't be furtherly any more units of the sample, and this should > be noted in the document. > > Signed-off-by: Icenowy Zheng > --- >

[linux-sunxi] Re: [PATCH 1/3] dt-bindings: arm: sunxi: add PineTab new panel DT binding

2020-12-10 Thread Rob Herring
On Thu, 10 Dec 2020 16:42:32 +0800, Icenowy Zheng wrote: > Early adopters' PineTabs (and all further releases) will have a new LCD > panel different with the one that is used when in development (because > the old panel's supply discontinued). > > Add a new DT compatible for it. > >

[linux-sunxi] Re: [PATCH v2 16/19] dt-bindings: media: Add A83T MIPI CSI-2 bindings documentation

2020-12-10 Thread Rob Herring
On Sat, 28 Nov 2020 15:28:36 +0100, Paul Kocialkowski wrote: > This introduces YAML bindings documentation for the A83T MIPI CSI-2 > controller. > > Signed-off-by: Paul Kocialkowski > --- > .../media/allwinner,sun8i-a83t-mipi-csi2.yaml | 147 ++ > 1 file changed, 147

[linux-sunxi] [PATCH v2 21/21] arm64: dts: allwinner: Add OrangePi Zero 2 .dts

2020-12-10 Thread Andre Przywara
The OrangePi Zero 2 is a development board with the new H616 SoC. It features the usual connectors used on those small boards, and comes with the AXP305, which seems to be compatible with the AXP805. For more details see: http://linux-sunxi.org/Xunlong_Orange_Pi_Zero2 Signed-off-by: Andre

[linux-sunxi] [PATCH v2 20/21] dt-bindings: arm: sunxi: Add OrangePi Zero 2 binding

2020-12-10 Thread Andre Przywara
Signed-off-by: Andre Przywara --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index cab8e1b6417b..5f8b5c896e66 100644 ---

[linux-sunxi] [PATCH v2 19/21] arm64: dts: allwinner: Add Allwinner H616 .dtsi file

2020-12-10 Thread Andre Przywara
This (relatively) new SoC is similar to the H6, but drops the (broken) PCIe support and the USB 3.0 controller. It also gets the management controller removed, which in turn removes *some*, but not all of the devices formerly dedicated to the ARISC (CPUS). There does not seem to be an extra

[linux-sunxi] [PATCH v2 18/21] dt-bindings: allwinner: Add H616 compatible strings

2020-12-10 Thread Andre Przywara
Add simple "allwinner,sun50i-h616-xxx" compatible names to existing bindings, and pair them with an existing fallback compatible string, as the devices are compatible. This covers I2C, infrared, RTC and SPI. Use enums to group all compatible devices together. Signed-off-by: Andre Przywara ---

[linux-sunxi] [PATCH v2 17/21] dt-bindings: watchdog: sun4i: Add H616 compatible string

2020-12-10 Thread Andre Przywara
Use enums to group all compatible devices together on the way. Signed-off-by: Andre Przywara --- .../bindings/watchdog/allwinner,sun4i-a10-wdt.yaml | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git

[linux-sunxi] [PATCH v2 16/21] dt-bindings: watchdog: sun4i: Add A100 compatible

2020-12-10 Thread Andre Przywara
From: Yangtao Li Add a binding for A100's watchdog controller. Signed-off-by: Yangtao Li Acked-by: Rob Herring Signed-off-by: Andre Przywara --- .../devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git

[linux-sunxi] [PATCH v2 15/21] phy: sun4i-usb: Add support for the H616 USB PHY

2020-12-10 Thread Andre Przywara
The USB PHY used in the Allwinner H616 SoC inherits some traits from its various predecessors: it has four full PHYs like the H3, needs some extra bits to be set like the H6, and clears a different bit in the PMU_UNK1 register like the A100. Name all those properties in a new config struct and

[linux-sunxi] [PATCH v2 14/21] phy: sun4i-usb: Rework "pmu_unk1" handling

2020-12-10 Thread Andre Przywara
Newer SoCs (A100, H616) need to clear a different bit in our "unknown" PMU PHY register. Generalise the existing code by allowing configs to specify a bitmask of bits to clear. Signed-off-by: Andre Przywara --- drivers/phy/allwinner/phy-sun4i-usb.c | 28 +++ 1 file

[linux-sunxi] [PATCH v2 13/21] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register

2020-12-10 Thread Andre Przywara
The Allwinner H616 SoC has two EMAC controllers, with the second one being tied to the internal PHY, but also using a separate EMAC clock register. To tell the driver about which clock register to use, we add a parameter to our syscon phandle. The driver will use this value as an index into the

[linux-sunxi] [PATCH v2 12/21] soc: sunxi: sram: Add support for more than one EMAC clock

2020-12-10 Thread Andre Przywara
The Allwinner H616 adds a second EMAC clock register at offset 0x34, for controlling the second EMAC in this chip. Allow to extend the regmap in this case, to cover more than the current 4 bytes exported. Signed-off-by: Andre Przywara --- drivers/soc/sunxi/sunxi_sram.c | 31

[linux-sunxi] [PATCH v2 11/21] dt-bindings: sram: sunxi-sram: Add H616 compatible string

2020-12-10 Thread Andre Przywara
The H616 adds a second EMAC clock register. We don't know about the exact SRAM properties yet, so this gets omitted for now. Signed-off-by: Andre Przywara --- .../bindings/sram/allwinner,sun4i-a10-system-control.yaml| 1 + 1 file changed, 1 insertion(+) diff --git

[linux-sunxi] [PATCH v2 10/21] mfd: axp20x: Allow AXP chips without interrupt lines

2020-12-10 Thread Andre Przywara
Currently the AXP chip requires to have its IRQ line connected to some interrupt controller, and will fail probing when this is not the case. On a new Allwinner SoC (H616) there is no NMI pin anymore, so the interrupt functionality of the AXP chip is simply not available. Check whether the DT

[linux-sunxi] [PATCH v2 09/21] mmc: sunxi: add support for A100 mmc controller

2020-12-10 Thread Andre Przywara
From: Yangtao Li This patch adds support for A100 MMC controller, which use word address for internal dma. Signed-off-by: Yangtao Li Signed-off-by: Andre Przywara --- drivers/mmc/host/sunxi-mmc.c | 28 +--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git

[linux-sunxi] [PATCH v2 08/21] dt-bindings: mmc: sunxi: Add Allwinner A100 and H616 compatibles

2020-12-10 Thread Andre Przywara
From: Yangtao Li Add binding for A100's and H616's mmc and emmc controller. Signed-off-by: Yangtao Li Signed-off-by: Andre Przywara --- .../devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml | 8 1 file changed, 8 insertions(+) diff --git

[linux-sunxi] [PATCH v2 07/21] clk: sunxi-ng: Add support for the Allwinner H616 CCU

2020-12-10 Thread Andre Przywara
While the clocks are fairly similar to the H6, many differ in tiny details, so a separate clock driver seems indicated. Derived from the H6 clock driver, and adjusted according to the manual. Signed-off-by: Andre Przywara --- drivers/clk/sunxi-ng/Kconfig|5 +

[linux-sunxi] [PATCH v2 06/21] clk: sunxi-ng: Add support for the Allwinner H616 R-CCU

2020-12-10 Thread Andre Przywara
The clocks itself are identical to the H6 R-CCU, it's just that the H616 has not all of them implemented (or connected). Signed-off-by: Andre Przywara --- drivers/clk/sunxi-ng/Kconfig | 2 +- drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 47 +-

[linux-sunxi] [PATCH v2 05/21] dt-bindings: clk: sunxi-ccu: Add compatible string for Allwinner H616

2020-12-10 Thread Andre Przywara
Signed-off-by: Andre Przywara --- .../devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml

[linux-sunxi] [PATCH v2 04/21] pinctrl: sunxi: Add support for the Allwinner H616-R pin controller

2020-12-10 Thread Andre Przywara
There are only two pins left now, used to connect to the PMIC via I2C. Signed-off-by: Andre Przywara Acked-by: Maxime Ripard Reviewed-by: Jernej Skrabec --- drivers/pinctrl/sunxi/Kconfig | 5 ++ drivers/pinctrl/sunxi/Makefile| 1 +

[linux-sunxi] [PATCH v2 03/21] pinctrl: sunxi: Add support for the Allwinner H616 pin controller

2020-12-10 Thread Andre Przywara
Port A is used for an internal connection to some analogue circuitry which looks like an AC200 IP (as in the H6), though this is not mentioned in the manual. Signed-off-by: Andre Przywara --- drivers/pinctrl/sunxi/Kconfig | 5 + drivers/pinctrl/sunxi/Makefile | 1

[linux-sunxi] [PATCH v2 02/21] dt-bindings: pinctrl: Add Allwinner H616 compatible strings

2020-12-10 Thread Andre Przywara
A new SoC, a new compatible string. Also we were too miserly with just allowing seven interrupt banks. Signed-off-by: Andre Przywara --- .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git

[linux-sunxi] [PATCH v2 01/21] clk: sunxi-ng: h6: Fix clock divider range on some clocks

2020-12-10 Thread Andre Przywara
While comparing clocks between the H6 and H616, some of the M factor ranges were found to be wrong: the manual says they are only covering two bits [1:0], but our code had "5" in the number-of-bits field. By writing 0xff into that register in U-Boot and via FEL, it could be confirmed that bits

[linux-sunxi] [PATCH v2 00/21] arm64: sunxi: Initial Allwinner H616 SoC support

2020-12-10 Thread Andre Przywara
Hi, this is the quite expanded second version of the support series for the Allwinner H616 SoC. Besides many fixes for the bugs discovered by the diligent reviewers (many thanks for that!) this version adds some patches to support some slightly changed devices, like the second EMAC and the AXP

Re: [linux-sunxi] [PATCH 5/8] clk: sunxi-ng: Add support for the Allwinner H616 CCU

2020-12-10 Thread André Przywara
On 10/12/2020 13:31, Icenowy Zheng wrote: > 在 2020-12-02星期三的 13:54 +,Andre Przywara写道: >> While the clocks are fairly similar to the H6, many differ in tiny >> details, so a separate clock driver seems indicated. >> >> Derived from the H6 clock driver, and adjusted according to the >> manual.

Re: [linux-sunxi] [PATCH 5/8] clk: sunxi-ng: Add support for the Allwinner H616 CCU

2020-12-10 Thread Icenowy Zheng
在 2020-12-02星期三的 13:54 +,Andre Przywara写道: > While the clocks are fairly similar to the H6, many differ in tiny > details, so a separate clock driver seems indicated. > > Derived from the H6 clock driver, and adjusted according to the > manual. > > Signed-off-by: Andre Przywara > --- >

[linux-sunxi] [PATCH 3/3] dt-bindings: arm: sunxi: note that old PineTab compatible has old panel

2020-12-10 Thread Icenowy Zheng
As the old LCD panel used by PineTab developer samples are discontinued, there won't be furtherly any more units of the sample, and this should be noted in the document. Signed-off-by: Icenowy Zheng --- Documentation/devicetree/bindings/arm/sunxi.yaml | 2 +- 1 file changed, 1 insertion(+), 1

[linux-sunxi] [PATCH 2/3] arm64: allwinner: dts: a64: add DT for PineTab with new LCD panel

2020-12-10 Thread Icenowy Zheng
Further released PineTabs will have a new LCD panel that is different with the one used in developers' samples. Add device tree for PineTab with the new panel. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/Makefile| 1 + .../sun50i-a64-pinetab-new-panel.dts |

[linux-sunxi] [PATCH 1/3] dt-bindings: arm: sunxi: add PineTab new panel DT binding

2020-12-10 Thread Icenowy Zheng
Early adopters' PineTabs (and all further releases) will have a new LCD panel different with the one that is used when in development (because the old panel's supply discontinued). Add a new DT compatible for it. Signed-off-by: Icenowy Zheng --- Documentation/devicetree/bindings/arm/sunxi.yaml

[linux-sunxi] [PATCH 0/3] PineTab with new panel DT

2020-12-10 Thread Icenowy Zheng
As discussed on the mailing list, here introduces a new DT for new PineTabs. Icenowy Zheng (3): dt-bindings: arm: sunxi: add PineTab new panel DT binding arm64: allwinner: dts: a64: add DT for PineTab with new LCD panel dt-bindings: arm: sunxi: note that old PineTab compatible has old