On 1/11/21 10:03 AM, Andre Przywara wrote:
> So far the only difference between the various Allwinner MMC controller
> we are concerned about is the mod clock register offset.
> This is actually not directly related to the MMC controller IP, but an
> integration choice, dependent on the SoC this
On 1/11/21 9:02 AM, André Przywara wrote:
> On 03/01/2021 09:26, Jernej Skrabec wrote:
>> This PMIC can be found on H616 boards and it's very similar to AXP805
>> and AXP806.
>>> Signed-off-by: Jernej Skrabec
>
> The existing sunxi PMIC code is the typical U-Boot mess, but I don't
> want to
Most SoCs using the sun8i-emac IP use a register in the "syscon" area to
control some PHY related settings. The R40 is special, since this
register is located in the CCU IP.
So far we were storing the *base* address in our priv struct, then adding
the offset later when we need to use it.
Change
At the moment we only consider the EPHY register for those SoCs were
we actually have an internal PHY to configure. However even other SoCs
have this register, an expect a bit to be cleared for proper operation
with an external PHY.
Rework sun8i_emac_set_syscon_ephy() to be called regardless of
Hi,
I came up with those three patches to prepare for the H616.
Patch 1 simplifies the MMC driver, so the H616 support becomes a
one-liner.
Patch 2 cleans up the Ethernet driver, so we can support the same
compatible strings and fallbacks as Linux.
Patch 3 prepares the EMAC driver for the second
So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.
To avoid becoming trapped with some
On 03/01/2021 09:26, Jernej Skrabec wrote:
> This commit introduces DM H616 clock driver.
>
> Signed-off-by: Jernej Skrabec
Compared against the manual.
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> drivers/clk/sunxi/Kconfig| 7 ++
> drivers/clk/sunxi/Makefile | 1 +
>
On 03/01/2021 09:26, Jernej Skrabec wrote:
> H616 pinctrl is no different configuration wise than others, so just add
> compatible for it.
>
> Signed-off-by: Jernej Skrabec
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> drivers/gpio/sunxi_gpio.c | 1 +
> 1 file changed, 1 insertion(+)
>
On 03/01/2021 09:26, Jernej Skrabec wrote:
> It turns out that several SoCs share same mmc configuration as H6. In
> order to lower ifdef clutter replace H6 specific macro with common one.
>
> Signed-off-by: Jernej Skrabec
Shame we need to do this, but the SPL requires this ifdef orgy.
On 04/01/2021 18:28, Jernej Škrabec wrote:
> Dne ponedeljek, 04. januar 2021 ob 11:35:41 CET je André Przywara napisal(a):
>> On 03/01/2021 23:43, Samuel Holland wrote:
>>
>> Hi Jernej,
>>
>> thanks for that patch, that's a nice solution to avoid those long #ifdef
>> chains!
>>
>>> On 1/3/21 3:26
On 03/01/2021 09:26, Jernej Skrabec wrote:
> This PMIC can be found on H616 boards and it's very similar to AXP805
> and AXP806.
>> Signed-off-by: Jernej Skrabec
The existing sunxi PMIC code is the typical U-Boot mess, but I don't
want to block this series on a rework. I put some comments and
On 10/01/2021 23:16, Samuel Holland wrote:
> On 1/10/21 1:29 PM, Jernej Skrabec wrote:
>> From: Andre Heider
>>
>> dts file is taken from Linux 5.11-rc1 tag.
>>
>> The Bluetooth controller of this device ships with a default address,
>> use the new CONFIG_FIXUP_BDADDR option to fix it up.
>
>
On 1/10/21 1:29 PM, Jernej Skrabec wrote:
> From: Andre Heider
>
> dts file is taken from Linux 5.11-rc1 tag.
>
> The Bluetooth controller of this device ships with a default address,
> use the new CONFIG_FIXUP_BDADDR option to fix it up.
This still references the old config name. It should be
On 10/01/2021 19:29, Jernej Skrabec wrote:
> This series introduces OrangePi 3 support.
>
> Previous cover letter:
> This is just refreshed v4 from here:
> https://patchwork.ozlabs.org/project/uboot/list/?series=156657=*
>
> Patches are only rebased, DT updated and defconfig regenerated, so
> I
On 10/01/2021 18:43, Jernej Škrabec wrote:
> Dne petek, 08. januar 2021 ob 03:01:42 CET je André Przywara napisal(a):
>> On 03/12/2020 17:46, Jernej Skrabec wrote:
>>> It turns out that in rare cases, current analytical approach to detect
>>> correct DRAM bus width and rank on H6 doesn't work. On
PineH64 model B has wifi+bt combo module. Wifi is already supported, so
lets add also bluetooth node.
Signed-off-by: Jernej Skrabec
---
.../dts/allwinner/sun50i-h6-pine-h64-model-b.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git
YUV to RGB matrices are almost identical to YVU to RGB matrices. They
only have second and third column reversed. Do that reversion in code in
order to lower amount of static data and redundancy.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 99
DE3 supports 10-bit formats, so it's only naturally to also support
BT2020 encoding.
Add support for it.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 12 +++-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 2 ++
2 files changed, 13 insertions(+), 1 deletion(-)
Rework DE3 CSC macros to take just one coordinate instead of two. This
will make its usage easier in subsequent commit.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 2 +-
drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 ++
2 files changed, 3 insertions(+), 5 deletions(-)
This short series reworks CSC handling to remove duplicated constants
(patch 1 and 2) and adds BT2020 encoding to DE3 (patch 3).
Please take a look.
Best regards,
Jernej
Jernej Skrabec (3):
drm/sun4i: csc: Rework DE3 CSC macros
drm/sun4i: de2/de3: Remove redundant CSC matrices
drm/sun4i:
Dne nedelja, 10. januar 2021 ob 20:29:39 CET je Jernej Skrabec napisal(a):
> From: Andre Heider
>
> dts file is taken from Linux 5.11-rc1 tag.
>
> The Bluetooth controller of this device ships with a default address,
> use the new CONFIG_FIXUP_BDADDR option to fix it up.
>
>
From: Andre Heider
dts file is taken from Linux 5.11-rc1 tag.
The Bluetooth controller of this device ships with a default address,
use the new CONFIG_FIXUP_BDADDR option to fix it up.
akonadi:?collection=30=INBOX
Acked-by: Maxime Ripard
Signed-off-by: Andre Heider
[Updated OrangePi 3 DT,
From: Andre Heider
Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3,
ship with the controller default address.
Add a config option to fix it up so it can function properly.
Signed-off-by: Andre Heider
Tested-by: Ondrej Jirman
Acked-by: Maxime Ripard
[rebased]
Signed-off-by:
From: Andre Heider
Refactor setup_environment() so we can use the created sid for a
Bluetooth address too.
Acked-by: Maxime Ripard
Reviewed-by: Andre Przywara
Signed-off-by: Andre Heider
[rebased]
Signed-off-by: Jernej Skrabec
---
board/sunxi/board.c | 121
This series introduces OrangePi 3 support.
Previous cover letter:
This is just refreshed v4 from here:
https://patchwork.ozlabs.org/project/uboot/list/?series=156657=*
Patches are only rebased, DT updated and defconfig regenerated, so
I kept old tags. Only difference with old version is that
Dne petek, 08. januar 2021 ob 03:01:42 CET je André Przywara napisal(a):
> On 03/12/2020 17:46, Jernej Skrabec wrote:
> > It turns out that in rare cases, current analytical approach to detect
> > correct DRAM bus width and rank on H6 doesn't work. On some TV boxes
> > with DDR3, incorrect DRAM
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