On Mon, Dec 13, 2021 at 10:32 PM Maxime Ripard wrote:
>
> On Fri, Dec 10, 2021 at 04:47:06PM +0530, Jagan Teki wrote:
> > Existing host driver will keep looking for DRM pointer in
> > sun6i_dsi_attach and defers even if the particular DSI device
> > is found for t
On Mon, Dec 13, 2021 at 10:48 PM Maxime Ripard wrote:
>
> On Fri, Dec 10, 2021 at 04:47:08PM +0530, Jagan Teki wrote:
> > Some display panels would come up with a non-DSI output, those
> > can have an option to connect the DSI host by means of interface
> > bridge con
R16 board has DLCP3433 DSI bridge for connecting TI DMD Projectors.
Enable support for it.
Note: This is for testing purpose, DLPC3433 not available in BPI-M2M.
Signed-off-by: Jagan Teki
---
.../boot/dts/sun8i-r16-bananapi-m2m-i2c.dts | 69 +++
1 file changed, 69 insertions
Bananapi S070WV20-CT16 is a pure RGB output panel with ICN6211
DSI/RGB convertor bridge.
Enable bridge along with associated panel.
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 64
1 file changed, 64 insertions(+)
diff --git a/arch/arm/boot
Bananapi S070WV20-CT16 is a pure RGB output panel with ICN6211
DSI/RGB convertor bridge.
Enable support for it.
Signed-off-by: Jagan Teki
---
.../boot/dts/sun8i-r16-bananapi-m2m-panel.dts | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r16
-I2C based downstream bridges.
Signed-off-by: Jagan Teki
---
Changes for v6:
- support donwstream bridge
- drop bridge conversion
- devm_drm_of_get_bridge() require child lookup
https://patchwork.kernel.org/project/dri-devel/cover/20211207054747.461029-1-ja...@amarulasolutions.com/
Changes for v5
si_attach
drm_of_find_panel_or_bridge
component_add
chipone_probe().done
sun6i_dsi_probe().start
mipi_dsi_host_register
sun6i_dsi_probe().done
Signed-off-by: Jagan Teki
---
Changes for v6:
- none
Changes for v5:
- new patch
drivers/gpu/drm/sun4i/sun6i_m
.
This patch prevents this situation by probing all DSI devices
on the pipeline first and then triggers the bind callback by
dropping exing DRM binding logic.
Signed-off-by: Jagan Teki
---
Changes for v6:
- none
Changes for v5:
- new patch
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 10
into sun6i_dsi_attach
Patch 3: Add Bridge driver
Patch 4: Add mode_set API
Patch 5: Enable DSI Panel
Patch 6: Enable DSI Bridge
Patch 7: Enable DSI Bridge (I2C)
[1]
https://patchwork.kernel.org/project/dri-devel/cover/20211122065223.88059-1-ja...@amarulasolutions.com/
Any inputs?
Jagan.
Jagan
On Sun, May 23, 2021 at 4:52 AM Andreas Rehn wrote:
>
> Add variant V3S_EMAC.
> Handle pinmux compile time error by skipping goio setup, because
> V3s uses internal phy and don't expose pins.
>
> Signed-off-by: Andreas Rehn
> ---
> Changes in v2:
> - skip pinmux and add proper
On Sat, May 22, 2021 at 1:36 AM Andreas Rehn wrote:
>
> Enable emac for licheepi-zero-dock as it provides a ethernet port
>
> Signed-off-by: Andreas Rehn
> ---
> arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git
On Fri, Nov 26, 2021 at 9:34 PM Maxime Ripard wrote:
>
> On Thu, Nov 25, 2021 at 09:44:14PM +0530, Jagan Teki wrote:
> > On Thu, Nov 25, 2021 at 9:40 PM Maxime Ripard wrote:
> > >
> > > On Thu, Nov 25, 2021 at 07:55:41PM +0530, Jagan Teki wrote:
> > > >
On Mon, Nov 22, 2021 at 8:34 PM Maxime Ripard wrote:
>
> On Mon, Nov 22, 2021 at 07:49:26PM +0530, Jagan Teki wrote:
> > On Mon, Nov 22, 2021 at 7:35 PM Maxime Ripard wrote:
> > > On Mon, Nov 22, 2021 at 07:18:13PM +0530, Jagan Teki wrote:
> > > > On Mon, Nov
On Thu, Nov 25, 2021 at 9:40 PM Maxime Ripard wrote:
>
> On Thu, Nov 25, 2021 at 07:55:41PM +0530, Jagan Teki wrote:
> > Hi,
> >
> > On Thu, Nov 25, 2021 at 7:45 PM Maxime Ripard wrote:
> > >
> > > On Wed, Nov 24, 2021 at 12:02:47AM +0530, Jagan Teki
Hi,
On Thu, Nov 25, 2021 at 7:45 PM Maxime Ripard wrote:
>
> On Wed, Nov 24, 2021 at 12:02:47AM +0530, Jagan Teki wrote:
> > > > > > > + dsi->panel = of_drm_find_panel(remote);
> > > > > > > + if (IS_ERR(dsi->p
Hi Maxime,
On Mon, Nov 22, 2021 at 7:49 PM Jagan Teki wrote:
>
> Hi Maxime,
>
> On Mon, Nov 22, 2021 at 7:35 PM Maxime Ripard wrote:
> >
> > On Mon, Nov 22, 2021 at 07:18:13PM +0530, Jagan Teki wrote:
> > > Hi Maxime,
> > >
> > > O
On Mon, Nov 22, 2021 at 8:36 PM Maxime Ripard wrote:
>
> On Mon, Nov 22, 2021 at 08:01:47PM +0530, Jagan Teki wrote:
> > On Mon, Nov 22, 2021 at 7:39 PM Maxime Ripard wrote:
> > >
> > > On Mon, Nov 22, 2021 at 07:21:57PM +0530, Jagan Teki wrote:
> > >
On Mon, Nov 22, 2021 at 7:39 PM Maxime Ripard wrote:
>
> On Mon, Nov 22, 2021 at 07:21:57PM +0530, Jagan Teki wrote:
> > > It's perfectly valid to dereference the pointer in atomic_enable, and
> > > that patch would consume memory for no particular reason.
> >
&
Hi Maxime,
On Mon, Nov 22, 2021 at 7:35 PM Maxime Ripard wrote:
>
> On Mon, Nov 22, 2021 at 07:18:13PM +0530, Jagan Teki wrote:
> > Hi Maxime,
> >
> > On Mon, Nov 22, 2021 at 3:37 PM Maxime Ripard wrote:
> > >
> > > On Mon, Nov 22, 2021 at 12:22:
Hi Maxime,
On Mon, Nov 22, 2021 at 6:58 PM Maxime Ripard wrote:
>
> On Mon, Nov 22, 2021 at 06:35:58PM +0530, Jagan Teki wrote:
> > On Mon, Nov 22, 2021 at 3:38 PM Maxime Ripard wrote:
> > >
> > > On Mon, Nov 22, 2021 at 12:22:20PM +0530, Jagan Teki wrote:
> &g
Hi Maxime,
On Mon, Nov 22, 2021 at 3:37 PM Maxime Ripard wrote:
>
> On Mon, Nov 22, 2021 at 12:22:19PM +0530, Jagan Teki wrote:
> > Some display panels would come up with a non-DSI output, those
> > can have an option to connect the DSI host by means of interface
&g
Hi Neil,
On Mon, Nov 22, 2021 at 6:22 PM Neil Armstrong wrote:
>
> On 22/11/2021 07:52, Jagan Teki wrote:
> > Some display panels would come up with a non-DSI output, those
> > can have an option to connect the DSI host by means of interface
> > bridge converter.
>
On Mon, Nov 22, 2021 at 3:38 PM Maxime Ripard wrote:
>
> On Mon, Nov 22, 2021 at 12:22:20PM +0530, Jagan Teki wrote:
> > Get the display mode settings via mode_set bridge function
> > instead of explicitly de-reference.
>
> What's wrong with dereferencing
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/sun8i-r16-renew-vista-e.dts | 79 +--
1 file changed, 73 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-r16-renew-vista-e.dts
b/arch/arm/boot/dts/sun8i-r16-renew-vista-e.dts
index d28b7b35a3c5..c3ee6a879ddb
Bananapi S070WV20-CT16 is a pure RGB output panel with ICN6211
DSI/RGB convertor bridge.
Enable bridge along with associated panel.
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 63
1 file changed, 63 insertions(+)
diff --git a/arch/arm/boot
This patch add support for Bananapi S070WV20-CT16 panel to
BPI-M2M board.
This specific DSI Bananapi S070WV20-CT16 panel driver is not
available in upstream, added for testing purpose.
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 40
1 file
Get the display mode settings via mode_set bridge function
instead of explicitly de-reference.
Signed-off-by: Jagan Teki
---
Changes for v5:
- new patch
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 12 +++-
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 1 +
2 files changed, 12 insertions(+), 1
.
This patch convert the existing to a drm bridge driver with a
built-in encoder support for compatibility with existing
component drivers.
Signed-off-by: Jagan Teki
---
Changes for v5:
- add atomic APIs
- find host and device variant DSI devices.
Changes for v4, v3:
- none
drivers/gpu/drm/sun4i
si_attach
drm_of_find_panel_or_bridge
component_add
chipone_probe().done
sun6i_dsi_probe().start
mipi_dsi_host_register
sun6i_dsi_probe().done
Signed-off-by: Jagan Teki
---
Changes for v5:
- new patch
drivers/gpu/drm/sun4i/sun6i_mipi_ds
.
This patch prevents this situation by probing all DSI devices
on the pipeline first and then triggers the bind callback by
dropping exing DRM binding logic.
Signed-off-by: Jagan Teki
---
Changes for v5:
- new patch
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 10 +-
drivers/gpu/drm/sun4i
the encoder to bridge driver
Patch 4: Add mode_set API
Patch 5: Enable DSI Panel
Patch 6: Enable DSI Bridge
Patch 7: Enable DSI Bridge (I2C)
[1] https://www.spinics.net/lists/arm-kernel/msg883560.html
Any inputs?
Jagan.
Jagan Teki (7):
drm: sun4i: dsi: Drop DRM bind race with bridge attach
On Tue, Apr 27, 2021 at 1:41 PM Andre Przywara wrote:
>
> On Tue, 27 Apr 2021 02:37:20 +0200
> Marek Vasut wrote:
>
> Hi,
>
> > On 4/27/21 2:03 AM, Andre Przywara wrote:
> > > As the comment in musb_regs.h describes, Allwinner saves the
> > > MUSB_CONFIGDATA register, which always return 0 on
oC as well.
> Also to make diagnosing this problem easier, print a warning if a board
> tries to setup MMC2 pins without a respective SoC setting being defined.
>
> Signed-off-by: Andre Przywara
> ---
Reviewed-by: Jagan Teki
--
You received this message because you are subscr
On Mon, Apr 26, 2021 at 4:57 PM Andre Przywara wrote:
>
> On Sun, 25 Apr 2021 18:03:05 +0530
> Jagan Teki wrote:
>
> Hi Jagan,
>
> thanks for your input!
>
> > On Sun, Apr 25, 2021 at 3:30 PM Andre Przywara
> > wrote:
> > >
> > > On Fri,
On Sun, Apr 25, 2021 at 3:30 PM Andre Przywara wrote:
>
> On Fri, 16 Apr 2021 12:08:09 +0100
> Andre Przywara wrote:
>
> Hi,
>
> > Commit 2243d19e5618 ("mmc: mmc-uclass: Use dev_seq() to read aliases
> > node's index") now actually enforces U-Boot's device enumeration policy,
> > where
On Tue, Mar 30, 2021 at 7:21 PM Samuel Holland wrote:
>
> On 3/30/21 8:28 AM, Jagan Teki wrote:
> > On Tue, Mar 30, 2021 at 6:31 PM Andre Przywara
> > wrote:
> >>
> >> Trusted Firmware now adds the /reserved-memory subnode to the DT at
> >
On Tue, Mar 30, 2021 at 6:31 PM Andre Przywara wrote:
>
> Trusted Firmware now adds the /reserved-memory subnode to the DT at
> runtime[1], putting in the right values.
>
> Drop our hard-coded version, as this might clash with the actual values
> (which have also changed), and rely on TF-A to add
Hi Laurent,
On Wed, Mar 24, 2021 at 3:09 PM Laurent Pinchart
wrote:
>
> Hi Jagan,
>
> On Wed, Mar 24, 2021 at 02:44:57PM +0530, Jagan Teki wrote:
> > On Wed, Mar 24, 2021 at 8:18 AM Samuel Holland wrote:
> > > On 3/23/21 5:53 PM, Laurent Pinchart wrote:
> > >
On Wed, Mar 24, 2021 at 8:18 AM Samuel Holland wrote:
>
> On 3/23/21 5:53 PM, Laurent Pinchart wrote:
> > Hi Jagan,
> >
> > Thank you for the patch.
> >
> > On Mon, Mar 22, 2021 at 07:31:49PM +0530, Jagan Teki wrote:
> >> Replace of_drm_find_panel with
Replace of_drm_find_panel with drm_of_find_panel_or_bridge
for finding panel, this indeed help to find the bridge if
bridge support added.
Added NULL in bridge argument, same will replace with bridge
parameter once bridge supported.
Signed-off-by: Jagan Teki
---
Changes for v4, v3:
- none
for bridge enable gpio pin
- PB7 gpio for lcd enable gpio pin
- PL4 gpio for backlight enable pin
Signed-off-by: Jagan Teki
---
Changes for v4:
- replace reset with enable-gpios
Changes for v3:
- none
arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 85
1 file changed, 85
DRM bridge drivers have build-in handling of treating all display
pipeline components as bridges.
So, convert the existing to a drm bridge driver with a built-in
encoder support for compatibility with existing component drivers.
Signed-off-by: Jagan Teki
---
Changes for v4:
- none
Changes
for bridge functionalities in Allwinner DSI
controller.
Cc: Samuel Holland
Signed-off-by: Jagan Teki
---
Note:
Samuel Holland, The existing kms hotplug dropped in order to
attach the bridge properly.
However, I did try several ways to support hotplug with the
bridge but it's resulting in a deadlock
on this would be appreciated!
Jagan.
Jagan Teki (4):
drm: sun4i: dsi: Use drm_of_find_panel_or_bridge
drm: sun4i: dsi: Add bridge support
drm: sun4i: dsi: Convert to bridge driver
[DO NOT MERGE] ARM: dts: sun8i: bananapi-m2m: Enable S070WV20-CT16 panel
arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts
On Sun, Mar 7, 2021 at 1:25 AM Jernej Skrabec wrote:
>
> Now that proper DM clock and reset driver exists for Display Engine 2
> and 3, remove all clock and reset related code and use appropriate
> framework instead.
>
> Signed-off-by: Jernej Skrabec
> ---
Reviewed-by:
On Sun, Mar 7, 2021 at 1:25 AM Jernej Skrabec wrote:
>
> These clocks and resets are needed for video drivers.
>
> Cc: Lukasz Majewski
> Signed-off-by: Jernej Skrabec
> ---
Reviewed-by: Jagan Teki
--
You received this message because you are subscribed to the Google Gr
> Signed-off-by: Jernej Skrabec
> ---
Reviewed-by: Jagan Teki
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsubscr...@googlegroups.com.
On Sun, Mar 7, 2021 at 1:25 AM Jernej Skrabec wrote:
>
> This commit adds standalone driver for DW HDMI PHY. It deprecates code
> which is included in sunxi dw-hdmi platform driver.
>
> Signed-off-by: Jernej Skrabec
> ---
> arch/arm/mach-sunxi/Kconfig | 1 +
>
other payloads can be
> transferred via FEL as well.
>
> Tested on A64, H5 and H6.
>
> Signed-off-by: Andre Przywara
> ---
Acked-by: Jagan Teki
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscrib
Reviewed-by: Simon Glass
Reviewed-by: Jagan Teki
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsubscr...@googlegroups.com.
To view this d
On Mon, Oct 26, 2020 at 7:46 PM Icenowy Zheng wrote:
>
> This patchset tries to add support for Allwinner V3/S3 and Pine64
> PineCube to U-Boot.
>
> First 3 patches adds support for Allwinner V3/S3 to U-Boot by expanding
> the code of V3s and add compatible strings to individual drivers.
>
> Then
On Mon, Oct 26, 2020 at 7:51 PM Icenowy Zheng wrote:
>
> PineCube is an IP camera development kit released by Pine64.
>
> It comes with the following compoents:
>
> - A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC,
> a power-only microUSB connector, a USB Type-A connector, a
On Thu, Jun 18, 2020 at 12:54 PM Maxime Ripard wrote:
>
> On Thu, Jun 18, 2020 at 01:54:37AM +0530, Jagan Teki wrote:
> > DM_VIDEO migration deadline is already expired, but around
> > 80 Allwinner boards are still using video in a legacy way.
> >
> >
.
Signed-off-by: Jagan Teki
---
Changes for v2:
- new patch
include/configs/sunxi-common.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 5b0bec0561..308d7a42aa 100644
--- a/include/configs/sunxi-common.h
+++ b
1920x1200 HDMI out.
Signed-off-by: Jagan Teki
---
Changes for v2:
- add BMP support
arch/arm/mach-sunxi/Kconfig | 4 +-
drivers/video/sunxi/sunxi_display.c | 264
include/configs/sunxi-common.h | 17 --
scripts/config_whitelist.txt| 1 -
4 files
Add sunxi logo which would be used for splash screen support.
The original images were the crapped version from linux-sunxi.org
and generated using below step
$ convert sunxi.jpg -type Palette -colors 224 -depth 8 \
-compress none -verbose BMP3:tools/logos/sunxi.bmp
Signed-off-by: Jagan Teki
://patchwork.ozlabs.org/project/uboot/list/?series=182477
http://patchwork.ozlabs.org/project/uboot/list/?series=182478
Changes for v2:
- new splash screen support patches
Any inputs?
Jagan.
Jagan Teki (3):
logos: Add sunxi logo
sunxi: Enable splash screen support
video: sunxi_display: Convert
1920x1200 HDMI out.
Cc: Maxime Ripard
Signed-off-by: Jagan Teki
---
Note: Existing video log would break since the similar
configuration of cfb_console will not build for DM_VIDEO.
Will try to send the splashscreen, in next version or the
next patches.
arch/arm/mach-sunxi/Kconfig | 3
On Wed, May 13, 2020 at 2:22 AM Roman Stratiienko
wrote:
>
> H6 SOC needs additional initialization of PHY registers. Corresponding
> changes can be found in the kernel patch [1].
>
> Without this changes there is no enumeration of 'musb' gadget.
>
> [1] -
>
On Tue, Jan 28, 2020 at 6:17 AM Andre Przywara wrote:
>
> This series enables the SPI booting feature for Allwinner R40 and H6
> SoCs. To achieve this, we enable our spl_spi_sunxi.c driver to deal
> with those two SoCs. The R40 is pretty straightforward, as it just needs
> its base address
On Mon, Jan 27, 2020 at 6:59 AM André Przywara wrote:
>
> On 21/01/2020 08:20, Jagan Teki wrote:
>
> Hi Jagan,
>
> first: many thanks for merging those other patches of mine, much
> appreciated!
>
> > On Mon, Jan 6, 2020 at 6:59 AM Andre Przywara
> > w
On Fri, Jan 10, 2020 at 7:17 AM Andre Przywara wrote:
>
> The Allwinner Boot ROM on all later SoCs can load the initial SPL code
> from offset 128KB or from offset 8KB of an SD card or eMMC.
> We support this in the SPL for a while now, but so far needed to manually
> adjust the U-Boot image MMC
On Thu, Jan 2, 2020 at 5:15 AM Andre Przywara wrote:
>
> This series enables the USB ports on boards with the Allwinner R40 SoC,
> also updates the Bananapi M2 Berry board support.
> Patch 1/4 updates the M2 Berry .dts file, so that we get the USB and
> Ethernet nodes that we need to enable
On Mon, Jan 6, 2020 at 6:59 AM Andre Przywara wrote:
>
> For Allwinner SoCs the CONFIG_SYS_SPI_U_BOOT_OFFS value is not really a
> board choice: The boot ROM only loads the SPL from offset 0 of the SPI
> NOR flash, and loads at most 32KB. This is a similar situation as on MMC,
> so consequently
On Thu, Jan 2, 2020 at 5:15 AM Andre Przywara wrote:
>
> Update the .dts file from the kernel, which carries much more nodes,
> some of them we need to enable USB and Ethernet support for the board.
>
> Signed-off-by: Andre Przywara
> ---
Would be better to have all R40 files to sync at the
On Mon, Jan 6, 2020 at 6:59 AM Andre Przywara wrote:
>
> So far we were using the CONFIG_SUNXI_GEN_SUN6I symbol to select between
> the two SPI controller generations used on Allwinner SoCs. This is a
> convenience symbol to roughly differentiate between "older" and "newer"
> generation of SoCs.
On Thu, Jan 2, 2020 at 9:17 PM Maxime Ripard wrote:
>
> On Thu, Jan 02, 2020 at 09:10:31PM +0530, Jagan Teki wrote:
> > On Thu, Jan 2, 2020 at 4:24 PM Maxime Ripard wrote:
> > >
> > > On Tue, Dec 31, 2019 at 06:35:21PM +0530, Jagan Teki wrote:
> > > >
On Thu, Jan 2, 2020 at 4:33 PM Maxime Ripard wrote:
>
> On Tue, Dec 31, 2019 at 06:35:25PM +0530, Jagan Teki wrote:
> > The MIPI DSI PHY controller on Allwinner R40 is similar
> > on the one on A31.
> >
> > Add R40 compatible and append A31 compatible as fallback
On Thu, Jan 2, 2020 at 4:24 PM Maxime Ripard wrote:
>
> On Tue, Dec 31, 2019 at 06:35:21PM +0530, Jagan Teki wrote:
> > TCON LCD0, LCD1 in allwinner R40, are used for managing
> > LCD interfaces like RGB, LVDS and DSI.
> >
> > Like TCON TV0, TV1 these LCD0, LCD1 are
The MIPI DSI PHY controller on Allwinner R40 is similar
on the one on A31.
Add R40 compatible and append A31 compatible as fallback.
Signed-off-by: Jagan Teki
---
Changes for v3:
- update the binding in new yaml format
.../devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml | 1 +
1
with tcon_top for upper pipeline
connections and dsi block for lower pipeline connections.
So, this patch created that pipeline by adding new nodes
for tcon_lcd0, dsi, dphy and connet them to make proper
pipeline fitting.
Signed-off-by: Jagan Teki
---
Changes for v3:
- drop clock-names in dsi node
tcon_tv0, tcon_tv1 nodes have a clock names of tcon-ch0,
tcon-ch1 which are referring tcon_top clocks via index
numbers like 0, 1 with CLK_TCON_TV0 and CLK_TCON_TV1
respectively.
Use the macro in place of index numbers, for more code
readability.
Signed-off-by: Jagan Teki
Reviewed-by: Chen-Yu
-by: Jagan Teki
---
Changes for v3:
- none
drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index 75d8e60c149d..e0b3c5330b9a 100644
--- a/drivers/gpu
the DSI
clock gate.
Signed-off-by: Jagan Teki
---
Changes for v3:
- fixed comments from Chen-Yu
- move reset control methods into probe
drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 41 +-
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/sun4i
This patch add support for Bananapi S070WV20-CT16 DSI panel to
BPI-M2U board.
DSI panel connected via board DSI port with,
- DCDC1 as VCC-DSI supply
- PH18 gpio for lcd enable pin
- PD17 gpio for lcd reset pin
- PD16 gpio for backlight enable pin
Signed-off-by: Jagan Teki
---
Changes for v3
The MIPI DSI controller on Allwinner R40 is similar on
the one on A64 like doesn't associate any DSI_SCLK gating.
So, add R40 compatible and append A64 compatible as fallback.
Signed-off-by: Jagan Teki
---
Changes for v3:
- update the binding in new yaml format
.../bindings/display/allwinner
://patchwork.freedesktop.org/series/62062/
Any inputs?
Jagan.
Jagan Teki (9):
dt-bindings: display: Add TCON LCD compatible for R40
drm/sun4i: tcon: Add TCON LCD support for R40
ARM: dts: sun8i: r40: Use tcon top clock index macros
drm/sun4i: tcon_top: Use clock name index macros
drm/sun4i: tcon_top: Register
TCON LCD0, LCD1 in allwinner R40, are used for managing
LCD interfaces like RGB, LVDS and DSI.
Like TCON TV0, TV1 these LCD0, LCD1 are also managed via
tcon top.
Add support for it, in tcon driver.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
drivers/gpu/drm/sun4i/sun4i_tcon.c | 8
Like TCON TV0, TV1 allwinner R40 has TCON LCD0, LCD1 which
are managed via TCON TOP.
Add tcon lcd compatible R40, the same compatible can handle
TCON LCD0, LCD1.
Signed-off-by: Jagan Teki
Acked-by: Chen-Yu Tsai
Reviewed-by: Rob Herring
---
Changes for v3:
- none
Documentation/devicetree
On Thu, Dec 26, 2019 at 3:08 PM Maxime Ripard wrote:
>
> On Sun, Dec 22, 2019 at 06:52:22PM +0530, Jagan Teki wrote:
> > This is v14 version for Allwinner A64 MIPI-DSI support
> > and here is the previous version set[1]
>
> I applied the patches 1 to 6, and f
This patch add support for Bananapi S070WV20-CT16 DSI panel to
BPI-M64 board.
DSI panel connected via board DSI port with,
- DLDO1 as VCC-DSI supply
- DCDC1 as VDD supply
- PD7 gpio for lcd enable pin
- PD6 gpio for lcd reset pin
- PD5 gpio for backlight enable pin
Signed-off-by: Jagan Teki
The MIPI DSI controller in Allwinner A64 is similar to A33.
But unlike A33, A64 doesn't have DSI_SCLK gating so add compatible
for Allwinner A64 with uninitialized has_mod_clk driver.
Signed-off-by: Jagan Teki
Tested-by: Merlijn Wajer
---
Changes for v14:
- none
drivers/gpu/drm/sun4i
The MIPI DSI PHY controller on Allwinner A64 is similar
on the one on A31.
Add A64 compatible and append A31 compatible as fallback.
Reviewed-by: Rob Herring
Signed-off-by: Jagan Teki
---
Changes for v14:
- none
.../bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml | 6 +-
1 file
-by: Jagan Teki
Tested-by: Merlijn Wajer
---
Changes for v14:
- none
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 27e48234f1c2
As per the user manual, look like mod clock is not mandatory
for all Allwinner MIPI DSI controllers, it is connected to
CLK_DSI_SCLK for A31 and not available in A64.
So, add compatible check for A31 and get mod clock accordingly.
Tested-by: Merlijn Wajer
Signed-off-by: Jagan Teki
---
Changes
"NULL" during clock enablement
between controllers, this patch add generic code to handle
the bus clock using regmap_mmio_attach_clk with associated
regmap APIs.
Signed-off-by: Jagan Teki
---
Changes for v14:
- drop regmap_exit, clk_put
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 37
side w/o this change)
- create separate function for vblk computation
- enable vcc-dsi regulator in dsi_runtime_resume
- collect Rob, Acked-by
- update MAINTAINERS file for panel drivers
- cleanup commit messages
- fixed checkpatch warnings/errors
[1] https://patchwork.freedesktop.org/series/711
minimum of 1 clock like the bus clock
- A33 require minimum of 2 clocks like both bus, mod clocks
So, update dt-bindings so-that it can document both A33,
A64 bindings requirements.
Reviewed-by: Rob Herring
Signed-off-by: Jagan Teki
---
Changes for v14:
- none
.../display/allwinner,sun6i-a31-mipi
On Thu, Dec 19, 2019 at 3:35 AM Maxime Ripard wrote:
>
> On Thu, Dec 19, 2019 at 12:40:14AM +0530, Jagan Teki wrote:
> > regmap has special API to enable the controller bus clock while
> > initializing register space, and current driver is using
> > devm_regmap_ini
This patch add support for Bananapi S070WV20-CT16 DSI panel to
BPI-M64 board.
DSI panel connected via board DSI port with,
- DLDO1 as VCC-DSI supply
- DCDC1 as VDD supply
- PD7 gpio for lcd enable pin
- PD6 gpio for lcd reset pin
- PD5 gpio for backlight enable pin
Signed-off-by: Jagan Teki
minimum of 1 clock like the bus clock
- A33 require minimum of 2 clocks like both bus, mod clocks
So, update dt-bindings so-that it can document both A33,
A64 bindings requirements.
Reviewed-by: Rob Herring
Signed-off-by: Jagan Teki
---
Changes for v13:
- Add if statement for A64 with single clock
"NULL" during clock enablement
between controllers, this patch add generic code to handle
the bus clock using regmap_mmio_attach_clk with associated
regmap APIs.
Signed-off-by: Jagan Teki
---
Changes for v13:
- update the changes since has_mod_clk is dropped in previous patch
drivers/
-by: Jagan Teki
Tested-by: Merlijn Wajer
---
Changes for v13:
- none
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 27e48234f1c2
The MIPI DSI PHY controller on Allwinner A64 is similar
on the one on A31.
Add A64 compatible and append A31 compatible as fallback.
Reviewed-by: Rob Herring
Signed-off-by: Jagan Teki
---
Changes for v13:
- collect Rob review tag
.../bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
The MIPI DSI controller in Allwinner A64 is similar to A33.
But unlike A33, A64 doesn't have DSI_SCLK gating so add compatible
for Allwinner A64 with uninitialized has_mod_clk driver.
Signed-off-by: Jagan Teki
Tested-by: Merlijn Wajer
---
Changes for v13:
- update the changes since has_mod_clk
vblk computation
- enable vcc-dsi regulator in dsi_runtime_resume
- collect Rob, Acked-by
- update MAINTAINERS file for panel drivers
- cleanup commit messages
- fixed checkpatch warnings/errors
[1] https://patchwork.freedesktop.org/series/70361/
Any inputs?
Jagan.
Jagan Teki (7):
dt-bindings
As per the user manual, look like mod clock is not mandatory
for all Allwinner MIPI DSI controllers, it is connected to
CLK_DSI_SCLK for A31 and not available in A64.
So, add compatible check for A31 and get mod clock accordingly.
Tested-by: Merlijn Wajer
Signed-off-by: Jagan Teki
---
Changes
On Tue, Dec 17, 2019 at 12:04 AM Maxime Ripard wrote:
>
> On Mon, Dec 16, 2019 at 10:29:08PM +0530, Jagan Teki wrote:
> > On Mon, Dec 16, 2019 at 4:50 PM Maxime Ripard wrote:
> > >
> > > On Mon, Dec 16, 2019 at 04:37:20PM +0530, Jagan Teki wrote:
> > >
On Mon, Dec 16, 2019 at 4:50 PM Maxime Ripard wrote:
>
> On Mon, Dec 16, 2019 at 04:37:20PM +0530, Jagan Teki wrote:
> > On Wed, Dec 4, 2019 at 7:06 PM Maxime Ripard wrote:
> > >
> > > On Tue, Dec 03, 2019 at 07:18:10PM +0530, Jagan Teki wrote:
> > > >
On Wed, Dec 4, 2019 at 7:06 PM Maxime Ripard wrote:
>
> On Tue, Dec 03, 2019 at 07:18:10PM +0530, Jagan Teki wrote:
> > The MIPI DSI controller in Allwinner A64 is similar to A33.
> >
> > But unlike A33, A64 doesn't have DSI_SCLK gating so it is valid
> > to ha
1 - 100 of 1244 matches
Mail list logo
