The other existing designware glue files are under board/*.

Marek requested that it move out of drivers/net as part of upstream
review. His suggestion was to move to arch/arm/.../sunxi but I found all
the others under board/*

Signed-off-by: Ian Campbell <i...@hellion.org.uk>
---
 board/sunxi/Makefile     |  1 +
 board/sunxi/gmac.c       | 43 +++++++++++++++++++++++++++++++++++++++++++
 drivers/net/Makefile     |  1 -
 drivers/net/sunxi_gmac.c | 43 -------------------------------------------
 4 files changed, 44 insertions(+), 44 deletions(-)
 create mode 100644 board/sunxi/gmac.c
 delete mode 100644 drivers/net/sunxi_gmac.c

diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index bed033b..99445bf 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -9,6 +9,7 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 obj-y  += board.o
+obj-$(CONFIG_SUNXI_GMAC)       += gmac.o
 obj-$(CONFIG_A10_MID_1GB)      += dram_sun4i_360_1024_iow16.o
 obj-$(CONFIG_A10_OLINUXINO_L)  += dram_a10_olinuxino_l.o
 obj-$(CONFIG_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
new file mode 100644
index 0000000..e7ff952
--- /dev/null
+++ b/board/sunxi/gmac.c
@@ -0,0 +1,43 @@
+#include <common.h>
+#include <netdev.h>
+#include <miiphy.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/gpio.h>
+
+int sunxi_gmac_initialize(bd_t *bis)
+{
+       int pin;
+       struct sunxi_ccm_reg *const ccm =
+               (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+       /* Set up clock gating */
+       setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
+
+       /* Set MII clock */
+#ifdef CONFIG_RGMII
+       setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
+               CCM_GMAC_CTRL_GPIT_RGMII);
+#else
+       setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_MII |
+               CCM_GMAC_CTRL_GPIT_MII);
+#endif
+
+       /* Configure pin mux settings for GMAC */
+       for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) {
+#ifdef CONFIG_RGMII
+               /* skip unused pins in RGMII mode */
+               if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
+                       continue;
+#endif
+               sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC);
+               sunxi_gpio_set_drv(pin, 3);
+       }
+
+#ifdef CONFIG_RGMII
+       return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
+#else
+       return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII);
+#endif
+}
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 136479d..d905fef 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -51,7 +51,6 @@ obj-$(CONFIG_SH_ETHER) += sh_eth.o
 obj-$(CONFIG_SMC91111) += smc91111.o
 obj-$(CONFIG_SMC911X) += smc911x.o
 obj-$(CONFIG_SUNXI_EMAC) += sunxi_emac.o
-obj-$(CONFIG_SUNXI_GMAC) += sunxi_gmac.o
 obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
 obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o
 obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o
diff --git a/drivers/net/sunxi_gmac.c b/drivers/net/sunxi_gmac.c
deleted file mode 100644
index e7ff952..0000000
--- a/drivers/net/sunxi_gmac.c
+++ /dev/null
@@ -1,43 +0,0 @@
-#include <common.h>
-#include <netdev.h>
-#include <miiphy.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/gpio.h>
-
-int sunxi_gmac_initialize(bd_t *bis)
-{
-       int pin;
-       struct sunxi_ccm_reg *const ccm =
-               (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-
-       /* Set up clock gating */
-       setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
-
-       /* Set MII clock */
-#ifdef CONFIG_RGMII
-       setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
-               CCM_GMAC_CTRL_GPIT_RGMII);
-#else
-       setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_MII |
-               CCM_GMAC_CTRL_GPIT_MII);
-#endif
-
-       /* Configure pin mux settings for GMAC */
-       for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) {
-#ifdef CONFIG_RGMII
-               /* skip unused pins in RGMII mode */
-               if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
-                       continue;
-#endif
-               sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC);
-               sunxi_gpio_set_drv(pin, 3);
-       }
-
-#ifdef CONFIG_RGMII
-       return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
-#else
-       return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII);
-#endif
-}
-- 
1.9.0

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