Re: [linux-sunxi] Toggeling LDO3 causes crash/shutdown of the AXP209. Some verification help needed.

Hey Lub, On 28-02-17 07:43, Lyubcho Haralanov wrote: It seems like what Marcus suggested (turning off LDO3, setting voltage to minimum 0.7V, then turning on LDO3 and then increasing the voltage to 2.8V) works fine with the LIME2: i2c mw 0x34 0x12 0x1f i2c mw 0x34 0x29 0x00 i2c mw 0x34 0x12

[linux-sunxi] Re: [PATCH v5 2/3] nvmem: sunxi-sid: add support for H3's SID controller

28.02.2017, 14:43, "Maxime Ripard" : > On Tue, Feb 28, 2017 at 03:27:14AM +0800, Icenowy Zheng wrote: >>  The H3 SoC have a bigger SID controller, which has its direct read >>  address at 0x200 position in the SID block, not 0x0. >> >>  Also, H3 SID controller

[linux-sunxi] Re: [PATCH 2/4] clk: sunxi-ng: Add sun7i-a20 CCU driver

Hi, On Mon, Feb 27, 2017 at 11:09:12PM +0200, Priit Laes wrote: > Introduce a clock controller driver for sun7i A20 SoC. > > Signed-off-by: Priit Laes > --- > drivers/clk/sunxi-ng/Kconfig | 11 + > drivers/clk/sunxi-ng/Makefile|1 + >

[linux-sunxi] Re: [PATCH v5 2/3] nvmem: sunxi-sid: add support for H3's SID controller

On Tue, Feb 28, 2017 at 04:35:31PM +0800, Icenowy Zheng wrote: > > > 28.02.2017, 14:43, "Maxime Ripard" : > > On Tue, Feb 28, 2017 at 03:27:14AM +0800, Icenowy Zheng wrote: > >>  The H3 SoC have a bigger SID controller, which has its direct read > >>  address at

Re: [linux-sunxi] Re: [sunxi-tools PATCH] fel: add smc command

Hi, On 28/02/17 03:08, Siarhei Siamashka wrote: > On Mon, 27 Feb 2017 20:55:53 + > Andre Przywara wrote: > >> On Mon, 27 Feb 2017 05:48:48 +0200 >> Siarhei Siamashka wrote: >> >>> On Mon, 27 Feb 2017 02:22:08 + >>> André Przywara

[linux-sunxi] Re: [U-Boot] [PATCH v3 1/3] sunxi: add basic V3s support

On Mon, Feb 13, 2017 at 12:44 PM, Maxime Ripard wrote: > On Sat, Feb 11, 2017 at 07:11:00PM +0800, Icenowy Zheng wrote: >> Basic U-Boot support is now present for V3s. >> >> Some memory addresses are changed specially for V3s, as the original >> address map

[linux-sunxi] Re: [U-Boot] [PATCH v3 3/3] sunxi: add support for Lichee Pi Zero

On Sat, Feb 11, 2017 at 4:41 PM, Icenowy Zheng wrote: > Lichee Pi Zero is a development board with a V3s SoC. > > Add support for it. Add some details about board/features ? thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer

[linux-sunxi] [PATCH 1/3] phy: sun4i-usb: support automatically switch PHY0 route to MUSB/HCI

On newer Allwinner SoCs (H3 and after), the PHY0 node is routed to both MUSB controller for peripheral and host support (the host support is slightly broken), and a pair of EHCI/OHCI controllers, which provide a better support for host mode. Add support for automatically switch the route of PHY0

[linux-sunxi] [PATCH 2/3] ARM: dts: sun8i: add usb_otg and OHCI/EHCI for usbc0 on H3

Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI or MUSB controller. Add device nodes for these controllers. Signed-off-by: Icenowy Zheng --- arch/arm/boot/dts/sun8i-h3.dtsi | 36 1 file changed, 36 insertions(+)

[linux-sunxi] Re: [PATCH v4 1/9] pwm: sunxi: Use regmap API for register access.

On Mon, Feb 27, 2017 at 02:22:02PM +0300, Siarhei Volkau wrote: > Hi, Maxime > > 2017-02-27 12:17 GMT+03:00 Maxime Ripard : > > Hi Siarhei, > > > > On Fri, Feb 24, 2017 at 08:41:08AM +0300, lis8...@gmail.com wrote: > >> From: Siarhei Volkau >

[linux-sunxi] Re: [PATCH v4 2/9] pwm: sunxi: Use regmap fields for bit operations.

On Mon, Feb 27, 2017 at 02:41:10PM +0300, Siarhei Volkau wrote: > Hi, > > 2017-02-27 12:28 GMT+03:00 Maxime Ripard : > > > > Hi, > > > > On Fri, Feb 24, 2017 at 08:41:09AM +0300, lis8...@gmail.com wrote: > > > +static const struct reg_field > > >

Re: [linux-sunxi] [PATCH 2/3] ARM: dts: sun8i: add usb_otg and OHCI/EHCI for usbc0 on H3

28.02.2017, 23:46, "Chen-Yu Tsai" : > On Tue, Feb 28, 2017 at 11:27 PM, Icenowy Zheng wrote: >>  Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI >>  or MUSB controller. >> >>  Add device nodes for these controllers. >> >>  Signed-off-by:

[linux-sunxi] [PATCH 3/3] ARM: dts: sun8i: enable USB OTG on Orange Pi One

Orange Pi One features a MicroUSB port that can work in both host mode and peripheral mode. When in host mode, its VBUS is controlled via a GPIO; when in peripheral mode, its VBUS cannot be used to power up the board. Add support for this port. Signed-off-by: Icenowy Zheng

[linux-sunxi] Re: [PATCH v4 8/9] pwm: sunxi: Code cleanup.

On Mon, Feb 27, 2017 at 04:21:49PM +0300, Siarhei Volkau wrote: > Hi, > > 2017-02-27 12:32 GMT+03:00 Maxime Ripard : > > On Fri, Feb 24, 2017 at 08:41:15AM +0300, lis8...@gmail.com wrote: > >> From: Siarhei Volkau > >> > >> This patch removes

Re: [linux-sunxi] [PATCH 2/3] ARM: dts: sun8i: add usb_otg and OHCI/EHCI for usbc0 on H3

On Tue, Feb 28, 2017 at 11:57 PM, Icenowy Zheng wrote: > > > 28.02.2017, 23:46, "Chen-Yu Tsai" : >> On Tue, Feb 28, 2017 at 11:27 PM, Icenowy Zheng wrote: >>> Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI >>> or MUSB

[linux-sunxi] Re: [PATCH v4 4/9] pwm: sunxi: Customizable control and period register position.

On Mon, Feb 27, 2017 at 03:35:04PM +0300, Siarhei Volkau wrote: > Hi, > > 2017-02-27 12:30 GMT+03:00 Maxime Ripard : > > On Fri, Feb 24, 2017 at 08:41:11AM +0300, lis8...@gmail.com wrote: > >> From: Siarhei Volkau > >> > >> sun6i has same

Re: [linux-sunxi] [PATCH 2/3] ARM: dts: sun8i: add usb_otg and OHCI/EHCI for usbc0 on H3

28.02.2017, 23:46, "Chen-Yu Tsai" : > On Tue, Feb 28, 2017 at 11:27 PM, Icenowy Zheng wrote: >>  Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI >>  or MUSB controller. >> >>  Add device nodes for these controllers. >> >>  Signed-off-by:

Re: [linux-sunxi] [PATCH 1/3] phy: sun4i-usb: support automatically switch PHY0 route to MUSB/HCI

On Tue, Feb 28, 2017 at 11:27 PM, Icenowy Zheng wrote: > On newer Allwinner SoCs (H3 and after), the PHY0 node is routed to both > MUSB controller for peripheral and host support (the host support is > slightly broken), and a pair of EHCI/OHCI controllers, which provide a >

Re: [linux-sunxi] [PATCH 2/3] ARM: dts: sun8i: add usb_otg and OHCI/EHCI for usbc0 on H3

On Tue, Feb 28, 2017 at 11:27 PM, Icenowy Zheng wrote: > Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI > or MUSB controller. > > Add device nodes for these controllers. > > Signed-off-by: Icenowy Zheng > --- >

Re: [linux-sunxi] Toggeling LDO3 causes crash/shutdown of the AXP209. Some verification help needed.

The question that really bugs me is: why toggling LDO4 doesn't affect the board but toggling LDO3 kills it... On Tuesday, February 28, 2017 at 10:43:08 AM UTC+2, Olliver Schinagl wrote: > > Hey Lub, > > On 28-02-17 07:43, Lyubcho Haralanov wrote: > > It seems like what Marcus suggested

Re: [linux-sunxi] Toggeling LDO3 causes crash/shutdown of the AXP209. Some verification help needed.

2017-02-28 13:19 GMT+01:00 Lyubcho Haralanov : > The question that really bugs me is: why toggling LDO4 doesn't affect the > board but toggling LDO3 kills it... > Can you measure the time it takes LDO3 and LDO4 to ramp to up the their final value? LDO4 seems to have a

Re: [linux-sunxi] [PATCH 2/3] ARM: dts: sun8i: add usb_otg and OHCI/EHCI for usbc0 on H3

01.03.2017, 00:10, "Chen-Yu Tsai" : > On Tue, Feb 28, 2017 at 11:57 PM, Icenowy Zheng wrote: >>  28.02.2017, 23:46, "Chen-Yu Tsai" : >>>  On Tue, Feb 28, 2017 at 11:27 PM, Icenowy Zheng wrote:   Allwinner H3 have a

Re: [linux-sunxi] [PATCH 3/4] ARM: sun7i: Convert to CCU

Hi, I spotted a couple of things here on a quick look, see below El 27/02/17 a las 18:09, Priit Laes escribió: > Convert sun7i-a20.dtsi to new CCU driver. > > Signed-off-by: Priit Laes > --- > arch/arm/boot/dts/sun7i-a20.dtsi | 719 > +-- >

[linux-sunxi] [PATCH 3/5] dt-bindings: fix for Allwinner H5 pinctrl's compatible

The compatible for Allwinner H5 pin controller is wrong written as allwinner,sun50i-h5-r-pinctrl, however, it's really a generic pinctrl rather than a "r" one. Fix this compatible string. Signed-off-by: Icenowy Zheng ---

[linux-sunxi] [PATCH 1/5] pinctrl: sunxi: refactor pinctrl choice selecting for ARM64

ARM64 Allwinner SoCs used to have every pinctrl driver selected in ARCH_SUNXI. Change this to make their default value to (ARM64 && ARCH_SUNXI). Signed-off-by: Icenowy Zheng --- drivers/pinctrl/sunxi/Kconfig | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff

[linux-sunxi] [PATCH 2/5] arm64: only select PINCTRL_SUNXI for Allwinner platforms

As the pinctrl driver selecting is refactored in Kconfig file of pinctrl-sunxi, now we can select only PINCTRL_SUNXI for Allwinner platform, and the default value of several pinctrl drivers useful on ARM64 Allwinner SoCs will become Y. Drop the select of per-SoC pinctrl choices, but select

[linux-sunxi] [PATCH 5/5] pinctrl: sunxi: Add A64 R_PIO controller support

The A64 has a R_PIO pin controller, similar to the one found on the H3 SoC. Add support for the pins controlled by the R_PIO controller. Signed-off-by: Icenowy Zheng --- drivers/pinctrl/sunxi/Kconfig| 5 + drivers/pinctrl/sunxi/Makefile | 1 +

[linux-sunxi] [PATCH 4/5] dt: bindings: add binding for Allwinner A64 R_PIO pinctrl

Allwinner A64 SoC has also a dedicated pin controller for Port L GPIOs, which is called "Port Controller (CPUs-PORT)" in SoC User Manual. Add a binding for this pin controller, like the ones in A23/33 and H3. Signed-off-by: Icenowy Zheng ---

Re: [linux-sunxi] [PATCH 2/5] arm64: only select PINCTRL_SUNXI for Allwinner platforms

Hi, On 28/02/17 17:24, Icenowy Zheng wrote: > As the pinctrl driver selecting is refactored in Kconfig file of > pinctrl-sunxi, now we can select only PINCTRL_SUNXI for Allwinner > platform, and the default value of several pinctrl drivers useful on > ARM64 Allwinner SoCs will become Y. > > Drop

Re: [linux-sunxi] [PATCH 1/5] pinctrl: sunxi: refactor pinctrl choice selecting for ARM64

Hi Icenowy, (first thing: could you create your series with --cover-letter and fill this in? There you could explain what this series is about and also state things like dependencies from other patches and the commit that you based that on.) On 28/02/17 17:24, Icenowy Zheng wrote: > ARM64

Re: [linux-sunxi] [PATCH 5/5] pinctrl: sunxi: Add A64 R_PIO controller support

Hi, On 28/02/17 17:24, Icenowy Zheng wrote: > The A64 has a R_PIO pin controller, similar to the one found on the H3 SoC. > Add support for the pins controlled by the R_PIO controller. > > Signed-off-by: Icenowy Zheng > --- > drivers/pinctrl/sunxi/Kconfig| 5

Re: [linux-sunxi] Re: [sunxi-tools PATCH] fel: add smc command

On Tue, 28 Feb 2017 09:16:11 + Andre Przywara wrote: > Hi, > > On 28/02/17 03:08, Siarhei Siamashka wrote: > > On Mon, 27 Feb 2017 20:55:53 + > > Andre Przywara wrote: > > > >> On Mon, 27 Feb 2017 05:48:48 +0200 > >> Siarhei Siamashka

[linux-sunxi] Re: [PATCH 1/3] phy: sun4i-usb: support automatically switch PHY0 route to MUSB/HCI

Hi, On 28-02-17 16:27, Icenowy Zheng wrote: On newer Allwinner SoCs (H3 and after), the PHY0 node is routed to both MUSB controller for peripheral and host support (the host support is slightly broken), and a pair of EHCI/OHCI controllers, which provide a better support for host mode. Add

[linux-sunxi] Re: [PATCH] arm64: dts: allwinner: add support for Pinebook

On Sat, Feb 25, 2017 at 1:00 AM, Icenowy Zheng wrote: > Pinebook is a A64-based laptop produced by Pine64, with the following > peripherals: > > USB: > - Two external USB ports (one is directly connected to A64's OTG > controller, the other is under a internal hub connected to

Re: [linux-sunxi] [PATCH 2/5] arm64: only select PINCTRL_SUNXI for Allwinner platforms

01.03.2017, 02:17, "Andre Przywara" : > Hi, > > On 28/02/17 17:24, Icenowy Zheng wrote: >>  As the pinctrl driver selecting is refactored in Kconfig file of >>  pinctrl-sunxi, now we can select only PINCTRL_SUNXI for Allwinner >>  platform, and the default value of

Re: [linux-sunxi] [PATCH 1/5] pinctrl: sunxi: refactor pinctrl choice selecting for ARM64

01.03.2017, 02:15, "Andre Przywara" : > Hi Icenowy, > > (first thing: could you create your series with --cover-letter and fill > this in? There you could explain what this series is about and also > state things like dependencies from other patches and the commit that >

Re: [linux-sunxi] [PATCH 5/5] pinctrl: sunxi: Add A64 R_PIO controller support

01.03.2017, 02:27, "Andre Przywara" : > Hi, > > On 28/02/17 17:24, Icenowy Zheng wrote: >>  The A64 has a R_PIO pin controller, similar to the one found on the H3 SoC. >>  Add support for the pins controlled by the R_PIO controller. >> >>  Signed-off-by: Icenowy Zheng

[linux-sunxi] [PATCH] pinctrl: sunxi: select GPIOLIB

Allwinner pin controllers are also GPIO controllers. Currently, if GPIOLIB is forgot to be chosen, the build of pinctrl-sunxi.c will fail for lacking a lot of gpiochip_* functions. Select GPIOLIB to ensure this driver can be built. Signed-off-by: Icenowy Zheng --- This bug is

[linux-sunxi] [PATCH 13/17] sunxi: A64: Pine64: introduce FIT generator script

Now that the Makefile can call a generator script to build a more advanced FIT image, let's use this feature to address the needs of Allwinner A64 boards. The (DTB stripped) U-Boot binary and the ATF are static, but we allow an arbitrary number of supported device trees to be passed. The script

[linux-sunxi] [PATCH 05/17] SPL: FIT: allow loading multiple images

So far we were not using the FIT image format to its full potential: The SPL FIT loader was just loading the first image from the /images node plus one of the listed DTBs. Now with the refactored loader code it's easy to load an arbitrary number of images in addition to the two mentioned above. As

[linux-sunxi] [PATCH 03/17] SPL: FIT: rework U-Boot image loading

Currently the SPL FIT loader always looks only for the first image in the /images node a FIT tree, which it loads and later executes. Generalize this by looking for a "firmware" property in the matched configuration subnode, or, if that does not exist, for the first string in the "loadables"

[linux-sunxi] [PATCH 02/17] SPL: FIT: refactor FDT loading

Currently the SPL FIT loader uses the spl_fit_select_fdt() function to find the offset to the right DTB within the FIT image. For this it iterates over all subnodes of the /configuration node in the FIT tree and compares all "description" strings therein using a board specific matching function.

[linux-sunxi] [PATCH 15/17] sunxi: OrangePi-PC2: defconfig: enable SPL FIT support

Enable the SPL FIT support and the FIT generator script for the OrangePi PC2 board, as it also need to load an ATF binary. Signed-off-by: Andre Przywara --- configs/orangepi_pc2_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git

[linux-sunxi] [PATCH 12/17] Makefile: add rules to generate SPL FIT images

Some platforms require more complex U-Boot images than we can easily generate via the mkimage command line, for instance to load additional image files. Introduce a CONFIG_SPL_FIT_SOURCE and CONFIG_SPL_FIT_GENERATOR symbol, which can either hold an .its source file describing the image layout, or,

[linux-sunxi] [PATCH 09/17] sunxi: A64: move SPL stack to end of SRAM A2

The SPL stack is usually located at the end of SRAM A1, where it grows towards the end of the SPL. For the really big AArch64 binaries the stack overwrites code pretty soon, so move the SPL stack to the end of SRAM A2, which is unused at this time. Signed-off-by: Andre Przywara

[linux-sunxi] [PATCH 08/17] armv8: fsl: move ccn504 code into FSL Makefile

The generic ARMv8 assembly code contains routines for setting up a CCN interconnect, though the Freescale SoCs are the only user. Link this code only for Freescale targets, this saves some precious bytes in the chronically tight SPL. Signed-off-by: Andre Przywara ---

[linux-sunxi] [PATCH 04/17] SPL: FIT: factor out spl_load_fit_image()

At the moment we load two images from a FIT image: the actual U-Boot image and the DTB. Both times we have very similar code to deal with alignment requirement the media we load from imposes upon us. Factor out this code into a new function, which we just call twice. Signed-off-by: Andre Przywara

[linux-sunxi] [PATCH 00/17] SPL: extend FIT loading support

This is an updated and slightly extended version of the SPL FIT loading series I posted as an RFC some weeks ago. I tried to fix all bugs that have been pointed out by the diligent reviewers, also added patches to automatically build the FIT images. The first patch is a bug fix for a regression

[linux-sunxi] [PATCH 16/17] sunxi: Store the device tree name in the SPL header

From: Siarhei Siamashka This patch updates the mksunxiboot tool to optionally add the default device tree name string to the SPL header. This information can be used by the firmware upgrade tools to protect users from harming themselves by trying to upgrade to an

[linux-sunxi] [PATCH 14/17] sunxi: Pine64: defconfig: enable SPL FIT support

The Pine64 (and all other 64-bit Allwinner boards) need to load an ARM Trusted Firmware image beside the actual U-Boot proper. This can now be easily achieved by using the just extended SPL FIT loading support, so enable it in the Pine64 defconfig. Also add the FIT image as a build target to

[linux-sunxi] [PATCH 17/17] sunxi: use SPL header DT name for FIT board matching

Now that we can store a DT name in the SPL header, use this string (if available) when finding the right DT blob to load for U-Boot proper. This allows a generic U-Boot (proper) image to be combined with a bunch of supported DTs, with just the SPL (possibly only that string) to be different.

[linux-sunxi] [PATCH 07/17] armv8: SPL: only compile GIC code if needed

Not every SoC needs to set up the GIC interrupt controller, so link think code only when the respective config option is set. This shaves off some bytes from the SPL code size. Signed-off-by: Andre Przywara --- arch/arm/lib/Makefile | 2 ++ 1 file changed, 2

[linux-sunxi] [PATCH 10/17] sunxi: SPL: store RAM size in gd

The sunxi SPL was holding the detected RAM size in some local variable only, so it wasn't accessible for other functions. Store the value in gd->ram_size instead, so it can be used later on. Signed-off-by: Andre Przywara --- board/sunxi/board.c | 7 +++ 1 file

[linux-sunxi] [PATCH 11/17] sunxi: SPL: add FIT config selector for Pine64 boards

For a board or platform to support FIT loading in the SPL, it has to provide a board_fit_config_name_match() routine, which helps to select one of possibly multiple DTBs contained in a FIT image. Provide a simple function which chooses the DT name U-Boot was configured with. If the DT name is one

[linux-sunxi] [PATCH 01/17] armv8: spl: Call spl_relocate_stack_gd for ARMv8

From: Philipp Tomsich As part of the startup process for boards using the SPL, we need to call spl_relocate_stack_gd. This is needed to set up malloc with its DRAM buffer. [Andre: fix comment] Signed-off-by: Philipp Tomsich

[linux-sunxi] [PATCH 06/17] tools: mksunxiboot: allow larger SPL binaries

mksunxiboot limits the size of the resulting SPL binaries to pretty conservative values to cover all SoCs and all boot media (NAND). It turns out that we have limit checks in place in the build process, so mksunxiboot can be relaxed and allow packaging binaries up to the actual 32KB the mask boot

Re: [linux-sunxi] [PATCH 5/5] pinctrl: sunxi: Add A64 R_PIO controller support

2017年3月1日 10:34于 Chen-Yu Tsai 写道： > > On Wed, Mar 1, 2017 at 2:29 AM, Andre Przywara > wrote: > > Hi, > > > > On 28/02/17 17:24, Icenowy Zheng wrote: > >> The A64 has a R_PIO pin controller, similar to the one found on the H3 > >> SoC. > >> Add

[linux-sunxi] [PATCH 3/3] arm64: dts: allwinner: add r_ccu node

A64 SoC have a CCU (r_ccu) in PRCM block. Add support for it. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

[linux-sunxi] [PATCH 02/12] sunxi: Enable AXP221s in I2C mode with the R40 SoC

The R40 SoC uses the AXP221s in I2C mode to supply power. Some regulator's common usages have changed, and also the recommended voltage for existing usages have changed. Update the defaults to match. Signed-off-by: Chen-Yu Tsai --- arch/arm/mach-sunxi/pmic_bus.c | 7 +++

[linux-sunxi] [PATCH 04/12] sunxi: Add mmc[1-3] pinmux settings for R40

The PIO is generally compatible with the A20, except that it routes the full 8 bits and eMMC reset pins for mmc2. Signed-off-by: Chen-Yu Tsai --- board/sunxi/board.c | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/board/sunxi/board.c

[linux-sunxi] [PATCH 10/12] sunxi: Fix CPUCFG address for R40

The R40 has the CPUCFG block at the same address as the A20. Fix it. Signed-off-by: Chen-Yu Tsai --- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h

[linux-sunxi] [PATCH 05/12] sunxi: Set PLL lock enable bits for R40

According to the BSP released by Banana Pi, the R40 (sun8iw11p1) has an extra "PLL lock control" register in the CCU, which controls whether the individual PLL lock status bits in each PLL's control register work or not. This patch enables it for all the PLLs. Signed-off-by: Chen-Yu Tsai

[linux-sunxi] [PATCH 00/12] sunxi: Add support for R40 SoC

Hi everyone, This series adds support for the new R40 SoC. The R40 is marketed as the successor to the A20. It is mostly pin compatible (in software) with the A20. It has a somewhat similar memory layout, a hybrid of A20 and newer sun6i gen.. Like the A20, it does not have a PRCM block. This

[linux-sunxi] [PATCH 03/12] sunxi: Fix watchdog reset function for R40

The watchdog found on the R40 SoC is the older variant found on the A20. Add the proper "#if defines" to make it work. Signed-off-by: Chen-Yu Tsai --- arch/arm/include/asm/arch-sunxi/timer.h| 5 ++--- arch/arm/include/asm/arch-sunxi/watchdog.h | 5 -

[linux-sunxi] [PATCH 11/12] sunxi: Add PSCI support for R40

The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI

[linux-sunxi] [PATCH 07/12] gpio: sunxi: Add compatible string for R40 PIO

The PIO on the R40 SoC is mostly compatible with the A20. Only a few pin functions for mmc2 were added to the PC pingroup, to support 8 bit eMMCs. Signed-off-by: Chen-Yu Tsai --- drivers/gpio/sunxi_gpio.c | 1 + 1 file changed, 1 insertion(+) diff --git

[linux-sunxi] [PATCH 08/12] sunxi: Use H3/A64 DRAM initialization code for R40

The R40 seems to have a variant of the memory controller found in the H3 and A64 SoCs. Adapt the code for use on the R40. The changes are based on released DRAM code and comparing register dumps from boot0. Signed-off-by: Chen-Yu Tsai --- arch/arm/include/asm/arch-sunxi/cpu.h

[linux-sunxi] [PATCH 01/12] sunxi: Add initial support for R40

The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now.

[linux-sunxi] [PATCH 09/12] sunxi: Enable SPL for R40

Now that we can do DRAM initialization for the R40, we can enable SPL support for it. Signed-off-by: Chen-Yu Tsai --- board/sunxi/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 9854ef0a599e..3df9f8197c57 100644 ---

[linux-sunxi] [PATCH 12/12] sunxi: Add support for Bananapi M2 Ultra

The Bananapi M2 Ultra is the first publicly available development board featuring the R40 SoC. This patch add barebone dtsi/dts files for the R40 and Bananapi M2 Ultra, as well as a defconfig for it. Signed-off-by: Chen-Yu Tsai --- arch/arm/dts/Makefile|

[linux-sunxi] [PATCH 06/12] sunxi: Provide defaults for R40 DRAM settings

These values were taken from the Banana Pi M2 Ultra fex file found in the released vendor BSP. This is the only publicly available R40 device at the time of this writing. Signed-off-by: Chen-Yu Tsai --- board/sunxi/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git

Re: [linux-sunxi] Re: [U-Boot] [PATCH v2] sunxi: add NanoPi NEO Air defconfig

On Sat, Feb 25, 2017 at 4:26 PM, Jagan Teki wrote: > On Mon, Feb 13, 2017 at 1:22 PM, Maxime Ripard > wrote: >> On Sun, Feb 12, 2017 at 04:21:40PM +0100, Jelle van der Waa wrote: >>> Add support for the NanoPi NEO Air H3 board from

[linux-sunxi] [PATCH 0/3] Add support for the R_CCU on Allwinner H3/A64 SoCs

Allwinner SoCs after sun6i-a31 nearly all have a R_CCU in PRCM part. (V3s and R40 do not have it, as they have even no PRCM) This patch adds support for the ones on H3/A64. Some clock/reset values are reserved for easier extending the support to A31/A23, but for this I think some changes to the

[linux-sunxi] [PATCH 1/3] dt-bindings: update device tree binding for Allwinner PRCM CCUs

Many Allwinner SoCs after A31 have a CCU in PRCM block. Give the ones on H3 and A64 compatible strings. Signed-off-by: Icenowy Zheng --- Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git

[linux-sunxi] [PATCH] sunxi: Add boards/sunxi and arch/arm/mach-sunxi to sunxi MAINTAINERS entry

Recently some sunxi related code was moved to arch/arm/mach-sunxi, but the MAINTAINERS entry was not updated to reflect this. Add this, and the board level boards/sunxi directory to our entry. While at it, also update its status, to reflect the current active maintainership. Signed-off-by:

Re: [linux-sunxi] [PATCH 11/17] sunxi: SPL: add FIT config selector for Pine64 boards

01.03.2017, 10:26, "Andre Przywara" : > For a board or platform to support FIT loading in the SPL, it has to > provide a board_fit_config_name_match() routine, which helps to select > one of possibly multiple DTBs contained in a FIT image. > Provide a simple function

Re: [linux-sunxi] [PATCH 1/5] pinctrl: sunxi: refactor pinctrl choice selecting for ARM64

On Wed, Mar 1, 2017 at 2:55 AM, Icenowy Zheng wrote: > > > 01.03.2017, 02:15, "Andre Przywara" : >> Hi Icenowy, >> >> (first thing: could you create your series with --cover-letter and fill >> this in? There you could explain what this series is about and