On Fri, Jul 28, 2017 at 11:28:15AM +0200, Corentin Labbe wrote:
> Hello
>
> The current way to find if the phy is internal is to compare DT phy-mode
> and emac_variant/internal_phy.
> But it will negate a possible future SoC where an external PHY use the
> same phy mode than the internal one.
>
On Fri, Jul 28, 2017 at 05:53:40PM +0800, Chen-Yu Tsai wrote:
> On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
> wrote:
> > Hello
> >
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> > But it will negate
On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
> > > I've probably asked this before: Does the internal PHY use a different
> > > PHY ID in registers 2 and 3?
> > >
> >
> > yes
> >
> > reg2: 0x0044
> > reg3: 0X1500
Copy/paste error, its 1400
>
> So this is not about loading the
On Fri, Jul 28, 2017 at 03:55:44PM +0200, Andrew Lunn wrote:
> On Fri, Jul 28, 2017 at 11:28:15AM +0200, Corentin Labbe wrote:
> > Hello
> >
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> > But it will negate a possible future SoC
Hi,
On Thu, Jul 27, 2017 at 01:01:36PM +0800, Yong Deng wrote:
> Add binding documentation for Allwinner V3s CSI.
>
> Signed-off-by: Yong Deng
> ---
> .../devicetree/bindings/media/sun6i-csi.txt| 49
> ++
> 1 file changed, 49 insertions(+)
>
> It is too late when we know the PHY ID.
> We need to set a syscon for choosing external/internal PHY.
> So we can rely only on DT.
The point is, its not a property of the PHY. It is a syscon or a MAC
property. Having it as a MAC property would be more generic.
Andrew
--
You received this
Hello
The current way to find if the phy is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the internal one.
This patchs series adds a new way to find if the PHY is internal, via its
This patch adds the sun8i-h3-ephy compatible to the internal PHY.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
The current way to find if the phy is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the internal one.
This patch adds a new way to find if the PHY is internal, via its
compatible.
Since
The internal PHYs for H3 ans V3S now need to have their own compatible.
This patch rename them in the binding documentation.
Signed-off-by: Corentin Labbe
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 4 ++--
1 file changed, 2 insertions(+), 2
On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
wrote:
> This patch adds the sun8i-h3-ephy compatible to the internal PHY.
>
> Signed-off-by: Corentin Labbe
> ---
> arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
To avoid repeating the past,
于 2017年7月28日 GMT+08:00 下午5:44:51, Chen-Yu Tsai 写到:
>On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
> wrote:
>> This patch adds the sun8i-h3-ephy compatible to the internal PHY.
>>
>> Signed-off-by: Corentin Labbe
>> ---
>>
On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
wrote:
> The current way to find if the phy is internal is to compare DT phy-mode
> and emac_variant/internal_phy.
> But it will negate a possible future SoC where an external PHY use the
> same phy mode than the internal
On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
wrote:
> Hello
>
> The current way to find if the phy is internal is to compare DT phy-mode
> and emac_variant/internal_phy.
> But it will negate a possible future SoC where an external PHY use the
> same phy mode than the
On Fri, Jul 28, 2017 at 05:49:55PM +0800, Chen-Yu Tsai wrote:
> On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
> wrote:
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> > But it will negate a possible
Hi,
Thanks for the second iteration!
On Thu, Jul 27, 2017 at 01:01:35PM +0800, Yong Deng wrote:
> Allwinner V3s SoC have two CSI module. CSI0 is used for MIPI interface
> and CSI1 is used for parallel interface. This is not documented in
> datasheet but by testing and guess.
>
> This patch
On 07/28/2017 07:44 AM, Corentin Labbe wrote:
> On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
I've probably asked this before: Does the internal PHY use a different
PHY ID in registers 2 and 3?
>>>
>>> yes
>>>
>>> reg2: 0x0044
>>> reg3: 0X1500
>
> Copy/paste error,
> > I've probably asked this before: Does the internal PHY use a different
> > PHY ID in registers 2 and 3?
> >
>
> yes
>
> reg2: 0x0044
> reg3: 0X1500
So this is not about loading the correct PHY driver. You can already
do this based on the PHY IDs...
This is about selecting which PHY to
18 matches
Mail list logo