On Allwinner SoCs we use some free bytes at the beginning of the SPL image
to store various information. We have a version byte to allow updates,
but changing this always requires all tools to be updated as well.
Introduce the concept of semantic versioning [1] to the SPL header:
The major part
Hi,
On 17/05/18 09:35, Icenowy Zheng wrote:
>
>
> 于 2018年5月17日 GMT+08:00 下午4:16:58, Andre Przywara 写到:
>> This series tries to solve three issues we currently have on
>> Allwinner boards:
>> - The DRAM sizing routine can only cope with power-of-two sized DRAM.
>> - The
Hi Stefan,
> Stefan Mavrodiev hat am 16. Mai 2018 um 13:38 geschrieben:
>
>
> With the new rev.E of A20-SOM-EVB, there is option for 16GB eMMC.
> Currently used card is KLMAG2GEND, wired to MMC2 slot.
>
> Signed-off-by: Stefan Mavrodiev
> ---
>
于 2018年5月17日 GMT+08:00 下午4:16:58, Andre Przywara 写到:
>This series tries to solve three issues we currently have on
>Allwinner boards:
>- The DRAM sizing routine can only cope with power-of-two sized DRAM.
>- The DRAM sizing routine steps through all DRAM, possibly
At the moment we rely on the infamous get_ram_size() function to learn
the actual DRAM size in U-Boot proper. This function has two issues:
1) It only works if the DRAM size is a power of two. We start to see
boards which have 3GB of (usable) DRAM, so this does not fit anymore.
2) As U-Boot has no
So far we have two users which want to look at the SPL header. We will
get more in the future.
Refactor the existing SPL header checks into a common function, to
simplify reusing the code.
Now that this is easy, add proper version checks to the DT name parsing.
Signed-off-by: Andre Przywara
This series tries to solve three issues we currently have on
Allwinner boards:
- The DRAM sizing routine can only cope with power-of-two sized DRAM.
- The DRAM sizing routine steps through all DRAM, possibly hitting secure
memory.
- The SPL header versioning is quite strict and tends to break
Every addition of a new feature to the SPL header currently requires us
to update the FEL tool, to teach it about the new supported maximum
value. Many times the FEL tool doesn't really care, but complains
anyway - and refuses to load.
Let's introduce semantic versioning [1] for this field, where
On Thu, May 17, 2018 at 09:16:58AM +0100, Andre Przywara wrote:
> This series tries to solve three issues we currently have on
> Allwinner boards:
> - The DRAM sizing routine can only cope with power-of-two sized DRAM.
> - The DRAM sizing routine steps through all DRAM, possibly hitting secure
>
On Thu, 17 May 2018 09:16:59 +0100
Andre Przywara wrote:
> On Allwinner SoCs we use some free bytes at the beginning of the SPL image
> to store various information. We have a version byte to allow updates,
> but changing this always requires all tools to be updated as
Hi,
On 17/05/18 12:05, Siarhei Siamashka wrote:
> On Thu, 17 May 2018 09:16:59 +0100
> Andre Przywara wrote:
>
>> On Allwinner SoCs we use some free bytes at the beginning of the SPL image
>> to store various information. We have a version byte to allow updates,
>> but
于 2018年5月17日 GMT+08:00 下午7:05:15, Siarhei Siamashka
写到:
>On Thu, 17 May 2018 09:16:59 +0100
>Andre Przywara wrote:
>
>> On Allwinner SoCs we use some free bytes at the beginning of the SPL
>image
>> to store various information. We have a
2018-05-15 19:17 GMT+08:00 Maxime Ripard :
> Hi,
>
> On Mon, May 14, 2018 at 10:45:44PM +0800, Hao Zhang wrote:
>> 2018-02-26 17:00 GMT+08:00 Maxime Ripard :
>> > Thanks for respinning this serie. It looks mostly good, but you still
>> > have a
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