Hi,
On Mon, Mar 04, 2019 at 03:49:11PM -0300, Ezequiel Garcia wrote:
> On Wed, 2019-02-20 at 15:17 +0100, Maxime Ripard wrote:
> > From: Pawel Osciak
> >
> > Stateless video codecs will require both the H264 metadata and slices in
> > order to be able to decode frames.
> >
> > This introduces
On Fri, Feb 22, 2019 at 04:46:17PM +0900, Tomasz Figa wrote:
> Hi Maxime,
>
> On Wed, Feb 20, 2019 at 11:17 PM Maxime Ripard
> wrote:
> >
> > From: Pawel Osciak
> >
> > Stateless video codecs will require both the H264 metadata and slices in
> > order to be able to decode frames.
> >
> > This
Hi Jernej,
On Wed, Feb 20, 2019 at 06:50:54PM +0100, Jernej Škrabec wrote:
> I really wanted to do another review on previous series but got distracted by
> analyzing one particulary troublesome H264 sample. It still doesn't work
> correctly, so I would ask you if you can test it with your
On Sat, Mar 2, 2019 at 12:29 AM Joe Hershberger wrote:
>
> On Wed, Feb 27, 2019 at 12:59 PM Jagan Teki
> wrote:
> >
> > Unlike other Allwinner SoC's R40 GMAC clock control register
> > is locate in CCU, but rest located via syscon itself. Since
> > the phandle property for current code look for
Dne torek, 05. marec 2019 ob 11:17:32 CET je Maxime Ripard napisal(a):
> Hi Jernej,
>
> On Wed, Feb 20, 2019 at 06:50:54PM +0100, Jernej Škrabec wrote:
> > I really wanted to do another review on previous series but got distracted
> > by analyzing one particulary troublesome H264 sample. It still
On 03/01/19 22:29, Samuel Holland wrote:
> The H3 and H5 SoCs contain a message box that can be used to send
> messages and interrupts back and forth between the ARM application CPUs
> and the ARISC coprocessor. Add a device tree node for it.
>
> Signed-off-by: Samuel Holland
> ---
>
