[linux-sunxi] [PATCH v2 5/9] ARM: dts: sunxi: h3/h5: Move wakeup-capable IRQs to r_intc

2020-05-24 Thread Samuel Holland
All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. For the H3/H5, r_intc IRQ numbers are offset by 32 from the GIC IRQ numbers. Signed-off-by: Samuel Holland --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 11

[linux-sunxi] [PATCH v2 2/9] irqchip/sun6i-r: Add wakeup support

2020-05-24 Thread Samuel Holland
Maintain a mask of wake-enabled IRQs, and enable them in hardware during the syscore phase of suspend. The restore the original mask of enabled IRQs (just the NMI) during resume. This serves two purposes. First, it lets power management firmware running on the ARISC coprocessor know which wakeup

[linux-sunxi] Re: [PATCH 1/9] irqchip/sun6i-r: Switch to a stacked irqchip driver

2020-05-24 Thread Samuel Holland
Hello, and thanks for the feedback! I know this is quite the delay in responding; I wanted to make sure my understanding of the hardware was as clear as possible before sending a v2. After experimentation, I came up with a diagram describing the hardware architecture, available here:

[linux-sunxi] [PATCH v2 9/9] arm64: dts: allwinner: h6: Move wakeup-capable IRQs to r_intc

2020-05-24 Thread Samuel Holland
All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. For the H6, r_intc IRQ numbers are offset by 96 from the GIC IRQ numbers. Signed-off-by: Samuel Holland --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi

[linux-sunxi] [PATCH v2 4/9] ARM: dts: sunxi: h3/h5: Add r_intc node

2020-05-24 Thread Samuel Holland
The H3 and H5 SoCs have an additional interrupt controller in the RTC power domain that can be used to enable wakeup for certain IRQs. Add a node for it. Signed-off-by: Samuel Holland --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git

[linux-sunxi] [PATCH v2 8/9] arm64: dts: allwinner: h6: Fix indentation of IR node

2020-05-24 Thread Samuel Holland
This node was indented by two tabs when added instead of one. Remove the extra tab. Signed-off-by: Samuel Holland --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 22 ++-- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git

[linux-sunxi] [PATCH v2 1/9] irqchip/sun6i-r: Use a stacked irqchip driver

2020-05-24 Thread Samuel Holland
The R_INTC in the A31 and newer sun8i/sun50i SoCs is more similar to the original sun4i interrupt controller than the sun7i/sun9i NMI controller. It is used for two distinct purposes: 1) To control the trigger, latch, and mask for the NMI input pin 2) To provide the interrupt input for the ARISC

[linux-sunxi] [PATCH v2 6/9] ARM: dts: sunxi: a83t: Move wakeup-capable IRQs to r_intc

2020-05-24 Thread Samuel Holland
All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. For the A83T, r_intc IRQ numbers are offset by 32 from the GIC IRQ numbers. Signed-off-by: Samuel Holland --- arch/arm/boot/dts/sun8i-a83t.dtsi | 9

[linux-sunxi] [PATCH v2 0/9] sunxi: Support IRQ wakeup from deep sleep

2020-05-24 Thread Samuel Holland
Allwinner sun8i/sun50i SoCs (A31 and newer) have two interrupt controllers: GIC and R_INTC. GIC does not support wakeup. R_INTC handles the external NMI pin, and provides 16-32 IRQs to the ARISC. At least the first 16 of these correspond 1:1 to a block of GIC IRQs starting with the NMI. This

[linux-sunxi] [PATCH v2 3/9] dt-bindings: irq: Add a compatible for the H3 R_INTC

2020-05-24 Thread Samuel Holland
The Allwinner H3 SoC contains an R_INTC that is, as far as we know, compatible with the R_INTC present in other sun8i/sun50i SoCs starting with the A31. Since the R_INTC hardware is undocumented, introduce a new compatible for the R_INTC variant in this SoC, in case there turns out to be some

[linux-sunxi] [PATCH v2 7/9] arm64: dts: allwinner: a64: Move wakeup-capable IRQs to r_intc

2020-05-24 Thread Samuel Holland
All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. For the A64, r_intc IRQ numbers are offset by 32 from the GIC IRQ numbers. Signed-off-by: Samuel Holland ---

[linux-sunxi] Re: Query about Lemaker LCD 3.5 patch

2020-05-24 Thread 'destroyedlolo' via linux-sunxi
Hello, I did some additional test : I was thinking the problem was because some modules are missing. So I rebuilt my kernel with additional config : > CONFIG_DRM_PANEL_SIMPLE=y > CONFIG_BACKLIGHT_CLASS_DEVICE=y > CONFIG_BACKLIGHT_GENERIC=y > CONFIG_BACKLIGHT_PWM=y > CONFIG_BACKLIGHT_GPIO=y but

[linux-sunxi] Re: Query about Lemaker LCD 3.5 patch

2020-05-24 Thread 'destroyedlolo' via linux-sunxi
Well, trying to boot with the patched DTS even with the original kernel is disabling DRM (no /dev/dri, no mention to DRM in dmesg :( ) -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from