>
> The suniv chip is based on ARM926EJ-S CPU, thus it has no architecture timer.
>
> Register sun4i_timer as sched_clock on it.
>
> Signed-off-by: Mesih Kilinc
Acked-by: Daniel Lezcano
> ---
> drivers/clocksource/sun4i_timer.c | 5 -
> 1 file changed, 4 in
On 13/01/2019 03:17, Samuel Holland wrote:
> This is the third version of a patch series to fix system clock jumps
> and other timer instability on the Allwinner A64 SoC. It has now been
> tested for a week, and I've received no reports of date jumps with this
> version. So this is, as far as I
On 17/03/2019 18:39, Icenowy Zheng wrote:
> 在 2019-02-11一的 12:21 +0300，Mesih Kilinc写道：
>> This is followup series for F1C100s initial support patchset.
>> All patches merged except patch 1 ~ 2 which is related to timer.
>> I am resending those since they are already have Acked tags.
>
> Ping.
>
On 18/03/2019 08:18, Icenowy Zheng wrote:
> 在 2019-03-17日的 21:52 +0100，Daniel Lezcano写道：
>> On 17/03/2019 18:39, Icenowy Zheng wrote:
>>> 在 2019-02-11一的 12:21 +0300，Mesih Kilinc写道：
>>>> This is followup series for F1C100s initial support patchset.
>>>> A
On 24/02/2020 18:39, Ondřej Jirman wrote:
> On Mon, Feb 24, 2020 at 06:23:28PM +0100, megous hlavni wrote:
>> Hi,
>>
>> On Mon, Feb 24, 2020 at 06:06:20PM +0100, Daniel Lezcano wrote:
>>> On 24/02/2020 17:54, Ondrej Jirman wrote:
>>>> This enables pass
On 24/02/2020 17:54, Ondrej Jirman wrote:
> This enables passive cooling by down-regulating CPU voltage
> and frequency.
>
> For the trip points, I used values from the BSP code directly.
>
> The critical trip point value is 30°C above the maximum recommended
> ambient temperature (70°C) for the
ovide a
> thermal zone without the trips node required by the binding.
>
> This obviously led to a fair number of device trees doing exactly that,
> making the initial binding requirement ineffective.
>
> Let's make it clear by dropping that requirement.
>
> Cc: Amit Kucheria
