Hi,
On 08/05/18 11:34, Jagan Teki wrote:
> On Sun, Apr 1, 2018 at 8:11 AM, Chen-Yu Tsai wrote:
>> On Sun, Apr 1, 2018 at 9:28 AM, André Przywara
>> wrote:
>>> On 30/03/18 05:25, Chen-Yu Tsai wrote:
>>>
>>>
> OK. So meanwhile I have something
On Sun, Apr 1, 2018 at 8:11 AM, Chen-Yu Tsai wrote:
> On Sun, Apr 1, 2018 at 9:28 AM, André Przywara wrote:
>> On 30/03/18 05:25, Chen-Yu Tsai wrote:
>>
>>
OK. So meanwhile I have something almost(TM) working:
- drivers/clk/sunxi/clk-a64.c,
On Sun, Apr 1, 2018 at 9:28 AM, André Przywara wrote:
> On 30/03/18 05:25, Chen-Yu Tsai wrote:
>
>
>>> OK. So meanwhile I have something almost(TM) working:
>>> - drivers/clk/sunxi/clk-a64.c, which is a UCLASS_CLK implementation of
>>> the clock IDs from
On 30/03/18 05:25, Chen-Yu Tsai wrote:
>> OK. So meanwhile I have something almost(TM) working:
>> - drivers/clk/sunxi/clk-a64.c, which is a UCLASS_CLK implementation of
>> the clock IDs from allwinner,sun50i-a64-ccu that we need: CLK_BUS_UARTx,
>> CLK_BUS_MMCx, CLK_MMCx. Their
Hi,
On Tue, Mar 27, 2018 at 10:43 PM, Andre Przywara wrote:
> Hi Maxime,
>
> thanks for the answer.
>
> On 27/03/18 15:30, Maxime Ripard wrote:
>> Hi,
>>
>> On Sat, Mar 24, 2018 at 01:07:27AM +, André Przywara wrote:
>>> On 23/03/18 18:14, Jagan Teki wrote:
On
On Thu, Mar 29, 2018 at 2:37 PM, Maxime Ripard
wrote:
> On Wed, Mar 28, 2018 at 11:29:10PM +0530, Jagan Teki wrote:
>> On Wed, Mar 28, 2018 at 4:45 PM, Maxime Ripard
>> wrote:
>> > On Wed, Mar 28, 2018 at 03:22:20PM +0530, Jagan Teki wrote:
Hi,
On 28/03/18 10:52, Jagan Teki wrote:
> On Wed, Mar 28, 2018 at 4:23 AM, André Przywara
> wrote:
>> On 27/03/18 18:58, Jagan Teki wrote:
>>> On Sat, Mar 24, 2018 at 6:37 AM, André Przywara
>>> wrote:
On 23/03/18 18:14, Jagan Teki wrote:
On Wed, Mar 28, 2018 at 4:23 AM, André Przywara wrote:
> On 27/03/18 18:58, Jagan Teki wrote:
>> On Sat, Mar 24, 2018 at 6:37 AM, André Przywara
>> wrote:
>>> On 23/03/18 18:14, Jagan Teki wrote:
On Wed, Mar 14, 2018 at 7:27 AM, Andre
On 27/03/18 18:58, Jagan Teki wrote:
> On Sat, Mar 24, 2018 at 6:37 AM, André Przywara
> wrote:
>> On 23/03/18 18:14, Jagan Teki wrote:
>>> On Wed, Mar 14, 2018 at 7:27 AM, Andre Przywara
>>> wrote:
Update the .dts files for the various
On Sat, Mar 24, 2018 at 6:37 AM, André Przywara wrote:
> On 23/03/18 18:14, Jagan Teki wrote:
>> On Wed, Mar 14, 2018 at 7:27 AM, Andre Przywara
>> wrote:
>>> Update the .dts files for the various boards with an Allwinner A64 SoC.
>>> This is as
On Tue, Mar 27, 2018 at 8:13 PM, Andre Przywara wrote:
> Hi Maxime,
>
> thanks for the answer.
>
> On 27/03/18 15:30, Maxime Ripard wrote:
>> Hi,
>>
>> On Sat, Mar 24, 2018 at 01:07:27AM +, André Przywara wrote:
>>> On 23/03/18 18:14, Jagan Teki wrote:
On Wed, Mar
Hi Maxime,
thanks for the answer.
On 27/03/18 15:30, Maxime Ripard wrote:
> Hi,
>
> On Sat, Mar 24, 2018 at 01:07:27AM +, André Przywara wrote:
>> On 23/03/18 18:14, Jagan Teki wrote:
>>> On Wed, Mar 14, 2018 at 7:27 AM, Andre Przywara
>>> wrote:
Update the
On 23/03/18 18:14, Jagan Teki wrote:
> On Wed, Mar 14, 2018 at 7:27 AM, Andre Przywara
> wrote:
>> Update the .dts files for the various boards with an Allwinner A64 SoC.
>> This is as of v4.15-rc9, exactly Linux commit:
>>
>> {
>> pinctrl-names =
On Wed, Mar 14, 2018 at 7:27 AM, Andre Przywara wrote:
> Update the .dts files for the various boards with an Allwinner A64 SoC.
> This is as of v4.15-rc9, exactly Linux commit:
> commit bdfe4cebea11476d278b1b98dd0f7cdac8269d62
> Author: Icenowy Zheng
>
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