在 2017-08-09 11:46，Chen-Yu Tsai 写道：
On Tue, Aug 8, 2017 at 2:46 PM, wrote:
在 2017-08-08 12:13，Chen-Yu Tsai 写道：
On Thu, Jul 20, 2017 at 2:00 PM, Icenowy Zheng
wrote:
Some new Allwinner SoCs' PRCM has a secure switch register, which
controls the access to some clock and power registers in
On Tue, Aug 8, 2017 at 2:46 PM, wrote:
> 在 2017-08-08 12:13，Chen-Yu Tsai 写道：
>>
>> On Thu, Jul 20, 2017 at 2:00 PM, Icenowy Zheng wrote:
>>>
>>> Some new Allwinner SoCs' PRCM has a secure switch register, which
>>> controls the access to some clock and power registers in PRCM block.
>>>
>>> Add
在 2017-08-08 12:13，Chen-Yu Tsai 写道：
On Thu, Jul 20, 2017 at 2:00 PM, Icenowy Zheng wrote:
Some new Allwinner SoCs' PRCM has a secure switch register, which
controls the access to some clock and power registers in PRCM block.
Add the definition of this register and its bits in the PRCM header
f
On Thu, Jul 20, 2017 at 2:00 PM, Icenowy Zheng wrote:
> Some new Allwinner SoCs' PRCM has a secure switch register, which
> controls the access to some clock and power registers in PRCM block.
>
> Add the definition of this register and its bits in the PRCM header
> file.
>
> Signed-off-by: Icenow
