Nicolas PLANEL (1):
USB: ch341: set tty baud speed according to tty struct
drivers/usb/serial/ch341.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
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2.3.1
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The ch341_set_baudrate() function initialize the device baud speed
according to the value on priv-baud_rate. By default the ch341_open() set
it to a hardcoded value (DEFAULT_BAUD_RATE 9600). Unfortunately, the
tty_struct is not initialized with the same default value. (usually 56700)
This means
From: Li Jun b47...@freescale.com
Current otg fsm timers are using controller 1ms irq and count it, this patch
is to replace it with hrtimer solution, use one hrtimer for all otg timers.
Signed-off-by: Li Jun jun...@freescale.com
Changes for v2:
- change enabled_otg_timers to be
connect AR9271(USB wifi) to AM335x, and send a flood ping from Mac OSX,
AR9271 is stopped.
on USB bus, the following occurs.
- OUT transaction is ACKed (NYET).
- IN transaction is ACKed (512bytes).
- PING-NAK transaction is continued for about 2 seconds (AR9271 timeout?).
In current
Hi Johan,
Sorry for the delay ... quite busy.
I posted the lastest patch v4 on the ML.
Regards,
Nicolas
On 02/27/2015 01:09 AM, Johan Hovold wrote:
On Thu, Feb 26, 2015 at 10:02:41AM -0500, Nicolas PLANEL wrote:
The ch341_set_baudrate() function initialize the device baud speed according
Hi All,
This is regarding the registering and handling of ID interrupt to
swich between host and device mode.
My aim is to have OTG functionality for a not-OTG phy.
We wanted to register an ID interrupt which fires of change in ID
value. Based on this ID value, we need to configure the phy to
This is regarding the registering and handling of ID interrupt to swich
between
host and device mode.
My aim is to have OTG functionality for a not-OTG phy.
We wanted to register an ID interrupt which fires of change in ID value. Based
on this ID value, we need to configure the phy
Hi Peter,
I will need to configure both the phy and the controller.
Thanks
Anjana
On Mon, Mar 2, 2015 at 11:24 AM, Peter Chen peter.c...@freescale.com wrote:
This is regarding the registering and handling of ID interrupt to swich
between
host and device mode.
My aim is to have OTG
From: Li Jun b47...@freescale.com
B_DATA_PLS(data-line pulse time) and B_SSEND_SRP(session end to SRP init) are
also from OTGEH 2.0 Specification and they are not chipidea specific.
Signed-off-by: Li Jun jun...@freescale.com
diff --git a/drivers/usb/chipidea/otg_fsm.c
From: Li Jun b47...@freescale.com
Since BSV irq is enabled for B-device all the time, so B_SESS_VLD timer
is not required, and also no need to check BSV status when B_ASE0_BRST
timer timeout.
Signed-off-by: Li Jun jun...@freescale.com
diff --git a/drivers/usb/chipidea/otg_fsm.c
From: Li Jun b47...@freescale.com
Current otg fsm timers are using controller 1ms irq and count it, this patch
is to replace it with hrtimer solution, use one hrtimer for all otg timers.
Signed-off-by: Li Jun jun...@freescale.com
Change for v3:
- clean up the definitions for original timer
I tried to reproduce this issue on an Intel Ivybridge machine. But I failed.
Kernel version: 4.0.0-rc1 (built against master branch of Greg's usb tree)
USB fabric:
$ sudo lsusb -t
/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/3p, 480M
|__ Port 1: Dev 2, If 0, Class=Hub,
The IRQF_DISABLED is a NOOP and scheduled to be removed. According to
commit e58aa3d2d0cc (genirq: Run irq handlers with interrupts
disabled) running IRQ handlers with interrupts enabled can cause stack
overflows when the interrupt line of the issuing device is still active.
This patch removes
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