Re: [Bug 197863] Thinkpad X240 resume dramatically slower on kernels 4.13+

Am Montag, den 29.01.2018, 19:21 +0100 schrieb Markus Demleitner: > > Any guess what might be behind this? > Hi, have you checked the persist attribute between the versions working well and working badly? Regards Oliver -- To unsubscribe from this list: send the line

Re: [Bug 197863] Thinkpad X240 resume dramatically slower on kernels 4.13+

On Mon, Jan 29, 2018 at 07:21:09PM +0100, Markus Demleitner wrote: > Hi, > > A while ago I opened bug #197863 in the kernel bugzilla: > > https://bugzilla.kernel.org/show_bug.cgi?id=197863 > > Essentially, xhci_hcd on a resume from RAM takes several seconds on a > Thinkpad X240 that is equipped

Re: how to disable a xhci logical port?

Hi Bin, On Mon, 2018-01-29 at 08:32 -0600, Bin Liu wrote: > On Sat, Jan 27, 2018 at 09:20:56AM +0100, Greg KH wrote: > > On Fri, Jan 26, 2018 at 12:56:26PM -0600, Bin Liu wrote: > > > Hi, > > > > > > A xHCI controller has two logical ports, hs and ss port. Is it > > > possible to disable one

Re: Problem with xhci_hcd on Gigabyte Z170X Gaming 7-EK

On Mon, Jan 29, 2018 at 02:26:52PM +0200, Mathias Nyman wrote: > On 20.01.2018 06:20, Herbert Poetzl wrote: >> I've recently acquired a Gigabyte Z170X Gaming 7-EK motherboard >> with the Intel Z170 chipset and Sunrise Point-H USB 3.0 xHCI >> Controller for running Linux. >> Now most things seem

Re: [PATCH 5/5] USB: serial: f81232: fix bulk_in/out size

On Mon, Jan 22, 2018 at 03:58:47PM +0800, Ji-Ze Hong (Peter Hong) wrote: > Fix Fintek F81232 bulk_in/out size to 64/16 according to the spec. > http://html.alldatasheet.com/html-pdf/406315/FINTEK/F81232/1762/8/F81232.html > > Signed-off-by: Ji-Ze Hong (Peter Hong)

Re: [PATCH 3/5] USB: serial: f81232: enable remote wakeup via RX/RI pin

On Mon, Jan 22, 2018 at 03:58:45PM +0800, Ji-Ze Hong (Peter Hong) wrote: > The F81232 can do remote wakeup via RX/RI pin with pulse. > This patch will use device_set_wakeup_enable to enable this > feature. This is a policy decision that should be made by user space by setting the power/wakeup

Re: [PATCH 2/5] USB: serial: f81232: add high baud rate support

On Tue, Jan 23, 2018 at 10:08:24AM +0800, Ji-Ze Hong (Peter Hong) wrote: > Hi Andy, > > Andy Shevchenko 於 2018/1/22 下午 10:55 寫道: > > On Mon, Jan 22, 2018 at 9:58 AM, Ji-Ze Hong (Peter Hong) > > wrote: > >> The F81232 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates > >>

Re: [PATCH 1/4] dt-bindings: dwc3: add binding documentation for UniPhier dwc3 glue driver

On Tue, Jan 23, 2018 at 10:00:51PM +0900, Kunihiko Hayashi wrote: > Add devicetree binding documentation for dwc3 glue driver implemented > on Socionext UniPhier SoCs. > > Signed-off-by: Kunihiko Hayashi > --- > .../devicetree/bindings/usb/dwc3-uniphier.txt

Re: [PATCH v3 08/15] usb: dwc3: Make TX/RX threshold configurable

Hi, On 1/29/2018 10:46 AM, Rob Herring wrote: > On Wed, Jan 17, 2018 at 05:57:15PM -0800, Thinh Nguyen wrote: >> DWC_usb31 periodic transfer at 48K+ bytes per interval may need >> modification to the TX/RX packet threshold to achieve optimal result. >> Add properties to make it configurable. >>

Re: [PATCH 4.9] usbip: vhci_hcd: clear just the USB_PORT_STAT_POWER bit

On 01/28/2018 05:14 AM, Greg KH wrote: > On Fri, Jan 26, 2018 at 11:54:35AM -0700, Shuah Khan wrote: >> Upstream commit 1c9de5bf4286 ("usbip: vhci-hcd: Add USB3 SuperSpeed >> support") > > Hm, I think you have the wrong commit id here. > > I don't see any commit upstream with the Subject you

Re: [PATCH] USB TYPEC: RT1711H Type-C Chip Driver

On Mon, Jan 29, 2018 at 07:19:06AM +, shufan_lee(李書帆) wrote: > Hi Guenter, > > We try to use the TCPCI driver on RT1711H and here are some questions. > > Q1. Is current TCPCI driver written according to TypeC Port Controller > Interface Specification Revision 1.0 & Version 1.2?

Re: [PATCH v3 08/15] usb: dwc3: Make TX/RX threshold configurable

On Wed, Jan 17, 2018 at 05:57:15PM -0800, Thinh Nguyen wrote: > DWC_usb31 periodic transfer at 48K+ bytes per interval may need > modification to the TX/RX packet threshold to achieve optimal result. > Add properties to make it configurable. > > Cc: John Youn >

Re: [Bug 197863] Thinkpad X240 resume dramatically slower on kernels 4.13+

Hi, A while ago I opened bug #197863 in the kernel bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=197863 Essentially, xhci_hcd on a resume from RAM takes several seconds on a Thinkpad X240 that is equipped with a Sierra LTE modem after an upgrade to 4.13: On Mon, Nov 20, 2017 at

[PATCH] Add delay-init quirk for Corsair K70 RGB keyboards

From: Jack Stocker Following on from this patch: https://lkml.org/lkml/2017/11/3/516, Corsair K70 RGB keyboards also require the DELAY_INIT quirk to start correctly at boot. Device ids found here: usb 3-3: New USB device found, idVendor=1b1c, idProduct=1b13 usb 3-3:

Re: how to disable a xhci logical port?

On Sat, Jan 27, 2018 at 09:20:56AM +0100, Greg KH wrote: > On Fri, Jan 26, 2018 at 12:56:26PM -0600, Bin Liu wrote: > > Hi, > > > > A xHCI controller has two logical ports, hs and ss port. Is it > > possible to disable one port, for example the ss port? If so, how? > > Why would you want to do

Re: [BUG] SD card reader disappears after suspend

On 25.01.2018 17:51, Alan Stern wrote: On Thu, 25 Jan 2018, Samuel Sadok wrote: 2018-01-23 17:31 GMT+01:00 Alan Stern : On Tue, 23 Jan 2018, Samuel Sadok wrote: Thanks Alan, While I was at it I also enabled debug logs for xhci_hcd and xhci_pci. $ echo module

Re: dvb usb issues since kernel 4.9

Em Fri, 26 Jan 2018 17:37:39 -0200 Mauro Carvalho Chehab escreveu: > Em Fri, 26 Jan 2018 12:17:37 -0200 > Mauro Carvalho Chehab escreveu: > > > Hi Alan, > > > > Em Mon, 8 Jan 2018 14:15:35 -0500 (EST) > > Alan Stern

uas failing on multiple disk access on a jmicron JMS567 bridge

Hello I am trying to follow up on the original thread, opened on this issue by Christoph Gohle May 2017 (same email subject) I confirm that the same issue is still present on kernel 4.14.15 (Mainline build for Ubuntu xenial, amd64) My enclosure is an Orico 9558RU3, using JMS567 USB 3.0 to SATA

Re: Problem with xhci_hcd on Gigabyte Z170X Gaming 7-EK

On 20.01.2018 06:20, Herbert Poetzl wrote: I've recently acquired a Gigabyte Z170X Gaming 7-EK motherboard with the Intel Z170 chipset and Sunrise Point-H USB 3.0 xHCI Controller for running Linux. Now most things seem to work fine (some problems with UEFI but that was kind of expected), but

Re: Not enough bandwidth with Magewell XI100DUSB-HDMI

On 19.01.2018 22:12, Philipp Zabel wrote: Hi, On Fri, Jan 19, 2018 at 2:10 PM, Michael Tretter wrote: I found the old thread and it sounds exactly like my issue. Different camera, but same xHCI controller. I have exactly the same issue with the xHCI controller of

Re: BUG: KASAN: use-after-free in xhci_trb_virt_to_dma.part.24+0x1c/0x80

On 28.01.2018 23:43, Paul Menzel wrote: Dear Linux folks, Using Linux 4.15-rc9+ with KASAN enabled on the TUXEDO Book 1406, playing with Bluetooth – disabling a device – I was able to trigger the warning below. Thanks, first guess is that btusb calls usb_set_interface() with URBs still

[PATCH v2 1/1] usb: xhci: do not create and register shared_hcd when USB3.0 is disabled

From: Tung Nguyen Currently, hcd->shared_hcd always creates and registers to the usb-core. If, for some reasons, USB3 downstream port is disabled, no roothub port for USB3.0 is found. This causes kernel to display an error: hub 2-0:1.0: config failed, hub doesn't have any

Re: USB-C Devices only show up if connected at boot

On Sat, Jan 27, 2018 at 01:31:00PM +, Mike Lothian wrote: > On 26 January 2018 at 09:53, Mike Lothian wrote: > > On 26 January 2018 at 08:31, Mika Westerberg > > wrote: > >> On Fri, Jan 26, 2018 at 08:07:56AM +, Mike Lothian wrote: >

Re: [PATCH 2/2] usb: chipidea: imx: Fix ULPI on imx53

On Wed, Jan 24, 2018 at 06:14:39PM +0100, Sebastian Reichel wrote: > Traditionally, PORTSC should be set before initializing ULPI phys. But > setting PORTSC before powering on the phy results in a kernel freeze > on imx53 based GE PPD. As a workaround this initializes the phy early > in the imx

Re: [PATCH 2/3] usb: dwc3: of-simple: add support for shared and pulsed reset lines

Hi, Martin Blumenstingl writes: > Some SoCs (such as Amlogic Meson GXL for example) share the reset line > with other components (in case of the Meson GXL example there's a shared > reset line between the USB2 PHYs, USB3 PHYs and the dwc3 controller). >