The following changes since commit dc748b66dbfbbfa187044f007d42d9cc01e5ab11:
dt-bindings: usb: new ehci-npcm7xx dt (2018-06-25 21:59:15 +0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git/
tags/usb-ci-v4.19-rc1
for you to fetch
This is just RFC at this stage, I was getting annoyed at the once-per-second
debug message about unsupported command when using f_mass_storage as a CDROM,
so I quickly hacked that up.
I'm not clearing the events per-se, I'm just sending events based on the
state of pending unit attentions, which
On 7/26/2018 2:59 PM, Thinh Nguyen wrote:
> On 7/26/2018 2:32 PM, Andy Shevchenko wrote:
>> On Thu, Jul 26, 2018 at 11:52 PM, Thinh Nguyen
>> wrote:
>>> dwc_usb31 does not support OTG mode. If the controller supports DRD but
>>> the dr_mode is not specified or set to OTG, then set the mode to
>>>
On 7/26/2018 2:32 PM, Andy Shevchenko wrote:
> On Thu, Jul 26, 2018 at 11:52 PM, Thinh Nguyen
> wrote:
>> dwc_usb31 does not support OTG mode. If the controller supports DRD but
>> the dr_mode is not specified or set to OTG, then set the mode to
>> peripheral.
>>
>> Signed-off-by: Thinh Nguyen
On Thu, Jul 26, 2018 at 11:52 PM, Thinh Nguyen
wrote:
> dwc_usb31 does not support OTG mode. If the controller supports DRD but
> the dr_mode is not specified or set to OTG, then set the mode to
> peripheral.
>
> Signed-off-by: Thinh Nguyen
> ---
> drivers/usb/dwc3/core.c | 8
> 1 file
dwc_usb31 does not support OTG mode. If the controller supports DRD but
the dr_mode is not specified or set to OTG, then set the mode to
peripheral.
Signed-off-by: Thinh Nguyen
---
drivers/usb/dwc3/core.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/usb/dwc3/core.c
On Thu, Jul 26, 2018 at 5:01 PM, Gevorg Sahakyan
wrote:
> Declared dwc2_check_core_endianness() function for dynamicly check
> core endianness.
> Added needs_byte_swap flag to hsotg structure, and depending on
> flag swap value inside dwc2_readl/writel functions.
> +#define swap32(x) (\
> +
On Thu, Jul 26, 2018 at 5:00 PM, Gevorg Sahakyan
wrote:
> dwc2_readl_rep/dwc2_writel_rep functions using readl/writel in a
> loop.
Why this is better? Any regression or what?
--
With Best Regards,
Andy Shevchenko
--
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the
On 7/26/2018 16:10, Felipe Balbi wrote:
>
> Hi,
>
> Grigor Tovmasyan writes:
Added hsotg argument to dwc2_readl/writel function prototype,
and also instead of address pass offset of register.
hsotg will contain flag field for endianness.
Also customized dwc2_set_bit and
Declared dwc2_check_core_endianness() function for dynamicly check
core endianness.
Added needs_byte_swap flag to hsotg structure, and depending on
flag swap value inside dwc2_readl/writel functions.
Signed-off-by: Gevorg Sahakyan
---
drivers/usb/dwc2/core.h | 22 --
dwc2_readl_rep/dwc2_writel_rep functions using readl/writel in a
loop.
Signed-off-by: Gevorg Sahakyan
---
drivers/usb/dwc2/core.h | 61 ++-
drivers/usb/dwc2/gadget.c | 6 ++---
2 files changed, 26 insertions(+), 41 deletions(-)
diff --git
dma_mapping_error function unable to works in PowerPC arch
when MUSB do not use DMA (illegal memory access). Proposed
patch replace its usage to usual define for checking DMA mapping.
Signed-off-by: Alexey Spirkov
---
drivers/usb/musb/musb_gadget.c | 2 +-
1 file changed, 1 insertion(+), 1
Existing code is not applicable to big-endian machines
ctrlrequest fields received in USB endian - i.e. in little-endian
and should be converted to cpu endianness before usage.
Signed-off-by: Alexey Spirkov
---
drivers/usb/musb/musb_gadget_ep0.c | 33 -
1 file
Hi,
Grigor Tovmasyan writes:
>>> Added hsotg argument to dwc2_readl/writel function prototype,
>>> and also instead of address pass offset of register.
>>> hsotg will contain flag field for endianness.
>>>
>>> Also customized dwc2_set_bit and dwc2_clear_bit function for
>>> dwc2_readl/writel
On Thu, 2018-07-26 at 14:50 +0300, Felipe Balbi wrote:
> Andy Shevchenko writes:
>
> > For now all PCI enumerated dwc3 devices require some properties
> > to be present. This allows us to unconditionally append them and
> > supply
> > via driver_data.
> >
> > No functional change intended.
> >
Andy Shevchenko writes:
> For now all PCI enumerated dwc3 devices require some properties
> to be present. This allows us to unconditionally append them and supply
> via driver_data.
>
> No functional change intended.
>
> Signed-off-by: Andy Shevchenko
both applied, but I removed your macro
Hi Felipe,
On 7/26/2018 14:43, Felipe Balbi wrote:
> Gevorg Sahakyan writes:
>
>> Added hsotg argument to dwc2_readl/writel function prototype,
>> and also instead of address pass offset of register.
>> hsotg will contain flag field for endianness.
>>
>> Also customized dwc2_set_bit and
On Intel Edison board the OTG function is enabled, thus,
USB can switch to the host mode.
Allow that by changing dr_mode property to "otg" for Intel Merrifield.
Signed-off-by: Andy Shevchenko
---
drivers/usb/dwc3/dwc3-pci.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff
For now all PCI enumerated dwc3 devices require some properties
to be present. This allows us to unconditionally append them and supply
via driver_data.
No functional change intended.
Signed-off-by: Andy Shevchenko
---
drivers/usb/dwc3/dwc3-pci.c | 107 +---
1
No top posting ;)
Minas Harutyunyan writes:
> Hi Felipe,
>
> This patch should be applied after follow patch from Artur Petrosyan:
>
> "[PATCH] usb: dwc2: Change reading of current frame number flow."
Hasn't this been part of mainline for a while already?
commit
Hi Felipe,
This patch should be applied after follow patch from Artur Petrosyan:
"[PATCH] usb: dwc2: Change reading of current frame number flow."
Thanks,
Minas
On 7/26/2018 2:45 PM, Felipe Balbi wrote:
> Minas Harutyunyan writes:
>
>> To start ISOC transfers in handlers
Andy Shevchenko writes:
> On Intel Edison board the OTG function is enabled, thus,
> USB can switch to the host mode.
>
> Allow that by changing dr_mode property to "otg" for Intel Merrifield.
>
> Signed-off-by: Andy Shevchenko
this will need rebasing too
--
balbi
signature.asc
Andy Shevchenko writes:
> For now all PCI enumerated dwc3 devices require some properties
> to be present. This allows us to unconditionally append them and supply
> via driver_data.
>
> No functional change intended.
>
> Signed-off-by: Andy Shevchenko
Doesn't apply. Please rebase on
Hi,
Benjamin Herrenschmidt writes:
> This is just RFC at this stage, I was getting annoyed at the
> once-per-seconddebug message about unsupported command when using
> f_mass_storage as a CDROM,so I quickly hacked that up.
> I'm not clearing the events per-se, I'm just sending events based on
Hans de Goede writes:
> Hi,
>
> On 10-06-18 16:01, Hans de Goede wrote:
>> Bay Trail / BYT SoCs do not have a builtin device-mode phy, instead
>> they require an external ULPI phy for device-mode.
>>
>> Only some BYT devices have an external phy, but even on those devices
>> device-mode is not
On Tue, Jul 24, 2018 at 03:36:36PM -0700, Patong Yang wrote:
> The original driver/patch was submitted on April 4, 2018. This is the
> second version based on the feedback received on the original patch.
>
> v2: Removed custom IOCTLs, as suggested by Greg KH
> Using standard Linux GPIO APIs,
Eugeniu Rosca writes:
> From: Andreas Pape
>
> Via p_chmask/c_chmask the user can define whether uac2 shall support
> playback and/or capture. This has only effect on the created ALSA device,
> but not on the USB descriptor. This patch adds playback/capture descriptors
> dependent on that
Laurent Pinchart writes:
> From: Joel Pepper
>
> - Add bFrameIndex as a UVCG_FRAME_ATTR_RO for each frame size.
> - Automatically assign ascending bFrameIndex to each frame in a format.
>
> Before all "bFrameindex" attributes were set to "1" with no way to
> configure the gadget otherwise. This
Hi,
Jerry Zhang writes:
> Hi Felipe,
>
> I noticed this wasn't queued up for 4.18. Do you think there is
> anything I need to do to get this patch set into 4.19? Also, can we at
> least add just this patch ('usb: gadget: f_fs: Only return delayed
> status when len is 0') to 4.18 as functionfs
Minas Harutyunyan writes:
> To start ISOC transfers in handlers dwc2_gadget_handle_nak() and
> dwc2_gadget_handle_out_token_ep_disabled() driver reads current frame
> number, based on which, set target frame number to start first ISOC
> transfer.
>
> In case if system's high IRQ latency and
Gevorg Sahakyan writes:
> Added hsotg argument to dwc2_readl/writel function prototype,
> and also instead of address pass offset of register.
> hsotg will contain flag field for endianness.
>
> Also customized dwc2_set_bit and dwc2_clear_bit function for
> dwc2_readl/writel functions.
>
>
On Tue, 2018-07-24 at 11:04 -0600, Shuah Khan wrote:
> On 07/20/2018 08:12 PM, Ben Hutchings wrote:
> > gcc 8 reports:
> >
> > usbip_device_driver.c: In function ‘read_usb_vudc_device’:
> > usbip_device_driver.c:106:2: error: ‘strncpy’ specified bound 256 equals
> > destination size
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