Re: [PATCH v2 0/5] Improve ASIX RX memory allocation error handling

From: Dean Jenkins Date: Fri, 2 Oct 2015 14:29:03 +0100 > The ASIX RX handler algorithm is weak on error handling. > There is a design flaw in the ASIX RX handler algorithm because the > implementation for handling RX Ethernet frames for the DUB-E100 C1 can > have

[PATCH v2 0/5] Improve ASIX RX memory allocation error handling

From: Mark Craske The ASIX RX handler algorithm is weak on error handling. There is a design flaw in the ASIX RX handler algorithm because the implementation for handling RX Ethernet frames for the DUB-E100 C1 can have Ethernet frames spanning multiple URBs. This means