Re: [PATCH v2 2/3] xhci: Add quirk to zero 64bit registers on Renesas PCIe controllers

2018-05-23 Thread Marc Zyngier
On 21/05/18 09:23, Mathias Nyman wrote: > On 18.05.2018 19:29, Marc Zyngier wrote: >> Some Renesas controllers get into a weird state if they are reset while >> programmed with 64bit addresses (they will preserve the top half of the >> address in internal, non visible registers). >> >> You end up w

Re: [PATCH v2 2/3] xhci: Add quirk to zero 64bit registers on Renesas PCIe controllers

2018-05-21 Thread Mathias Nyman
On 18.05.2018 19:29, Marc Zyngier wrote: Some Renesas controllers get into a weird state if they are reset while programmed with 64bit addresses (they will preserve the top half of the address in internal, non visible registers). You end up with half the address coming from the kernel, and the o

[PATCH v2 2/3] xhci: Add quirk to zero 64bit registers on Renesas PCIe controllers

2018-05-18 Thread Marc Zyngier
Some Renesas controllers get into a weird state if they are reset while programmed with 64bit addresses (they will preserve the top half of the address in internal, non visible registers). You end up with half the address coming from the kernel, and the other half coming from the firmware. Also,