Hi,
On 11/17/2015 06:28 PM, Dmitry Malkin wrote:
On Mon, 16 Nov 2015 10:18:42 +0800, Lu Baolu wrote:
This quirk works as well if debug host doesn't have DBC. I didn't try a
DBC-capable debug host yet.
Hi,
I went through it again, with your v3 patch series on top of vanilla v4.3.0.
Two
On Mon, 16 Nov 2015 10:18:42 +0800, Lu Baolu wrote:
> This quirk works as well if debug host doesn't have DBC. I didn't try a
> DBC-capable debug host yet.
Hi,
I went through it again, with your v3 patch series on top of vanilla v4.3.0.
Two targets, one host, all with Intel chipset (XHCI device
Hi,
On 11/13/2015 11:34 PM, Dmitry Malkin wrote:
On Mon, 9 Nov 2015 15:38:33 +0800, Lu Baolu wrote:
On Intel platform, if the debug target is connected with debug
host, enabling DCE bit in command register leads to a hung bus
state. In the hung state, the host system will not see a port
On Mon, 9 Nov 2015 15:38:33 +0800, Lu Baolu wrote:
> On Intel platform, if the debug target is connected with debug
> host, enabling DCE bit in command register leads to a hung bus
> state. In the hung state, the host system will not see a port
> connected status bit set. Hence debug target fails
On Intel platform, if the debug target is connected with debug
host, enabling DCE bit in command register leads to a hung bus
state. In the hung state, the host system will not see a port
connected status bit set. Hence debug target fails to be probed.
The state could be resolved by performing a
