On 31.08.2017 12:39, Mason wrote:
On 30/08/2017 11:06, Greg Kroah-Hartman wrote:
On Wed, Aug 30, 2017 at 10:55:37AM +0200, Mason wrote:
On 30/08/2017 08:02, Greg Kroah-Hartman wrote:
To get back to the original issue here, the hardware seems to have died,
the driver stops talking to it,
On 31.08.2017 12:17, Mason wrote:
On 30/08/2017 11:37, Mason wrote:
On 30/08/2017 11:07, Ard Biesheuvel wrote:
Please don't forget to mention that this is quirky hardware that
depends on BROKEN because it multiplexes MMIO and config space
accesses in the same memory window without any
On 30/08/2017 11:06, Greg Kroah-Hartman wrote:
> On Wed, Aug 30, 2017 at 10:55:37AM +0200, Mason wrote:
>
>> On 30/08/2017 08:02, Greg Kroah-Hartman wrote:
>>
>>> To get back to the original issue here, the hardware seems to have died,
>>> the driver stops talking to it, and all is good. The
On 30/08/2017 11:37, Mason wrote:
> On 30/08/2017 11:07, Ard Biesheuvel wrote:
>
>> Please don't forget to mention that this is quirky hardware that
>> depends on BROKEN because it multiplexes MMIO and config space
>> accesses in the same memory window without any locking whatsoever
>> (which
On 30/08/2017 11:07, Ard Biesheuvel wrote:
> Please don't forget to mention that this is quirky hardware that
> depends on BROKEN because it multiplexes MMIO and config space
> accesses in the same memory window without any locking whatsoever
> (which would be difficult to do in the first place
On Wed, Aug 30, 2017 at 10:07:59AM +0100, Ard Biesheuvel wrote:
> On 30 August 2017 at 09:55, Mason wrote:
> > On 30/08/2017 08:02, Greg Kroah-Hartman wrote:
> >
> >> To get back to the original issue here, the hardware seems to have died,
> >> the driver stops talking to it,
On 30 August 2017 at 09:55, Mason wrote:
> On 30/08/2017 08:02, Greg Kroah-Hartman wrote:
>
>> To get back to the original issue here, the hardware seems to have died,
>> the driver stops talking to it, and all is good. The "regression" here
>> is that we now properly can
On Wed, Aug 30, 2017 at 10:55:37AM +0200, Mason wrote:
> On 30/08/2017 08:02, Greg Kroah-Hartman wrote:
>
> > To get back to the original issue here, the hardware seems to have died,
> > the driver stops talking to it, and all is good. The "regression" here
> > is that we now properly can
On 30/08/2017 08:02, Greg Kroah-Hartman wrote:
> To get back to the original issue here, the hardware seems to have died,
> the driver stops talking to it, and all is good. The "regression" here
> is that we now properly can determine that the hardware is crap.
Before 4.12, when I unplugged my
On Wed, Aug 30, 2017 at 08:36:23AM +0200, Lukas Wunner wrote:
> On Tue, Aug 29, 2017 at 05:51:38PM +0200, Greg Kroah-Hartman wrote:
> > On Tue, Aug 29, 2017 at 05:34:56PM +0200, Lukas Wunner wrote:
> > > On Tue, Aug 29, 2017 at 04:47:25PM +0200, Greg Kroah-Hartman wrote:
> > > > On Tue, Aug 29,
On Tue, Aug 29, 2017 at 05:51:38PM +0200, Greg Kroah-Hartman wrote:
> On Tue, Aug 29, 2017 at 05:34:56PM +0200, Lukas Wunner wrote:
> > On Tue, Aug 29, 2017 at 04:47:25PM +0200, Greg Kroah-Hartman wrote:
> > > On Tue, Aug 29, 2017 at 03:38:52PM +0200, Lukas Wunner wrote:
> > Is 0x not a
On Wed, Aug 30, 2017 at 01:53:10AM +0200, Lukas Wunner wrote:
> On Tue, Aug 29, 2017 at 04:28:53PM +0300, Mathias Nyman wrote:
> > This tight check was originally done to detect pci hotplug removed
> > hosts as soon as possible.
>
> In Mason's case, the parent of the XHCI controller isn't a
On Tue, Aug 29, 2017 at 04:28:53PM +0300, Mathias Nyman wrote:
> This tight check was originally done to detect pci hotplug removed
> hosts as soon as possible.
In Mason's case, the parent of the XHCI controller isn't a hotplug port,
see this lspci output:
On Tue, Aug 29, 2017 at 05:34:56PM +0200, Lukas Wunner wrote:
> On Tue, Aug 29, 2017 at 04:47:25PM +0200, Greg Kroah-Hartman wrote:
> > On Tue, Aug 29, 2017 at 03:38:52PM +0200, Lukas Wunner wrote:
> > > On Tue, Aug 29, 2017 at 04:28:53PM +0300, Mathias Nyman wrote:
> > > > Then again it might be
On Tue, Aug 29, 2017 at 04:47:25PM +0200, Greg Kroah-Hartman wrote:
> On Tue, Aug 29, 2017 at 03:38:52PM +0200, Lukas Wunner wrote:
> > On Tue, Aug 29, 2017 at 04:28:53PM +0300, Mathias Nyman wrote:
> > > Then again it might be a bit too drastic to kill xhci just because
> > > we read 0x
On Tue, Aug 29, 2017 at 03:38:52PM +0200, Lukas Wunner wrote:
> On Tue, Aug 29, 2017 at 04:28:53PM +0300, Mathias Nyman wrote:
> > Then again it might be a bit too drastic to kill xhci just because
> > we read 0x once from a mmio xhci register. Maybe we should
> > return an error a couple
On Tue, Aug 29, 2017 at 04:28:53PM +0300, Mathias Nyman wrote:
> Then again it might be a bit too drastic to kill xhci just because
> we read 0x once from a mmio xhci register. Maybe we should
> return an error a couple times before actually tearing down xhci.
>
> This tight check was
On 28.08.2017 17:40, Mason wrote:
On 28/08/2017 10:39, Mathias Nyman wrote:
Could you take a log with the following added debug, without
your extra delays, It should show a bit more about the state
of the controller when we read 0x
I applied the following patch on top of v4.12-rc1
On 28/08/2017 10:39, Mathias Nyman wrote:
> Could you take a log with the following added debug, without
> your extra delays, It should show a bit more about the state
> of the controller when we read 0x
I applied the following patch on top of v4.12-rc1
diff --git
On 23.08.2017 17:30, Mason wrote:
On 23/08/2017 14:41, Mason wrote:
I compiled a minimal kernel, with lots of irrelevant drivers and
frameworks left out, including power management. I still get the
"xHCI host controller not responding, assume dead" issue.
The problem seems to have a
On 23/08/2017 14:41, Mason wrote:
> I compiled a minimal kernel, with lots of irrelevant drivers and
> frameworks left out, including power management. I still get the
> "xHCI host controller not responding, assume dead" issue.
The problem seems to have a timing-related aspect.
I added a bunch
On 23/08/2017 13:54, Mason wrote:
> On 23/08/2017 13:11, Mathias Nyman wrote:
>
>> In this case we read the register when hub thread asks to clear port feature.
>>
>> why portsc returns 0x is a another question, could the hub thread be
>> running while xhci controller is (in D3)?
>> Was
On 23/08/2017 13:11, Mathias Nyman wrote:
> On 23.08.2017 12:31, Mason wrote:
>
>> [ 46.525247] usb 2-2: new SuperSpeed USB device number 2 using xhci_hcd
>> [ 46.565496] usb-storage 2-2:1.0: USB Mass Storage device detected
>> [ 46.571934] scsi host0: usb-storage 2-2:1.0
>> [ 47.601227]
On 23.08.2017 12:31, Mason wrote:
On 23/08/2017 09:51, Mathias Nyman wrote:
very likely cause is the more aggressive detection of pci removed xhci hosts
See commit d9f11ba9f107aa335091ab8d7ba5eea714e46e8b
xhci: Rework how we handle unresponsive or hoptlug removed hosts
It checks if a
On 23/08/2017 09:51, Mathias Nyman wrote:
> very likely cause is the more aggressive detection of pci removed xhci hosts
>
> See commit d9f11ba9f107aa335091ab8d7ba5eea714e46e8b
> xhci: Rework how we handle unresponsive or hoptlug removed hosts
>
> It checks if a xhci register reads returns
On 23/08/2017 09:51, Mathias Nyman wrote:
> very likely cause is the more aggressive detection of pci removed xhci hosts
>
> See commit d9f11ba9f107aa335091ab8d7ba5eea714e46e8b
> xhci: Rework how we handle unresponsive or hoptlug removed hosts
>
> It checks if a xhci register reads returns
On 23/08/2017 09:51, Mathias Nyman wrote:
> On 23.08.2017 09:07, Felipe Balbi wrote:
>
>> Mason writes:
>>
>>> Any idea what could have changed between 4.9 and 4.13 ?
>>
>> Quite a bit:
>>
>> $ git rev-list --no-merges --count v4.13-rc6 ^v4.9 -- drivers/usb/host/xhci
>> drivers/usb/core/
>> 58
On 23.08.2017 09:07, Felipe Balbi wrote:
Hi,
Mason writes:
Hello,
The driver for my system's PCIe host bridge landed recently
(in 4.13) but it was developed on 4.9
I tested the PCIe host bridge by plugging a 4-port USB3 adapter
into the PCIe slot (system at rest) and
Hi,
Mason writes:
> Hello,
>
> The driver for my system's PCIe host bridge landed recently
> (in 4.13) but it was developed on 4.9
>
> I tested the PCIe host bridge by plugging a 4-port USB3 adapter
> into the PCIe slot (system at rest) and plugging an USB3 Flash
> drive into
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