On some boards there is no vbus_det gpio pin, instead vbus-detection for
otg can be done via the pmic.
This commit adds support for monitoring vbus_det via the power_supply
exported by the pmic, enabling support for otg on these boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
On Fri, 12 Jun 2015, Stefan Koch wrote:
Am Freitag, den 12.06.2015, 16:34 -0400 schrieb Alan Stern:
On Fri, 12 Jun 2015, Stefan Koch wrote:
Am Freitag, den 12.06.2015, 14:09 -0400 schrieb Alan Stern:
On Fri, 12 Jun 2015, Stefan Koch wrote:
There is a lot of questionable material
Hello.
On 6/13/2015 12:28 AM, Stefan Koch wrote:
To allow (1) or deny (0) interfaces a mask or interface attributes could
written.
Could be written, perhaps?
For interfaces that belongs together use the mask for authorization.
Belong.
As default each bit has the initial value of
Hi Felipe,
Here is a patch series with all my oustanding musb-sunxi changes pending
for merging into 4.3.
This includes the 5th iteration of the patch for adding the basic sunxi-glue,
the major change in v5 is that it has been ported to the extcon API changes
which are queued up for 4.2 from :
This is based on initial code to get the Allwinner sunxi musb controller
supported by Chen-Yu Tsai and Roman Byshko.
This adds support for the Allwinner sunxi musb controller in both host only
and otg mode. Peripheral only mode is not supported, as no boards use that.
This has been tested on a
The A33 SoC uses the same musb controller as found on the A31 and later,
but allwinner has removed the configdata register, this commit adds special
handling for this.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
.../devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt | 3 ++-
The A31 SoC uses the same musb controller as found in earlier SoCs, but it
is hooked up slightly different. Its SRAM is private and no longer controlled
through the SRAM controller, and its reset is controlled via a separate
reset controller. This commit adds support for this setup.
On Sat, 13 Jun 2015, Lu Baolu wrote:
Commit 25cd2882e2fc (usb/xhci: Change how we indicate a host supports
Link PM.) removed the code to set lpm_capable for USB 3.0 super-speed
root hub. The intention of that change was to avoid touching usb core
internal field, a.k.a. lpm_capable, and let
Commit 25cd2882e2fc (usb/xhci: Change how we indicate a host supports
Link PM.) removed the code to set lpm_capable for USB 3.0 super-speed
root hub. The intention of that change was to avoid touching usb core
internal field, a.k.a. lpm_capable, and let usb core to set it by
checking U1 and U2
Hi,
triggering suspend to RAM via sysfs on a i.MX28 causes a NULL pointer
dereference. This
regression seems to be introduced with commit efdbd3a5d6e
(usb: phy: mxs: do not set PWD.RXPWD1PT1 for low speed connection):
root@duckbill:/sys/power# echo mem state
[ 83.677575] PM: Syncing
Before this commit the code for determining the disconnect threshold was
checking for allwinner,sun4i-a10-usb-phy or allwinner,sun6i-a31-usb-phy
assuming that those where the exception and then newer SoCs would use a
disconnect threshold of 2 like sun7i does. But it turns out that newer
SoCs use a
The usb0 phy is connected to an OTG controller, and as such needs some special
handling:
1) It allows explicit control over the pullups, enable these on phy_init and
disable them on phy_exit.
2) It has bits to signal id and vbus detect to the musb-core, add support for
for monitoring id and vbus
Hi Jiri,
On Fri, 12 Jun 2015 11:30:20 +0200
Jiří Prchal jiri.prc...@aksignal.cz wrote:
On 11.6.2015 15:53, Alan Stern wrote:
On Thu, 11 Jun 2015, Jiří Prchal wrote:
Hi all,
I discovered some bug when I change kernel from 3.18.13 to 3.18.14. I have
board with usb hub CY7C65632 on
On Sat, 13 Jun 2015 13:09:56 +0200
Boris Brezillon boris.brezil...@free-electrons.com wrote:
Hi Jiri,
On Fri, 12 Jun 2015 11:30:20 +0200
Jiří Prchal jiri.prc...@aksignal.cz wrote:
On 11.6.2015 15:53, Alan Stern wrote:
On Thu, 11 Jun 2015, Jiří Prchal wrote:
Hi all,
I
Hi Kishon,
Here is a patch series with all my oustanding phy-sun4i-usb changes pending
for merging into 4.3.
This includes the 5th iteration of the OTG support addition, now with the
extcon provider support addition split-out into a new patch and ported to
the extcon API changes which are queued
The usb-phys on the sun8i-a33 SoC are mostly the same as sun8i-a23 but for
some reason (hw bug?) the phyctl register was moved to a different address
and is not initialized to 0 on reset.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
.../devicetree/bindings/phy/sun4i-usb-phy.txt | 1
The sunxi musb glue needs to know if a host or normal usb cable is plugged
in, add extcon support so that the musb glue can monitor the host status.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
Changes in v5:
-Split out of the Add id and vbus detection support commit
-Ported to the new
On some boards we cannot detect the presence of an external Vusb, because
e.g. the 5V of the otg connector is directly connected to the 5V of the board,
and thus is always high.
This commit adds support for using such boards by only looking at the
id-detection pin.
Signed-off-by: Hans de Goede
The usb-phys on the sun8i-a23 SoC have the same setup wrt clocks as on the
sun6i-a31 SoC, but there are only 2 instead of 3 like on the sun5i-a13 SoC.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt | 2 ++
drivers/phy/phy-sun4i-usb.c
Am 12.06.2015 um 13:36 schrieb Alexander Holler:
Am 12.06.2015 um 13:19 schrieb Alexander Holler:
Am 12.06.2015 um 09:25 schrieb Linus Walleij:
On Thu, Jun 11, 2015 at 6:40 PM, Alexander Holler
hol...@ahsoftware.de wrote:
Am 11.06.2015 um 14:30 schrieb Linus Walleij:
Certainly it is
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