On Fri, 2018-03-16 at 16:32 +0200, Roger Quadros wrote:
> +some TI folks
>
> Hi Martin,
>
> On 18/02/18 20:44, Martin Blumenstingl wrote:
> > Many SoC platforms have separate devices for the USB PHY which are
> > registered through the generic PHY framework. These PHYs have to be
> > enabled to
> -Original Message-
> From: netdev-ow...@vger.kernel.org [mailto:netdev-ow...@vger.kernel.org]
> On Behalf Of Geert Uytterhoeven
> Sent: Friday, March 16, 2018 3:52 PM
> To: Christoph Hellwig ; Marek Szyprowski
> ; Robin Murphy
Hi,
On 3/18/2018 6:19 PM, Rob Herring wrote:
> On Tue, Mar 13, 2018 at 04:06:00PM +0530, Manu Gautam wrote:
>> Existing documentation has lot of incorrect information as it
>> was originally added for a driver that no longer exists.
>>
>> Signed-off-by: Manu Gautam
>>
On Mon, Mar 19, 2018 at 6:36 AM, Rafael J. Wysocki wrote:
> On Fri, Mar 16, 2018 at 10:06 AM, Mathias Nyman
> wrote:
>> Adding Rafael directly to CC
>>
>> In short, if _S3D and _S3W are missing in DSDT then a PCI device
>> stays in D0 during
From: ShuFan Lee
Richtek RT1711H Type-C chip driver that works with
Type-C Port Controller Manager to provide USB PD and
USB Type-C functionalities.
Add definition of TCPC_CC_STATUS_TOGGLING.
Signed-off-by: ShuFan Lee
---
From: ShuFan Lee
This patch series add rt1711h typec chip driver and dt-bindings
changelogs between v1 & v2
- use gpiod_* instead of gpio_*
changelogs between v2 & v3
- add dt-bindings for rt1711h typec driver
ShuFan Lee (2):
staging: typec: rt1711h typec chip driver
From: ShuFan Lee
Add device tree binding document for Richtek RT1711H Type-C chip driver
Signed-off-by: ShuFan Lee
---
.../devicetree/bindings/usb/richtek,rt1711h.txt| 30 ++
1 file changed, 30 insertions(+)
create mode
On Sun, 2018-03-18 at 07:48 -0500, Rob Herring wrote:
> On Mon, Mar 12, 2018 at 01:25:40PM +0800, Chunfeng Yun wrote:
> > Add two properties of ref_clk and coefficient used by U2 slew rate
> > calibrate which may vary on different SoCs
> >
> > Signed-off-by: Chunfeng Yun
Hi Rob,
2018-03-18 21:52 GMT+09:00 Rob Herring :
> On Thu, Mar 15, 2018 at 08:39:58PM +0900, Masahiro Yamada wrote:
>> dwc3-of-simple.c only handles arbitrary number of clocks and resets.
>> They are both generic enough to be put into the dwc3 core. For simple
>> cases, a nested
On Fri, Mar 16, 2018 at 10:06 AM, Mathias Nyman
wrote:
> Adding Rafael directly to CC
>
> In short, if _S3D and _S3W are missing in DSDT then a PCI device
> stays in D0 during suspend in Linux, but goes to D3 in Windows.
>
> USB wake doesn't work in Geminilake
Hi Roger,
On Fri, Mar 16, 2018 at 3:32 PM, Roger Quadros wrote:
> +some TI folks
>
> Hi Martin,
>
> On 18/02/18 20:44, Martin Blumenstingl wrote:
>> Many SoC platforms have separate devices for the USB PHY which are
>> registered through the generic PHY framework. These PHYs have
On 03/16/2018 02:51 PM, Geert Uytterhoeven wrote:
Remove dependencies on HAS_DMA where a Kconfig symbol depends on another
symbol that implies HAS_DMA, and, optionally, on "|| COMPILE_TEST".
In most cases this other symbol is an architecture or platform specific
symbol, or PCI.
Generic symbols
Hi,
On 18-03-18 14:16, Greg Kroah-Hartman wrote:
On Fri, Mar 16, 2018 at 02:09:51PM -0500, Bin Liu wrote:
Hi,
The kernel usb stack and musb drivers have gone through some changes in
the past several kernel versions, such as adding otg fsm, musb runtime
PM, and musb otg state moving from musb
The Dell Inspiron 5775 is a Raven Ridge. The Enable Slot command timed
out when a USB device gets plugged:
[ 212.156326] xhci_hcd :03:00.3: Error while assigning device slot ID
[ 212.156340] xhci_hcd :03:00.3: Max number of devices this xHCI host
supports is 64.
[ 212.156348] usb
In
dwc3_request*r = NULL;
r = A;
the first assignment has no effect. Remove it.
Signed-off-by: Heinrich Schuchardt
---
drivers/usb/dwc3/ep0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/ep0.c
On Fri, Mar 16, 2018 at 02:09:51PM -0500, Bin Liu wrote:
> Hi,
>
> The kernel usb stack and musb drivers have gone through some changes in
> the past several kernel versions, such as adding otg fsm, musb runtime
> PM, and musb otg state moving from musb to musb->xceiv... I am wondering
> if the
On Thu, Mar 15, 2018 at 08:39:58PM +0900, Masahiro Yamada wrote:
> dwc3-of-simple.c only handles arbitrary number of clocks and resets.
> They are both generic enough to be put into the dwc3 core. For simple
> cases, a nested node structure like follows:
>
> dwc3-glue {
> compatible
On Tue, Mar 13, 2018 at 04:06:00PM +0530, Manu Gautam wrote:
> Existing documentation has lot of incorrect information as it
> was originally added for a driver that no longer exists.
>
> Signed-off-by: Manu Gautam
> ---
> .../devicetree/bindings/usb/qcom,dwc3.txt
On Mon, Mar 12, 2018 at 01:25:40PM +0800, Chunfeng Yun wrote:
> Add two properties of ref_clk and coefficient used by U2 slew rate
> calibrate which may vary on different SoCs
>
> Signed-off-by: Chunfeng Yun
> ---
>
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