Hi,
On Saturday 20 of July 2013 19:59:10 Greg KH wrote:
On Sat, Jul 20, 2013 at 10:32:26PM -0400, Alan Stern wrote:
On Sat, 20 Jul 2013, Greg KH wrote:
That should be passed using platform data.
Ick, don't pass strings around, pass pointers. If you have
platform
data you
On Sunday 21 of July 2013 16:37:33 Kishon Vijay Abraham I wrote:
Hi,
On Sunday 21 July 2013 04:01 PM, Tomasz Figa wrote:
Hi,
On Saturday 20 of July 2013 19:59:10 Greg KH wrote:
On Sat, Jul 20, 2013 at 10:32:26PM -0400, Alan Stern wrote:
On Sat, 20 Jul 2013, Greg KH wrote
board (Mini6410-compatible):
Tested-by: Tomasz Figa tomasz.f...@gmail.com
For v1:
Acked-by: Mike Turquette mturque...@linaro.org
Changes since v1:
- added patch for read-only muxes,
- exported configurable muxes and dividers,
- defined mout_syncmux as read-only mux,
- in DT-enabled case
This patch adds support for PLL6552 and PLL6553 PLLs present on Samsung
S3C64xx SoCs.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mike Turquette mturque...@linaro.org
---
drivers/clk/samsung/clk-pll.c | 160 ++
drivers/clk/samsung/clk-pll.h
This patch adds soc_is_s3c6400() and soc_is_s3c6410() macros that allow
to distinguish between specific SoCs from s3c64xx series that is needed
to handle differences between them.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/plat-samsung/include/plat/cpu.h | 4
1 file
This patch adds new, Common Clock Framework-based clock driver for Samsung
S3C64xx SoCs. The driver is just added, without actually letting the
platforms use it yet, since this requires more intermediate steps.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mike Turquette mturque
This patch migrates the s3c64xx platform to use the new clock driver
using Common Clock Framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-s3c64xx/Makefile| 2 +-
arch/arm/mach-s3c64xx/common.c| 21
This patch modifies s3c64xx DMA driver to prepare and unprepare clocks
in addition to enableind and disabling, since it is required by common
clock framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/mach-s3c64xx/dma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
This patch removes old clock management code of S3C64xx, since the
platform has been already moved to the new clock driver using Common
Clock Framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/mach-s3c64xx/clock.c | 1007 ---
arch/arm
On Monday 22 of July 2013 21:15:12 Fabio Estevam wrote:
On Mon, Jul 22, 2013 at 8:49 PM, Tomasz Figa tomasz.f...@gmail.com
wrote:
dev_dbg(dev-dev, s3c2410_start_hc:\n);
- clk_enable(usb_clk);
+ clk_prepare_enable(usb_clk);
clk_prepare_enable may fail, so you
Hi Alan,
On Monday 22 of July 2013 10:44:39 Alan Stern wrote:
On Mon, 22 Jul 2013, Kishon Vijay Abraham I wrote:
The PHY and the controller it is attached to are both physical
devices.
The connection between them is hardwired by the system
manufacturer and cannot be
[Fixed address of devicetree mailing list and added more people on CC.]
For reference, full thread can be found under following link:
http://thread.gmane.org/gmane.linux.ports.arm.kernel/252813
Best regards,
Tomasz
On Tuesday 23 of July 2013 09:29:32 Tomasz Figa wrote:
Hi Alan,
On Monday 22
Hi Manjunath,
Please see some comments inline.
On Monday 22 of July 2013 14:49:30 Manjunath Goudar wrote:
Separate the Samsung OHCI S3C host controller driver from ohci-hcd
host code so that it can be built as a separate driver module.
This work is part of enabling multi-platform kernels
Hi Sergei,
On Tuesday 23 of July 2013 15:22:44 Sergei Shtylyov wrote:
Hello.
On 23-07-2013 3:49, Tomasz Figa wrote:
Some platforms have read-only clock muxes that are preconfigured at
reset and cannot be changed at runtime. This patch extends mux clock
driver to allow handling such read
On Tuesday 23 of July 2013 10:37:05 Alan Stern wrote:
On Tue, 23 Jul 2013, Tomasz Figa wrote:
On Tuesday 23 of July 2013 09:29:32 Tomasz Figa wrote:
Hi Alan,
Thanks for helping to clarify the issues here.
Okay. Are PHYs _always_ platform devices?
They can be i2c, spi or any
On Tuesday 23 of July 2013 09:18:46 Greg KH wrote:
On Tue, Jul 23, 2013 at 08:48:24PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 23 July 2013 08:07 PM, Alan Stern wrote:
On Tue, 23 Jul 2013, Tomasz Figa wrote:
On Tuesday 23 of July 2013 09:29:32 Tomasz Figa wrote:
Hi Alan
On Tuesday 23 of July 2013 10:37:11 Greg KH wrote:
On Tue, Jul 23, 2013 at 06:50:29PM +0200, Tomasz Figa wrote:
Ick, no. Why can't you just pass the pointer to the phy itself? If
you
had a priv pointer to search from, then you could have just passed
the
original phy pointer
On Tuesday 23 of July 2013 12:44:23 Greg KH wrote:
On Tue, Jul 23, 2013 at 08:31:05PM +0100, Mark Brown wrote:
You don't know the id of the device you are looking up, due to
multiple devices being in the system (dynamic ids, look back earlier
in
this thread for details about that.)
On Tuesday 23 of July 2013 15:36:00 Alan Stern wrote:
On Tue, 23 Jul 2013, Tomasz Figa wrote:
IMHO it would be better if you provided some code example, but let's
try to check if I understood you correctly.
8
On Tuesday 23 of July 2013 11:04:14 Greg KH wrote:
On Tue, Jul 23, 2013 at 07:48:11PM +0200, Tomasz Figa wrote:
On Tuesday 23 of July 2013 10:37:11 Greg KH wrote:
On Tue, Jul 23, 2013 at 06:50:29PM +0200, Tomasz Figa wrote:
Ick, no. Why can't you just pass the pointer to the phy itself
On Tuesday 23 of July 2013 16:53:55 Alan Stern wrote:
On Tue, 23 Jul 2013, Tomasz Figa wrote:
That's what I was going to suggest too. The struct phy is defined
in
the board file, which already knows about all the PHYs that exist in
the system. (Or perhaps it is allocated dynamically
On Tuesday 23 of July 2013 13:50:07 Greg KH wrote:
On Tue, Jul 23, 2013 at 10:07:52PM +0200, Tomasz Figa wrote:
On Tuesday 23 of July 2013 12:44:23 Greg KH wrote:
On Tue, Jul 23, 2013 at 08:31:05PM +0100, Mark Brown wrote:
You don't know the id of the device you are looking up, due
This patch adds support for PLL6552 and PLL6553 PLLs present on Samsung
S3C64xx SoCs.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mike Turquette mturque...@linaro.org
---
drivers/clk/samsung/clk-pll.c | 77 +++
drivers/clk/samsung/clk-pll.h
This patch adds new, Common Clock Framework-based clock driver for Samsung
S3C64xx SoCs. The driver is just added, without actually letting the
platforms use it yet, since this requires more intermediate steps.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mike Turquette mturque
Hi Mike,
On Tuesday 23 of July 2013 01:49:18 Tomasz Figa wrote:
Some platforms have read-only clock muxes that are preconfigured at
reset and cannot be changed at runtime. This patch extends mux clock
driver to allow handling such read-only muxes by adding new
CLK_MUX_READ_ONLY mux flag
On Sunday 28 of July 2013 13:30:51 Mark Brown wrote:
On Wed, Jul 24, 2013 at 01:52:19AM +0200, Tomasz Figa wrote:
Changes since v2:
- Reworked to use new PLL registration method introduced by Yadwinder
Singh Brar's patch series:
( http://thread.gmane.org
Alan, Greg,
On Tuesday 23 of July 2013 01:49:23 Tomasz Figa wrote:
This patch modifies the ohci-s3c2410 driver to prepare and unprepare
clocks in addition to enabling and disabling, since it is required
by common clock framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
On Monday 05 of August 2013 12:02:16 Mike Turquette wrote:
Quoting Kukjin Kim (2013-08-05 11:13:55)
On 08/06/13 03:06, Mike Turquette wrote:
Quoting Kukjin Kim (2013-08-05 10:01:36)
On 07/23/13 08:49, Tomasz Figa wrote:
This series is an attempt to move clock support on Samsung
On Tuesday 06 of August 2013 12:47:51 Mike Turquette wrote:
Quoting Tomasz Figa (2013-08-05 16:42:16)
On Monday 05 of August 2013 12:02:16 Mike Turquette wrote:
Quoting Kukjin Kim (2013-08-05 11:13:55)
On 08/06/13 03:06, Mike Turquette wrote:
Quoting Kukjin Kim (2013-08-05 10
On Wednesday 07 of August 2013 07:11:40 Kukjin Kim wrote:
On 08/07/13 07:06, Tomasz Figa wrote:
On Tuesday 06 of August 2013 12:47:51 Mike Turquette wrote:
Quoting Tomasz Figa (2013-08-05 16:42:16)
On Monday 05 of August 2013 12:02:16 Mike Turquette wrote:
Quoting Kukjin Kim (2013-08
Hi Julius,
On Thursday 08 of August 2013 11:06:54 Julius Werner wrote:
I'm not sure I understand. The old documentation referred to the
USBDEVICE_PHY_CONTROL and USBHOST_PHY_CONTROL registers for a phy, and
your new version only refers to (usb device) PHY_CONTROL. Regardless
of
multiple
Hi Manjunath,
On Saturday 10 of August 2013 13:07:36 Manjunath Goudar wrote:
Separate the Samsung OHCI S3C host controller driver from ohci-hcd
host code so that it can be built as a separate driver module.
This work is part of enabling multi-platform kernels on ARM;
it would be nice to
On Tuesday 13 of August 2013 16:14:44 Kishon Vijay Abraham I wrote:
Hi,
On Wednesday 31 July 2013 11:45 AM, Felipe Balbi wrote:
Hi,
On Wed, Jul 31, 2013 at 11:14:32AM +0530, Kishon Vijay Abraham I wrote:
IMHO we need a lookup method for PHYs, just like for clocks,
regulators, PWMs
On Wednesday 14 of August 2013 00:19:28 Sylwester Nawrocki wrote:
W dniu 2013-08-13 14:05, Kishon Vijay Abraham I pisze:
On Tuesday 13 August 2013 05:07 PM, Tomasz Figa wrote:
On Tuesday 13 of August 2013 16:14:44 Kishon Vijay Abraham I wrote:
On Wednesday 31 July 2013 11:45 AM, Felipe
Hi Mike,
On Monday 05 of August 2013 11:06:25 Mike Turquette wrote:
Quoting Kukjin Kim (2013-08-05 10:01:36)
On 07/23/13 08:49, Tomasz Figa wrote:
This series is an attempt to move clock support on Samsung S3C64xx
SoCs
to Common Clock Framework.
First, support for PLL types
On Friday 16 of August 2013 14:02:03 Mike Turquette wrote:
Quoting Tomasz Figa (2013-08-16 03:44:44)
Hi Mike,
On Monday 05 of August 2013 11:06:25 Mike Turquette wrote:
Quoting Kukjin Kim (2013-08-05 10:01:36)
On 07/23/13 08:49, Tomasz Figa wrote:
This series
);
+
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_LICENSE(GPL);
MODULE_ALIAS(platform:s3c2410-ohci);
Looks good.
Reviewed-by: Tomasz Figa t.f...@samsung.com
Best regards,
Tomasz
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More
This patch modifies PLL6552 and PLL6553 clock drivers to use recently
added common Samsung PLL registration method.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
drivers/clk/samsung/clk-pll.c | 105 +-
drivers/clk/samsung/clk-pll.h | 6 +--
2
Hi Felipe,
On Tuesday 17 of September 2013 10:36:16 Felipe Balbi wrote:
Hi,
On Tue, Aug 27, 2013 at 01:27:48PM -0700, Julius Werner wrote:
*Ping!*
Are there still unanswered concerns left with this patch? I hope my
prior mails could clear up why I think that the PMU register
dereference for drivers that do not need any
overrides.
This patch fixes the problem by dereferencing the passed pointer to
ohci_driver_overrides struct only if it is non-NULL.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
drivers/usb/host/ohci-hcd.c | 10 ++
1 file changed, 6
Hi Kamil,
On Monday 28 of October 2013 14:52:19 Kamil Debski wrote:
Hi Kishon,
Thank you for your review! I will answer your comments below.
[snip]
+
+ switch (drv-cfg-cpu) {
+ case TYPE_EXYNOS4210:
+ case TYPE_EXYNOS4212:
Lets not add such cpu checks inside driver.
Some
Hi Matt.
On Friday 01 of November 2013 15:45:54 Matt Porter wrote:
Adds support for the generic PHY subsystem. Generic PHY
support is probed and then the driver falls back to checking
for an old style USB PHY and pdata if not found.
Signed-off-by: Matt Porter matt.por...@linaro.org
---
Hi Matt,
On Friday 01 of November 2013 15:45:50 Matt Porter wrote:
This adds a pair of APIs that allows the generic PHY subsystem to
provide information on the PHY bus width. The PHY provider driver may
use phy_set_bus_width() to set the bus width that the PHY supports.
The controller driver
On Saturday 02 of November 2013 13:47:09 Matt Porter wrote:
On Sat, Nov 02, 2013 at 10:46:55PM +0530, Kishon Vijay Abraham I wrote:
Hi Tomasz,
On Saturday 02 November 2013 06:44 PM, Tomasz Figa wrote:
Hi Matt,
On Friday 01 of November 2013 15:45:50 Matt Porter wrote:
This adds
Hi Kishon,
On Monday 04 of November 2013 12:24:42 Kishon Vijay Abraham I wrote:
Hi Vivek,
On Thursday 31 October 2013 01:15 PM, Vivek Gautam wrote:
Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs.
The new driver uses the generic PHY framework and will interact
with DWC3
On Tuesday 05 of November 2013 12:50:18 Vivek Gautam wrote:
Hi Kishon,
On Mon, Nov 4, 2013 at 6:42 PM, Kishon Vijay Abraham I kis...@ti.com
wrote:
Hi,
On Monday 04 November 2013 03:45 PM, Kamil Debski wrote:
Hi Kishon,
From: Kishon Vijay Abraham I [mailto:kis...@ti.com]
Sent:
Hi Kishon
On Wednesday 06 of November 2013 13:48:13 Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 05 November 2013 09:43 PM, Kamil Debski wrote:
Add a new driver for the Exynos USB PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
On Wednesday 06 of November 2013 18:20:36 Kishon Vijay Abraham I wrote:
Hi,
On Wednesday 06 November 2013 05:08 PM, Tomasz Figa wrote:
Hi Kishon
On Wednesday 06 of November 2013 13:48:13 Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 05 November 2013 09:43 PM, Kamil Debski wrote
Hi David,
On Wednesday 06 of November 2013 13:03:45 David Laight wrote:
I just did a diff of registers in exynos 4210 and 4212 PHY drivers [1]
and couldn't find that big a difference in register layout. Of course
there are a few changes in HSIC bit fields and PHYFSEL but that's only
Hi Vivek,
On Thursday 31 of October 2013 13:15:41 Vivek Gautam wrote:
Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs.
The new driver uses the generic PHY framework and will interact
with DWC3 controller present on Exynos5 series of SoCs.
Signed-off-by: Vivek Gautam
Hi Vivek,
On Thursday 31 of October 2013 13:15:42 Vivek Gautam wrote:
Update device tree bindings for DWC3 controller and
USB 3.0 phy present on Exynos 5250 SoC, to start using
the phy driver based on generic phy framework.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Hi Kamil,
Please see my comments inline.
On Tuesday 05 of November 2013 17:13:19 Kamil Debski wrote:
Add a new driver for the Exynos USB PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
SoC families.
Signed-off-by: Kamil Debski
Hi Kamil,
On Tuesday 05 of November 2013 17:13:20 Kamil Debski wrote:
Change the phy provider used from the old usb phy specific to a new one
using the generic phy framework.
I believe that until Exynos5250 also gets converted to the new PHY driver,
support for the old USB PHY API should
Hi Kamil,
This patch is changing a DT binding, but you haven't updated relevant
documentation. Please remember about it in next version.
On Tuesday 05 of November 2013 17:13:21 Kamil Debski wrote:
Change the used phy driver to the new Exynos USB phy driver that uses the
generic phy framework.
Hi Vivek,
On Tuesday 15 of January 2013 19:08:30 Vivek Gautam wrote:
Adding OHCI device tree node for Exynos5250 along with
the device base address.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Acked-by: Jingoo Han jg1@samsung.com
Acked-by: Grant Likely
Hi Vivek,
Don't you need also some clkdev lookup entry to make the clock available
in the driver?
Best regards,
Tomasz
On Tuesday 15 of January 2013 19:08:31 Vivek Gautam wrote:
Adding necessary device clock to exynos5 needed for
the DWC3 controller.
Signed-off-by: Vivek Gautam
Hi Vivek,
Same comment as for patch 2.
Best regards,
Tomasz
On Tuesday 15 of January 2013 19:08:32 Vivek Gautam wrote:
Adding DWC3 device tree node for Exynos5250 needed to
parse device tree data.
Also enabling XHCI support on exynos5250.
Signed-off-by: Vivek Gautam
Hi Vivek,
Same comment as for patch 2.
Best regards,
Tomasz
On Wednesday 16 of January 2013 11:15:43 Vivek Gautam wrote:
Adding EHCI device tree node for Exynos5250 along with
the device base adress and gpio line for vbus.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Acked-by:
to
majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Tested on Exynos4210-Trats.
Tested-by: Tomasz Figa t.f...@samsung.com
I also have patches for Exynos 4x12, which I will send once this series
and generic PMU isolation setting patches get merged.
Best
:
kobject_uevent(udc-dev.kobj, KOBJ_REMOVE);
device_unregister(udc-dev);
- if (gadget-register_my_device)
device_unregister(gadget-dev);
Correct me if I am wrong, but doesn't this patch leave us with incorrect
indentation?
Otherwise looks good.
Best regards,
Tomasz Figa
,
err_put_udc, err_put_gadget, err_ret.
Otherwise looks good. Nice idea.
Reviewed-by: Tomasz Figa tomasz.f...@gmail.com
Best regards,
Tomasz Figa
udc-gadget = gadget;
@@ -189,18 +197,22 @@ int usb_add_gadget_udc(struct device *parent,
struct usb_gadget *gadget)
ret = device_add(udc
s3c_hsotg_remove(struct
platform_device *pdev) }
s3c_hsotg_phy_disable(hsotg);
-
clk_disable_unprepare(hsotg-clk);
- device_unregister(hsotg-gadget.dev);
return 0;
}
Looks good.
Reviewed-by: Tomasz Figa tomasz.f...@gmail.com
Best regards,
Tomasz Figa
On Wednesday 27 of February 2013 14:00:25 Vivek Gautam wrote:
Hi Balbi,
On Wed, Feb 27, 2013 at 1:45 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Fri, Jan 18, 2013 at 02:30:21PM +0530, Praveen Paneri wrote:
Changes from v8:
Resending this patch series after rebasing to the latest
data and additional case in two switches.
Tested on Exynos4210-based Trats board and Exynos4412-based internal
Samsung board.
Tomasz Figa (6):
usb: phy: samsung: Select common driver part implicitly
usb: phy: samsung: Use clk_get to get reference clock
usb: phy: samsung: Consolidate reference
.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/usb/phy/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 7e8fe0f..5fb0939 100644
--- a/drivers/usb/phy
There is no need to use devm_clk_get to get a clock that is being put
at the end of the function.
This patch changes the code getting reference clock to use clk_get
instead of useless in this case devm_clk_get.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p
This patch cleans up handling of reference clock rate in Samsung USB PHY
drivers. It is mostly a cosmetic change but improves error handling in
case of failing to get reference clock or invalid clock rate.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p
This patch extends driver data structure with set_isolation callback,
which allows to remove the need for checking for SoC type in a switch
statement.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/usb/phy/phy-samsung-usb.c | 36
To remove unnecessary if statements, this patch introduces phy_enable
and phy_disable callbacks in driver data structure that implement
SoC-specific PHY initialization and deinitialization.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
This patch adds driver data for Exynos 4x12 USB 2.0 PHY.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/usb/phy/phy-samsung-usb.h | 1 +
drivers/usb/phy/phy-samsung-usb2.c | 18 ++
2 files changed, 19 insertions
Hi Felipe,
On Wednesday 27 of March 2013 15:19:58 Felipe Balbi wrote:
Hi,
On Tue, Mar 26, 2013 at 03:53:12PM +0100, Tomasz Figa wrote:
@@ -307,6 +310,7 @@ static int samsung_usb3phy_remove(struct
platform_device *pdev)
static struct samsung_usbphy_drvdata usb3phy_exynos5
On Wednesday 27 of March 2013 15:31:49 Felipe Balbi wrote:
Hi,
On Wed, Mar 27, 2013 at 02:26:08PM +0100, Tomasz Figa wrote:
Hi Felipe,
On Wednesday 27 of March 2013 15:19:58 Felipe Balbi wrote:
Hi,
On Tue, Mar 26, 2013 at 03:53:12PM +0100, Tomasz Figa wrote:
@@ -307,6
Hi Alan,
On 29.01.2014 21:42, Alan Stern wrote:
On Wed, 29 Jan 2014, Kamil Debski wrote:
Change the phy provider used from the old one using the USB phy
framework to a new one using the Generic phy framework.
Signed-off-by: Kamil Debski k.deb...@samsung.com
---
Hi Vivek,
This patch is just adding the PHY driver. I would also like to look at
some users of it, to see how this works when put together.
For now, please see my comments inline.
On 20.01.2014 14:42, Vivek Gautam wrote:
Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs.
The
Hi Vivek,
On 14.02.2014 14:53, Vivek Gautam wrote:
Changes from v2:
1) Added support for multiple PHYs (UTMI+ and PIPE3) and
related changes in the driver structuring.
I'm a bit skeptical about this separation. Can the PHY operate with just the
UTMI+ or PIPE3 part enabled alone without
On 05.02.2014 18:30, Olof Johansson wrote:
On Wed, Feb 5, 2014 at 7:57 AM, Kamil Debski k.deb...@samsung.com wrote:
Hi Olof,
Thank you for your review.
From: Olof Johansson [mailto:o...@lixom.net]
Sent: Wednesday, January 29, 2014 9:55 PM
Hi,
On Wed, Jan 29, 2014 at 9:29 AM, Kamil Debski
/samsung-usb2.txt
create mode 100644 drivers/phy/phy-exynos4210-usb2.c
create mode 100644 drivers/phy/phy-exynos4x12-usb2.c
create mode 100644 drivers/phy/phy-samsung-usb2.c
create mode 100644 drivers/phy/phy-samsung-usb2.h
Reviewed-by: Tomasz Figa t.f...@samsung.com
Best regards,
Tomasz
/phy/phy.h |8
2 files changed, 39 insertions(+)
Reviewed-by: Tomasz Figa t.f...@samsung.com
Best regards,
Tomasz
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Hi Libo,
On Saturday 11 of May 2013 14:28:15 Libo Chen wrote:
From: Libo Chen libo.c...@huawei.com
The patch subject is slightly misleading. It suggests that the patch only
changes clock handling, but in fact the biggest part of the patch is
conversion to devm_ helpers.
I think following
Hi Vivek,
On Tuesday 14 of May 2013 01:10:32 Vivek Gautam wrote:
Hi Dongjin,
On Mon, May 13, 2013 at 11:55 PM, Dongjin Kim tobet...@gmail.com
wrote:
This patch adds usb host phy (USB 2.0 PHY) support for Samsung
Exynos4X12 SoC. New functions,
samsung_exynos4x12_usb2phy_enable/_disable
.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/usb/phy/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 371d0e7..a2b9e18 100644
--- a/drivers/usb/phy
There is no need to use devm_clk_get to get a clock that is being put
at the end of the function.
This patch changes the code getting reference clock to use clk_get
instead of useless in this case devm_clk_get.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p
This patch extends driver data structure with set_isolation callback,
which allows to remove the need for checking for SoC type in a switch
statement.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/usb/phy/phy-samsung-usb.c | 36
This patch cleans up handling of reference clock rate in Samsung USB PHY
drivers. It is mostly a cosmetic change but improves error handling in
case of failing to get reference clock or invalid clock rate.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p
To remove unnecessary if statements, this patch introduces phy_enable
and phy_disable callbacks in driver data structure that implement
SoC-specific PHY initialization and deinitialization.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
This patch adds driver data for Exynos 4x12 USB 2.0 PHY.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/usb/phy/phy-samsung-usb.h | 1 +
drivers/usb/phy/phy-samsung-usb2.c | 18 ++
2 files changed, 19 insertions
/15] Final Samsung PWM support cleanup
http://www.spinics.net/lists/arm-kernel/msg248725.html
On S3C6410-based Tiny6410 board (Mini6410-compatible):
Tested-by: Tomasz Figa tomasz.f...@gmail.com
Tomasz Figa (7):
clk: samsung: pll: Add support for PLL6552 and PLL6553
clk: samsung: Add clock
This patch adds support for PLL6552 and PLL6553 PLLs present on Samsung
S3C64xx SoCs.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
drivers/clk/samsung/clk-pll.c | 160 ++
drivers/clk/samsung/clk-pll.h | 4 ++
2 files changed, 164 insertions
This patch migrates the s3c64xx platform to use the new clock driver
using Common Clock Framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-s3c64xx/Makefile| 2 +-
arch/arm/mach-s3c64xx/common.c| 21
This patch modifies the ohci-s3c2410 driver to prepare and unprepare
clocks in addition to enabling and disabling, since it is required
by common clock framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
drivers/usb/host/ohci-s3c2410.c | 8
1 file changed, 4 insertions(+), 4
This patch adds new, Common Clock Framework-based clock driver for Samsung
S3C64xx SoCs. The driver is just added, without actually letting the
platforms use it yet, since this requires more intermediate steps.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
.../bindings/clock/samsung
This patch adds soc_is_s3c6400() and soc_is_s3c6410() macros that allow
to distinguish between specific SoCs from s3c64xx series that is needed
to handle differences between them.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/plat-samsung/include/plat/cpu.h | 4
1 file
This patch removes old clock management code of S3C64xx, since the
platform has been already moved to the new clock driver using Common
Clock Framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/mach-s3c64xx/clock.c | 1007 ---
arch/arm
This patch modifies s3c64xx DMA driver to prepare and unprepare clocks
in addition to enableind and disabling, since it is required by common
clock framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/mach-s3c64xx/dma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
Hi Mike,
On Tuesday 11 of June 2013 19:54:51 Mike Turquette wrote:
Quoting Tomasz Figa (2013-06-05 16:57:26)
This patch adds new, Common Clock Framework-based clock driver for
Samsung S3C64xx SoCs. The driver is just added, without actually
letting the platforms use it yet, since
Hi Manjunath,
On Thursday 13 of June 2013 14:46:24 Manjunath Goudar wrote:
Suspend scenario in case of ohci-exynos glue was not
properly handled as it was not suspending generic part
of ohci controller.Calling explicitly the ohci_suspend()
routine in exynos_ohci_suspend() will ensure proper
On Wednesday 19 of June 2013 23:17:06 Kukjin Kim wrote:
On 06/06/13 08:57, Tomasz Figa wrote:
This series is an attempt to move clock support on Samsung S3C64xx SoCs
to Common Clock Framework.
Looks good :)
Thanks.
First, support for PLL types present on S3C64xx SoCs is added
This patch adds OF match table to the driver to allow instantiating it
using device tree.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../devicetree/bindings/usb/samsung-hsotg.txt | 40 ++
drivers/usb/gadget
This patch adds device tree nodes for USB OTG PHYs of Exynos4210 and
Exynos4x12 SoCs.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4210.dtsi | 15 +++
arch/arm/boot/dts/exynos4x12.dtsi | 15
-by: Tomasz Figa t.f...@samsung.com
Tomasz Figa (4):
usb: gadget: s3c-hsotg: Allow driver instantiation using device tree
ARM: dts: exynos4: Add node for hsotg
ARM: dts: exynos4: Add nodes for USB PHY block
ARM: dts: exynos4210-trats: Enable USB gadget functionality
.../devicetree/bindings/usb
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