> +Required properties:
> +
> +- compatible: Must be:
> + - Tegra124: "nvidia,tegra124-xusb-padctl"
> + - Tegra132: "nvidia,tegra132-xusb-padctl", "nvidia,tegra124-xusb-padctl"
> +- reg: Physical base address and length of the controller's registers.
> +- resets: Must contain
On Fri, Mar 4, 2016 at 8:19 AM, Thierry Reding wrote:
> From: Thierry Reding
>
> Extend the binding to cover the set of feature found in Tegra210.
>
> Signed-off-by: Thierry Reding
> +PCIe pad:
> +-
> +
> +Required
Hi Thierry,
On Fri, Mar 4, 2016 at 8:19 AM, Thierry Reding wrote:
> From: Thierry Reding
>
> The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a
> set of lanes that are used for PCIe, SATA and USB.
>
> Signed-off-by: Thierry
Hi Roger,
On Wed, Jul 15, 2015 at 6:26 AM, Roger Quadros rog...@ti.com wrote:
Hi Andrew,
On 13/07/15 22:14, Andrew Bresticker wrote:
Hi Roger,
On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros rog...@ti.com wrote:
Usage model:
---
- The OTG controller device is assumed
Hi Peter,
On Mon, Jul 13, 2015 at 5:59 PM, Peter Chen peter.c...@freescale.com wrote:
On Mon, Jul 13, 2015 at 12:14:43PM -0700, Andrew Bresticker wrote:
Hi Roger,
On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros rog...@ti.com wrote:
Usage model:
---
- The OTG controller device
Hi Roger,
On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros rog...@ti.com wrote:
Usage model:
---
- The OTG controller device is assumed to be the parent of
the host and gadget controller. It must call usb_otg_register()
before populating the host and gadget devices so that the OTG
Hi Mathias,
On Mon, May 25, 2015 at 8:05 AM, Mathias Nyman
mathias.ny...@linux.intel.com wrote:
I've been testing add/remove HCD extensively and didn't observe any
issues after applying
these 5 patches. Well there is one issue that comes up but it has nothing
to do with xhci
not being
Hi Jassi,
On Mon, May 11, 2015 at 8:56 PM, Jassi Brar jassisinghb...@gmail.com wrote:
Applied patches 2, 3, 6 7
Please drop patches 6 and 7. Lee Jones has NAK'ed the MFD driver, so
I'll have to re-spin this series without using an MFD.
Thanks,
andrew
--
To unsubscribe from this list: send
Add a binding document for the XUSB host complex on NVIDIA Tegra124
and later SoCs. The XUSB host complex includes a mailbox for
communication with the XUSB micro-controller and an xHCI host-controller.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Cc: Rob Herring robh...@kernel.org
Cc
Add device-tree bindings for the Tegra XUSB mailbox which will be used
for communication between the Tegra xHCI controller's firmware and the
host processor.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Cc: Rob Herring robh...@kernel.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark
On Wed, Apr 29, 2015 at 11:34 AM, Lee Jones lee.jo...@linaro.org wrote:
On Wed, 29 Apr 2015, Andrew Bresticker wrote:
Lee,
On Wed, Apr 29, 2015 at 2:25 AM, Lee Jones lee.jo...@linaro.org wrote:
On Mon, 27 Apr 2015, Andrew Bresticker wrote:
Add a binding document for the XUSB host
of the host-controller drivers and into xhci_gen_setup().
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Felipe Balbi ba...@ti.com
Cc: Mathias Nyman mathias.ny...@intel.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
---
No changes from v5/v6.
New for v5.
Peviously posted here
The mailbox controller's channel ops ought to be read-only.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Cc: Jassi Brar jassisinghb...@gmail.com
---
No changes from v5/v6.
New for v5.
---
include/linux/mailbox_controller.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
an ERR_PTR instead of NULL so that the
error can be propagated back to the caller of mbox_request_channel().
Signed-off-by: Benson Leung ble...@chromium.org
Signed-off-by: Andrew Bresticker abres...@chromium.org
Cc: Jassi Brar jassisinghb...@gmail.com
Cc: Suman Anna s-a...@ti.com
---
Changes from v6
Add a binding document for the XUSB host complex on NVIDIA Tegra124
and later SoCs. The XUSB host complex includes a mailbox for
communication with the XUSB micro-controller and an xHCI host-controller.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Cc: Rob Herring robh...@kernel.org
Cc
Add an MFD driver for the XUSB host complex found on NVIDIA Tegra124
and later SoCs.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Cc: Samuel Ortiz sa...@linux.intel.com
Cc: Lee Jones lee.jo...@linaro.org
---
New for v7.
---
drivers/mfd/Kconfig | 7 ++
drivers/mfd/Makefile
firmware.
The controller also supports USB device mode as well as powergating
of the SuperSpeed and host-controller logic when not in use, but
support for these is not yet implemented.
Based on work by:
Ajay Gupta aj...@nvidia.com
Bharath Yadav bya...@nvidia.com
Signed-off-by: Andrew Bresticker
Add device-tree bindings for the Tegra XUSB mailbox which will be used
for communication between the Tegra xHCI controller's firmware and the
host processor.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Cc: Rob Herring robh...@kernel.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark
driver. The requesting driver is assigned
one of two virtual channels when the single physical channel is
requested. All incoming messages are sent to both virtual channels.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Cc: Jassi Brar jassisinghb...@gmail.com
---
Changes from v6
Add device-tree binding documentation for the xHCI controller present
on Tegra124 and later SoCs.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Cc: Rob Herring robh...@kernel.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Ian Campbell ijc+devicet
:
- Converted mailbox driver to use the common mailbox framework.
- Fixed up host driver so that it can now be built and used as a module.
- Addressed Stephen's review comments.
- Misc. cleanups.
Andrew Bresticker (8):
xhci: Set shared HCD's hcd_priv in xhci_gen_setup
mailbox: Make struct
Hi Thierry,
Sorry for taking so awfully long to look at this. I've spent some time
looking at various pieces of documentation and I concluded that
representing the port assignment as muxing options doesn't seem right
after all. Instead I've come up with an alternate proposal (attached).
On Wed, Feb 25, 2015 at 1:15 PM, Thierry Reding
thierry.red...@gmail.com wrote:
On Wed, Feb 25, 2015 at 09:27:36AM -0800, Andrew Bresticker wrote:
Hi Thierry,
Sorry for taking so awfully long to look at this. I've spent some time
looking at various pieces of documentation and I concluded
On Tue, Dec 2, 2014 at 1:47 AM, Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Nov 24, 2014 at 04:17:17PM -0800, Andrew Bresticker wrote:
The Tegra xHCI controller's firmware communicates requests to the host
processor through a mailbox interface. While there is only a single
physical
On Tue, Nov 25, 2014 at 5:32 AM, Jassi Brar jaswinder.si...@linaro.org wrote:
On 25 November 2014 at 05:47, Andrew Bresticker abres...@chromium.org wrote:
This series adds support for xHCI on NVIDIA Tegra SoCs. This includes:
- patches 1, 2, and 3: minor cleanups for mailbox framework
On Tue, Nov 25, 2014 at 5:49 AM, Kishon Vijay Abraham I kis...@ti.com wrote:
Hi,
On Tuesday 25 November 2014 05:47 AM, Andrew Bresticker wrote:
In addition to the PCIe and SATA PHYs, the XUSB pad controller also
supports 3 UTMI, 2 HSIC, and 2 USB3 PHYs. Each USB3 PHY uses a single
PCIe
On Mon, Nov 24, 2014 at 12:34 AM, Jassi Brar jaswinder.si...@linaro.org wrote:
On 18 November 2014 at 04:11, Andrew Bresticker abres...@chromium.org wrote:
+
+static int tegra_xusb_mbox_send_data(struct mbox_chan *chan, void *data)
+{
+ struct tegra_xusb_mbox *mbox = to_tegra_mbox(chan
Add device-tree bindings for the Tegra XUSB mailbox which will be used
for communication between the Tegra xHCI controller's firmware and the
host processor.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
Acked-by: Jassi Brar jaswinder.si
firmware.
The controller also supports USB device mode as well as powergating
of the SuperSpeed and host-controller logic when not in use, but
support for these is not yet implemented.
Based on work by:
Ajay Gupta aj...@nvidia.com
Bharath Yadav bya...@nvidia.com
Signed-off-by: Andrew Bresticker
Add new bindings used for USB support by the Tegra XUSB pad controller.
This includes additional PHY types, USB-specific pinconfig properties, etc.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Acked-by: Linus Walleij linus.wall...@linaro.org
Reviewed-by: Stephen Warren swar
Assign USB ports previously owned by the EHCI controllers to the xHCI
controller. There is a mini-PCIe USB port (UTMI port 1) and a USB A
connector (UTMI port 2, USB3 port 0). PCIe lane 0 is used for USB3
port 0.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren
Add nodes for the Tegra XUSB mailbox and Tegra xHCI controller and
add the PHY mailbox channel to the XUSB padctl node.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v3/v4/v5.
Changes from v2:
- Dropped channel specifier
Add device-tree binding documentation for the xHCI controller present
on Tegra124 and later SoCs.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v5.
Changes from v4:
- Updated regulator names, as suggested by Thierry
for messages on the mailbox's PHY channel.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Acked-by: Linus Walleij linus.wall...@linaro.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v5.
Changes from v4:
- Disabled USB support on missing mailbox channel instead
Assign ports previously owned by the EHCI controllers to the xHCI
controller. There are two external USB ports (UTMI ports 0/2 and
USB3 ports 0/1) and an internal USB port (UTMI port 1). PCIe lanes
0 and 1 are used by the USB3 ports.
Signed-off-by: Andrew Bresticker abres...@chromium.org
driver. The requesting driver is assigned
one of two virtual channels when the single physical channel is
requested. All incoming messages are sent to both virtual channels.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
Thierry,
I've
The mailbox controller's channel ops ought to be read-only.
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
No changes from v5.
New for v5.
---
include/linux/mailbox_controller.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mailbox_controller.h
b
of the host-controller drivers and into xhci_gen_setup().
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Felipe Balbi ba...@ti.com
---
No changes from v5.
New for v5.
Peviously posted here: https://lkml.org/lkml/2014/10/30/726
---
drivers/usb/host/xhci-pci.c | 5 -
drivers/usb
an ERR_PTR instead of NULL so that the
error can be propagated back to the caller of mbox_request_channel().
Signed-off-by: Benson Leung ble...@chromium.org
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
No changes from v5.
New for v5.
---
drivers/mailbox/mailbox.c | 11 ---
1 file
comments.
- Misc. cleanups.
Andrew Bresticker (11):
xhci: Set shared HCD's hcd_priv in xhci_gen_setup
mailbox: Make struct mbox_controller's ops field const
of: Add NVIDIA Tegra XUSB mailbox binding
mailbox: Add NVIDIA Tegra XUSB mailbox driver
of: Update Tegra XUSB pad controller binding
On Mon, Nov 17, 2014 at 4:33 PM, Felipe Balbi ba...@ti.com wrote:
+static int tegra_xhci_load_firmware(struct tegra_xhci_hcd *tegra)
+{
+ struct device *dev = tegra-dev;
+ struct tegra_xhci_fw_cfgtbl *cfg_tbl;
+ struct tm fw_tm;
+ u32 val, code_tag_blocks,
to use the common mailbox framework.
- Fixed up host driver so that it can now be built and used as a module.
- Addressed Stephen's review comments.
- Misc. cleanups.
Andrew Bresticker (11):
xhci: Set shared HCD's hcd_priv in xhci_gen_setup
mailbox: Make struct mbox_controller's ops field const
Add device-tree binding documentation for the xHCI controller present
on Tegra124 and later SoCs.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
Changes from v4:
- Updated regulator names, as suggested by Thierry.
No changes from v3
Add new bindings used for USB support by the Tegra XUSB pad controller.
This includes additional PHY types, USB-specific pinconfig properties, etc.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Acked-by: Linus Walleij linus.wall...@linaro.org
Reviewed-by: Stephen Warren swar
for messages on the mailbox's PHY channel.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Acked-by: Linus Walleij linus.wall...@linaro.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
Changes from v4:
- Disabled USB support on missing mailbox channel instead of failing
to probe
firmware.
The controller also supports USB device mode as well as powergating
of the SuperSpeed and host-controller logic when not in use, but
support for these is not yet implemented.
Based on work by:
Ajay Gupta aj...@nvidia.com
Bharath Yadav bya...@nvidia.com
Signed-off-by: Andrew Bresticker
Assign ports previously owned by the EHCI controllers to the xHCI
controller. There are two external USB ports (UTMI ports 0/2 and
USB3 ports 0/1) and an internal USB port (UTMI port 1). PCIe lanes
0 and 1 are used by the USB3 ports.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Add nodes for the Tegra XUSB mailbox and Tegra xHCI controller and
add the PHY mailbox channel to the XUSB padctl node.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v4.
No changes from v3.
Changes from v2:
- Dropped
Assign USB ports previously owned by the EHCI controllers to the xHCI
controller. There is a mini-PCIe USB port (UTMI port 1) and a USB A
connector (UTMI port 2, USB3 port 0). PCIe lane 0 is used for USB3
port 0.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren
driver. The requesting driver is assigned
one of two virtual channels when the single physical channel is
requested. All incoming messages are sent to both virtual channels.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
Thierry,
I've
of the host-controller drivers and into xhci_gen_setup().
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
New for v5.
Peviously posted here: https://lkml.org/lkml/2014/10/30/726
---
drivers/usb/host/xhci-pci.c | 5 -
drivers/usb/host/xhci-plat.c | 5 -
drivers/usb/host/xhci.c
The mailbox controller's channel ops ought to be read-only.
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
New for v5.
---
include/linux/mailbox_controller.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mailbox_controller.h
b/include/linux
an ERR_PTR instead of NULL so that the
error can be propagated back to the caller of mbox_request_channel().
Signed-off-by: Benson Leung ble...@chromium.org
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
New for v5.
---
drivers/mailbox/mailbox.c | 11 ---
1 file changed, 8
Add device-tree bindings for the Tegra XUSB mailbox which will be used
for communication between the Tegra xHCI controller's firmware and the
host processor.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v3/v4.
Changes
Hi Felipe,
On Mon, Nov 17, 2014 at 3:12 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Mon, Nov 17, 2014 at 02:41:39PM -0800, Andrew Bresticker wrote:
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index a3ca137..e2415d3 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers
On Fri, Oct 31, 2014 at 9:41 AM, Andrew Bresticker
abres...@chromium.org wrote:
On Fri, Oct 31, 2014 at 4:32 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Thu, Oct 30, 2014 at 10:26:47AM -0700, Andrew Bresticker wrote:
On Thu, Oct 30, 2014 at 10:24 AM, Thierry Reding
thierry.red
On Fri, Oct 31, 2014 at 4:32 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Thu, Oct 30, 2014 at 10:26:47AM -0700, Andrew Bresticker wrote:
On Thu, Oct 30, 2014 at 10:24 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Thu, Oct 30, 2014 at 10:19:21AM -0700, Andrew Bresticker wrote
On Fri, Oct 31, 2014 at 2:44 AM, Linus Walleij linus.wall...@linaro.org wrote:
On Tue, Oct 28, 2014 at 11:27 PM, Andrew Bresticker
abres...@chromium.org wrote:
Add new bindings used for USB support by the Tegra XUSB pad controller.
This includes additional PHY types, USB-specific pinconfig
On Thu, Oct 30, 2014 at 6:22 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Wed, Oct 29, 2014 at 11:02:36AM -0700, Andrew Bresticker wrote:
[...]
Maybe something like this patch would be more correct in handling
this:
diff --git a/drivers/mailbox/mailbox.c b/drivers/mailbox
On Thu, Oct 30, 2014 at 6:45 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Wed, Oct 29, 2014 at 12:43:36PM -0700, Andrew Bresticker wrote:
diff --git a/drivers/pinctrl/pinctrl-tegra-xusb.c
b/drivers/pinctrl/pinctrl-tegra-xusb.c
[...]
+
+ for (i = 0; i TEGRA_XUSB_USB3_PHYS
On Thu, Oct 30, 2014 at 6:55 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Wed, Oct 29, 2014 at 09:37:14AM -0700, Andrew Bresticker wrote:
On Wed, Oct 29, 2014 at 2:43 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Tue, Oct 28, 2014 at 03:27:50PM -0700, Andrew Bresticker wrote
On Thu, Oct 30, 2014 at 10:24 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Thu, Oct 30, 2014 at 10:19:21AM -0700, Andrew Bresticker wrote:
On Thu, Oct 30, 2014 at 6:55 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Wed, Oct 29, 2014 at 09:37:14AM -0700, Andrew Bresticker wrote
of the host-controller drivers and into xhci_gen_setup().
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
drivers/usb/host/xhci-pci.c | 5 -
drivers/usb/host/xhci-plat.c | 5 -
drivers/usb/host/xhci.c | 6 +++---
3 files changed, 3 insertions(+), 13 deletions(-)
diff --git
On Wed, Oct 29, 2014 at 2:43 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Tue, Oct 28, 2014 at 03:27:50PM -0700, Andrew Bresticker wrote:
[...]
diff --git
a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
b/Documentation/devicetree/bindings/pinctrl/nvidia
+ for (i = 0; i ARRAY_SIZE(mbox-vchan_allocated); i++) {
+ if (mbox-vchan_allocated[i])
+ mbox_chan_received_data(mbox-mbox.chans[i], msg);
+ }
It seems like the only reason why you need to explicitly check for an
allocated channel is that
diff --git a/drivers/pinctrl/pinctrl-tegra-xusb.c
b/drivers/pinctrl/pinctrl-tegra-xusb.c
[...]
struct tegra_xusb_padctl_function {
const char *name;
const char * const *groups;
@@ -72,6 +222,16 @@ struct tegra_xusb_padctl_soc {
const struct tegra_xusb_padctl_lane
Add device-tree bindings for the Tegra XUSB mailbox which will be used
for communication between the Tegra xHCI controller's firmware and the
host processor.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v3.
Changes from
Assign ports previously owned by the EHCI controllers to the xHCI
controller. There are two external USB ports (UTMI ports 0/2 and
USB3 ports 0/1) and an internal USB port (UTMI port 1). PCIe lanes
0 and 1 are used by the USB3 ports.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Assign USB ports previously owned by the EHCI controllers to the xHCI
controller. There is a mini-PCIe USB port (UTMI port 1) and a USB A
connector (UTMI port 2, USB3 port 0). PCIe lane 0 is used for USB3
port 0.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren
Add nodes for the Tegra XUSB mailbox and Tegra xHCI controller and
add the PHY mailbox channel to the XUSB padctl node.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v3.
Changes from v2:
- Dropped channel specifier from
Add new bindings used for USB support by the Tegra XUSB pad controller.
This includes additional PHY types, USB-specific pinconfig properties, etc.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
Changes from v2:
- Added nvidia,otg-hs
driver. The requesting driver is assigned
one of two virtual channels when the single physical channel is
requested. All incoming messages are sent to both virtual channels.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from
On Wed, Sep 17, 2014 at 8:41 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 09/16/2014 05:51 PM, Andrew Bresticker wrote:
On Tue, Sep 16, 2014 at 4:15 PM, Stephen Warren swar...@wwwdotorg.org
wrote:
On 09/16/2014 04:46 PM, Andrew Bresticker wrote:
On Tue, Sep 16, 2014 at 9:57 AM
Add new bindings used for USB support by the Tegra XUSB pad controller.
This includes additional PHY types, USB-specific pinconfig properties, etc.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
Changes from v2:
- Added nvidia,otg-hs
Add device-tree binding documentation for the xHCI controller present
on Tegra124 and later SoCs.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v3.
Changes from v2:
- Added mbox-names property.
Changes from v1
as powergating of the SuperSpeed and host-controller logic
when not in use, but support for these is not yet implemented.
Based on work by:
Ajay Gupta aj...@nvidia.com
Bharath Yadav bya...@nvidia.com
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
Assign ports previously owned by the EHCI controllers to the xHCI
controller. There are two external USB ports (UTMI ports 0/2 and
USB3 ports 0/1) and an internal USB port (UTMI port 1). PCIe lanes
0 and 1 are used by the USB3 ports.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Add nodes for the Tegra XUSB mailbox and Tegra xHCI controller and
add the PHY mailbox channel to the XUSB padctl node.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v3.
Changes from v2:
- Dropped channel specifier from
Assign USB ports previously owned by the EHCI controllers to the xHCI
controller. There is a mini-PCIe USB port (UTMI port 1) and a USB A
connector (UTMI port 2, USB3 port 0). PCIe lane 0 is used for USB3
port 0.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren
Add device-tree bindings for the Tegra XUSB mailbox which will be used
for communication between the Tegra xHCI controller's firmware and the
host processor.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v3.
Changes from
for messages on the mailbox's PHY channel.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Acked-by: Linus Walleij linus.wall...@linaro.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from v3.
Changes from v2:
- Added support for nvidia,otg-hs-curr-level-offset property
/8/18/504
[2] https://github.com/abrestic/linux/tree/tegra-xhci-v4
[3] https://patchwork.ozlabs.org/patch/384013/
[4] git://nv-tegra.nvidia.com/linux-3.10.git
Andrew Bresticker (9):
of: Add NVIDIA Tegra XUSB mailbox binding
mailbox: Add NVIDIA Tegra XUSB mailbox driver
of: Update Tegra XUSB
driver. The requesting driver is assigned
one of two virtual channels when the single physical channel is
requested. All incoming messages are sent to both virtual channels.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Stephen Warren swar...@nvidia.com
---
No changes from
On Tue, Sep 16, 2014 at 8:26 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 09/15/2014 01:30 PM, Andrew Bresticker wrote:
On Mon, Sep 15, 2014 at 11:09 AM, Stephen Warren swar...@wwwdotorg.org
wrote:
On 09/15/2014 11:06 AM, Andrew Bresticker wrote:
On Mon, Sep 15, 2014 at 12:00 AM
On Tue, Sep 16, 2014 at 9:57 AM, Andrew Bresticker
abres...@chromium.org wrote:
On Tue, Sep 16, 2014 at 8:26 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 09/15/2014 01:30 PM, Andrew Bresticker wrote:
On Mon, Sep 15, 2014 at 11:09 AM, Stephen Warren swar...@wwwdotorg.org
wrote:
On 09
On Tue, Sep 16, 2014 at 3:40 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 09/16/2014 10:57 AM, Andrew Bresticker wrote:
On Tue, Sep 16, 2014 at 8:26 AM, Stephen Warren swar...@wwwdotorg.org
wrote:
On 09/15/2014 01:30 PM, Andrew Bresticker wrote:
On Mon, Sep 15, 2014 at 11:09 AM
On Tue, Sep 16, 2014 at 4:15 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 09/16/2014 04:46 PM, Andrew Bresticker wrote:
On Tue, Sep 16, 2014 at 9:57 AM, Andrew Bresticker
abres...@chromium.org wrote:
On Tue, Sep 16, 2014 at 8:26 AM, Stephen Warren swar...@wwwdotorg.org
wrote:
On 09
On Mon, Sep 15, 2014 at 12:00 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 12 September 2014 18:37, Andrew Bresticker abres...@chromium.org wrote:
On Tue, Sep 9, 2014 at 1:21 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 8 September 2014 18:22, Andrew Bresticker abres...@chromium.org
On Mon, Sep 15, 2014 at 11:09 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 09/15/2014 11:06 AM, Andrew Bresticker wrote:
On Mon, Sep 15, 2014 at 12:00 AM, Tomeu Vizoso to...@tomeuvizoso.net
wrote:
On 12 September 2014 18:37, Andrew Bresticker abres...@chromium.org
wrote:
On Tue, Sep
On Tue, Sep 9, 2014 at 1:21 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 8 September 2014 18:22, Andrew Bresticker abres...@chromium.org wrote:
On Mon, Sep 8, 2014 at 8:34 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 2 September 2014 23:34, Andrew Bresticker abres...@chromium.org wrote
On Tue, Sep 9, 2014 at 1:21 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 8 September 2014 18:22, Andrew Bresticker abres...@chromium.org wrote:
On Mon, Sep 8, 2014 at 8:34 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 2 September 2014 23:34, Andrew Bresticker abres...@chromium.org wrote
On Mon, Sep 8, 2014 at 8:34 AM, Tomeu Vizoso to...@tomeuvizoso.net wrote:
On 2 September 2014 23:34, Andrew Bresticker abres...@chromium.org wrote:
Tested on Venice2, Jetson TK1, and Big with a variety of USB2.0 and
USB3.0 memory sticks and ethernet dongles using controller firmware
recently
Mathias,
On Tue, Aug 19, 2014 at 10:01 AM, Andrew Bresticker
abres...@chromium.org wrote:
It was suggested in the review of the Tegra xHCI driver [1] that we
allow xHCI drivers to be built as individual modules (like EHCI) instead
of building them all into the single xhci-hcd module
as powergating of the SuperSpeed and host-controller logic
when not in use, but support for these is not yet implemented.
Based on work by:
Ajay Gupta aj...@nvidia.com
Bharath Yadav bya...@nvidia.com
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
Changes from v2:
- Added filtering out
Add device-tree bindings for the Tegra XUSB mailbox which will be used
for communication between the Tegra xHCI controller's firmware and the
host processor.
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
Changes from v2:
- Dropped channel specifier.
- Added pointer to mailbox
Add nodes for the Tegra XUSB mailbox and Tegra xHCI controller and
add the PHY mailbox channel to the XUSB padctl node.
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
Changes from v2:
- Dropped channel specifier from mailbox bindings.
- Added mbox-names properties.
Changes from v1
Assign USB ports previously owned by the EHCI controllers to the xHCI
controller. There is a mini-PCIe USB port (UTMI port 1) and a USB A
connector (UTMI port 2, USB3 port 0). PCIe lane 0 is used for USB3
port 0.
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
Changes from v2
Add new bindings used for USB support by the Tegra XUSB pad controller.
This includes additional PHY types, USB-specific pinconfig properties, etc.
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
Changes from v2:
- Added nvidia,otg-hs-curr-level-offset property.
- Dropped -otg from
Add device-tree binding documentation for the xHCI controller present
on Tegra124 and later SoCs.
Signed-off-by: Andrew Bresticker abres...@chromium.org
---
Changes from v2:
- Added mbox-names property.
Changes from v1:
- Updated to use common mailbox bindings.
- Added remaining XUSB-related
] git://nv-tegra.nvidia.com/linux-3.10.git
Andrew Bresticker (9):
of: Add NVIDIA Tegra XUSB mailbox binding
mailbox: Add NVIDIA Tegra XUSB mailbox driver
of: Update Tegra XUSB pad controller binding for USB
pinctrl: tegra-xusb: Add USB PHY support
of: Add NVIDIA Tegra xHCI controller
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