Hi Peter
On Fri, 2017-06-09 at 08:26 +, Peter Chen wrote:
>
> >
> > I have a look at your patches
> > (http://www.spinics.net/lists/linux-usb/msg157134.html)
> > and I wonder if power sequence is applicable only on hub node?
>
> No, power sequence can be used for any devices which needs
Hi Peter
I have a look at your patches
(http://www.spinics.net/lists/linux-usb/msg157134.html) and I wonder
if power sequence is applicable only on hub node? hub are probed too late
(after ci_ulpi_init). Do
you think it is possible to read a power sequence in dts from ci_ulpi_init?
Thanks
On Wed, 2017-06-07 at 09:43 +0800, Peter Chen wrote:
> On Tue, Jun 06, 2017 at 07:36:10PM +0200, Fabien Lahoudere wrote:
> > Hi Peter,
> >
> > On Tue, 2017-06-06 at 09:55 +0800, Peter Chen wrote:
> > > On Mon, Jun 05, 2017 at 11:52:26AM +0200, Fabien Lahoudere wro
Hi Peter,
On Tue, 2017-06-06 at 09:55 +0800, Peter Chen wrote:
> On Mon, Jun 05, 2017 at 11:52:26AM +0200, Fabien Lahoudere wrote:
> > On Mon, 2017-06-05 at 17:43 +0800, Peter Chen wrote:
> > > On Mon, Jun 05, 2017 at 10:57:00AM +0200, Fabien Lahoudere wrote:
> > > &g
On Mon, 2017-06-05 at 17:43 +0800, Peter Chen wrote:
> On Mon, Jun 05, 2017 at 10:57:00AM +0200, Fabien Lahoudere wrote:
> > On Fri, 2017-06-02 at 15:00 -0700, Stephen Boyd wrote:
> > > On 05/26, Fabien Lahoudere wrote:
> > > > Hello
> > > >
> > >
On Fri, 2017-06-02 at 15:00 -0700, Stephen Boyd wrote:
> On 05/26, Fabien Lahoudere wrote:
> > Hello
> >
> > I modify ci_hrdc_imx_probe to bypass "data->phy =
> > devm_usb_get_phy_by_phandle(>dev,
> > "fsl,usbphy", 0);". Everything wo
e.
The conclusion is that using ulpi_bus to manage our phy doesn't improve and we
reach the same issue.
I will try to check if we don't do bad things in hw_phymode_configure.
If anyone have an idea it is welcome??
Fabien
On Thu, 2017-05-25 at 12:36 +0200, Fabien Lahoudere wrote:
> On Tue, 2
On Tue, 2017-05-23 at 14:00 -0700, Stephen Boyd wrote:
> On 05/23, Fabien Lahoudere wrote:
> > Hi,
> >
> > We investigate on the topic and now our device tree look like:
> >
> > in imx53.dtsi:
> >
> > usbh2: usb@53f80400 {
> > compatible
eset. This patch
> > extends the existing USB generic nop phy driver to include a new
> > initialization path.
> >
> > A new compatible string "smsc,usb3315" is used to decide which
> > initialization path to use.
> >
>
> Hi Peter,
>
> This
inding because we can disable the feature by using an
existing binding
Fabien Lahoudere (2):
usb: chipidea: imx: configure imx for ULPI phy
usb: chipidea: imx: Disable internal 60Mhz clock with ULPI PHY
drivers/usb/chipidea/ci_hdrc_imx.c | 4 ++
drivers/usb/chipidea/ci_hdrc_imx
for features if they exist for this index.
This patch also remove useless test of reg and val. Those two values cannot
be NULL.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 4 ++
drivers/usb/chipidea/ci_hdrc_imx.h | 1 +
d
The internal 60Mhz clock for host2 and host3 are useless in ULPI
phy mode, so we disable it when configuring ULPI PHY node for
those host.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/usbmisc_imx.c | 11 +++
1 file changed, 11 inse
Hi,
On 23/09/16 21:47, Rob Herring wrote:
On Wed, Sep 21, 2016 at 11:07:07AM +0200, Fabien Lahoudere wrote:
This binding allow to disable the internal 60Mhz clock for USB host2 or
host3.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
Documentation/devicetree/bi
Hi,
On 26/09/16 10:18, Sascha Hauer wrote:
On Wed, Sep 21, 2016 at 11:07:07AM +0200, Fabien Lahoudere wrote:
This binding allow to disable the internal 60Mhz clock for USB host2 or
host3.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
Documentation/devicetree/bi
for features if they exist for this index.
This patch also remove useless test of reg and val. Those two values cannot
be NULL.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 5 +++
drivers/usb/chipidea/ci_hdrc_imx.h | 1 +
d
This binding allow to disable the internal 60Mhz clock for USB host2 or
host3.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt | 1 +
drivers/usb/chipidea/ci_hdrc_imx.c | 2 ++
drive
e on the same column as switch)
- Remove useless test in "Change switch order"
Changes in V5:
- Squash "Change switch order" and "configure imx for ULPI phy"
- Add device tree binding documentation
Fabien Lahoudere (2):
usb: chipidea: imx: co
Hi,
On 21/09/16 09:12, Peter Chen wrote:
On Mon, Sep 19, 2016 at 01:45:39PM +0200, Fabien Lahoudere wrote:
In order to use ULPI phy with usb host 2 and 3, we need to configure
controller register to enable ULPI features.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co
Hi,
On 21/09/16 08:57, Peter Chen wrote:
On Mon, Sep 19, 2016 at 01:45:38PM +0200, Fabien Lahoudere wrote:
Each USB controller have different behaviour, so in order to avoid to have
several "swicth(data->index)" and lock/unlock, we prefer to get the index
switch and then test
annot
be NULL.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/usbmisc_imx.c | 38 --
1 file changed, 24 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/chipidea/usbmisc_imx.c
b/drivers/usb/chipidea/
In order to use ULPI phy with usb host 2 and 3, we need to configure
controller register to enable ULPI features.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 5 +
drivers/usb/chipidea/ci_hdrc_imx.h | 1 +
drivers/usb/ch
This binding allow to disable the internal 60Mhz clock for USB host2 and
host3.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 2 ++
drivers/usb/chipidea/ci_hdrc_imx.h | 1 +
drivers/usb/chipidea/usbmisc_imx.c | 13 ++
e on the same column as switch)
- Remove useless test in "Change switch order"
Fabien Lahoudere (3):
usb: chipidea: imx: Change switch order
usb: chipidea: imx: configure imx for ULPI phy
usb: chipidea: imx: Add binding to disable USB 60Mhz clock
drivers/usb/chipidea/ci_hd
Please forget this submission.
On 19/09/16 12:18, Fabien Lahoudere wrote:
Each USB controller have different behaviour, so in order to avoid to have
several "swicth(data->index)" and lock/unlock, we prefer to get the index
and then test for features if they exist for this index
Each USB controller have different behaviour, so in order to avoid to have
several "swicth(data->index)" and lock/unlock, we prefer to get the index
and then test for features if they exist for this index.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk&g
In order to use ULPI phy with usb host 2 and 3, we need to configure
controller register to enable ULPI features.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 5 +
drivers/usb/chipidea/ci_hdrc_imx.h | 1 +
drivers/usb/ch
This binding allow to disable the internal 60Mhz clock for USB host2 and
host3.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 2 ++
drivers/usb/chipidea/ci_hdrc_imx.h | 1 +
drivers/usb/chipidea/usbmisc_imx.
Each USB controller have different behaviour, so in order to avoid to have
several "swicth(data->index)" and lock/unlock, we prefer to get the index
and then test for features if they exist for this index.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk&g
Hi,
I have splitted the patch to submit only imx53 configuration. I will
follow Stephen submission to test it with my board and add needed code
to solve my clock issue.
Thanks
Fabien
On 14/09/16 12:14, Peter Chen wrote:
On Tue, Sep 13, 2016 at 08:05:32PM +0200, Fabien Lahoudere wrote
This binding allow to disable the internal 60Mhz clock for USB host2 and
host3.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 2 ++
drivers/usb/chipidea/ci_hdrc_imx.h | 1 +
drivers/usb/chipidea/usbmisc_imx.
In order to use ULPI phy with usb host 2 and 3, we need to configure
controller register to enable ULPI features.
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
drivers/usb/chipidea/ci_hdrc_imx.c | 5 +++
drivers/usb/chipidea/ci_hdrc_imx.h | 1 +
drivers/usb/ch
Hi Peter,
First thank you for your help.
On 13/09/16 08:52, Peter Chen wrote:
On Mon, Sep 12, 2016 at 12:06:10PM +0200, Fabien Lahoudere wrote:
On 12/09/16 11:46, Peter Chen wrote:
On Mon, Sep 12, 2016 at 11:13:01AM +0200, Fabien Lahoudere wrote:
Hi,
Yes, please send the patch and tell
On 12/09/16 11:46, Peter Chen wrote:
On Mon, Sep 12, 2016 at 11:13:01AM +0200, Fabien Lahoudere wrote:
Hi,
Yes, please send the patch and tell me which dts and ULPI code you are
using. We need to understand why the system is hang when configure the
PHY mode at portsc for your case, afaik
Hi,
On 10/09/16 05:35, Peter Chen wrote:
On Fri, Sep 09, 2016 at 12:50:45PM +0200, Fabien Lahoudere wrote:
Hi,
Thanks for your reply.
On 09/09/16 09:42, Peter Chen wrote:
On Thu, Sep 08, 2016 at 10:00:22AM +0200, Fabien Lahoudere wrote:
Hi,
I have an imx53 based boards with an ULPI phy
};
...
After those changes, the system freeze when in hw_phymode_configure() when
doing :
hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
If we call calling usb_phy_init() before hw_phymode_configure() (see core.c),
the freeze
is solved and we can enumerate USB device and everyth
Hi,
Thanks for your reply.
On 09/09/16 09:42, Peter Chen wrote:
On Thu, Sep 08, 2016 at 10:00:22AM +0200, Fabien Lahoudere wrote:
Hi,
I have an imx53 based boards with an ULPI phy (smsc 3315) connected to usbh2
and usbh3 and encounter problem with patch
"usb: chipidea: coordinate us
This driver copy the configuration of the controller EEPROM via i2c.
Configuration information is available in Documentation/usb/usb251x.txt
Signed-off-by: Fabien Lahoudere <fabien.lahoud...@collabora.co.uk>
---
Documentation/devicetree/bindings/usb/usb251x.txt | 27 +++
drivers/us
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