On Fri, Sep 14, 2018 at 03:01:22PM +0200, Greg KH wrote:
> On Fri, Sep 14, 2018 at 03:33:29PM +0300, Mathias Nyman wrote:
> > From: Thierry Reding
> >
> > The XUSB firmware header is in little endian byte order, so make the
> > fields __le32 and __le16 instead of u3
On Fri, Aug 24, 2018 at 02:33:35PM -0700, Ajay Gupta wrote:
> Latest NVIDIA GPU card has USB Type-C interface. There is a
> Type-C controller which can be accessed over I2C.
>
> This driver add I2C bus driver to communicate with Type-C controller.
> I2C client driver will be part of USB Type-C
nvidia.com>
> ---
>
> Changes since V1:
> - None
>
> drivers/usb/host/xhci-tegra.c | 68
> +++
> 1 file changed, 49 insertions(+), 19 deletions(-)
Seems fine to me:
Reviewed-by: Thierry Reding <tred...@nvidia.com>
Acked-by: Thierry Reding <tred...@nvidia.com>
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Description: PGP signature
err(dev, "failed to enable PHYs: %d\n", err);
> + goto disable_regulator;
> + }
> +
> + return 0;
> +
> +disable_regulator:
> + regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies);
> +disable_clk:
> + tegra_xusb_clk_disable(tegra);
> + return err;
> +}
> +
> +
There's an extra blank line here. Other than that, this looks very nice.
Reviewed-by: Thierry Reding <tred...@nvidia.com>
Acked-by: Thierry Reding <tred...@nvidia.com>
signature.asc
Description: PGP signature
ore we enable the clocks, regulators and PHY and so prepare
> for adding runtime PM support, by moving the call to usb_create_hcd()
> before we enable the hardware.
>
> Signed-off-by: Jon Hunter <jonath...@nvidia.com>
Acked-by: Thierry Reding <tred...@nvidia.com>
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Description: PGP signature
On Thu, Mar 08, 2018 at 09:31:07PM +, Jon Hunter wrote:
>
> On 01/03/18 14:18, Mathias Nyman wrote:
> > On 14.02.2018 18:34, Jon Hunter wrote:
> >> Add runtime PM support to the Tegra XHCI driver and move the function
> >> calls to enable/disable the clocks, regulators and PHY into the
On Wed, Jul 19, 2017 at 05:59:08PM +0200, Philipp Zabel wrote:
> From: Vivek Gautam <vivek.gau...@codeaurora.org>
>
> Make use of of_reset_control_array_get_exclusive() to manage
> an array of reset controllers available with the device.
>
> Cc: Jon Hunter <jonath..
On Tue, Dec 19, 2017 at 05:58:07AM +0300, Dmitry Osipenko wrote:
> USB Ethernet gadget now works on Tegra30.
>
> Signed-off-by: Dmitry Osipenko <dig...@gmail.com>
> ---
> drivers/usb/chipidea/ci_hdrc_tegra.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-
On Mon, Dec 11, 2017 at 02:07:38AM +0300, Dmitry Osipenko wrote:
> UTMI pads are shared by USB controllers and reset of UTMI pads is shared
> with the reset of USB1 controller. Currently reset of UTMI pads is done by
> the EHCI driver and ChipIdea UDC works because EHCI driver always happen
> to
On Mon, Dec 11, 2017 at 02:10:00AM +0300, Dmitry Osipenko wrote:
> UDC driver won't probe without Tegra's PHY, hence select it in the
> Kconfig.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/usb/chipidea/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On Mon, Dec 11, 2017 at 02:09:59AM +0300, Dmitry Osipenko wrote:
> Add Kconfig entry so that other drivers other than ehci-tegra
> (like ChipIdea) could add Tegra's PHY to build dependencies.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/usb/host/Kconfig | 2 +-
>
On Mon, Dec 11, 2017 at 01:55:35AM +0300, Dmitry Osipenko wrote:
> This fixes "utmi_phy_clk_enable: timeout waiting for phy to stabilize"
> error message.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/usb/phy/phy-tegra-usb.c | 13 -
> 1 file changed, 4
On Mon, Dec 11, 2017 at 02:07:37AM +0300, Dmitry Osipenko wrote:
> Tegra's PHY driver has a mix of pr_err() and dev_err(), let's switch to
> dev_err() and use common errors message formatting across the driver for
> consistency.
>
> Signed-off-by: Dmitry Osipenko
> ---
>
++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Thierry Reding <tred...@nvidia.com>
signature.asc
Description: PGP signature
>
> ---
> Changes since V1:
> - Added fixes tag
> - Added test in PHY enable to see if clock is already on before enabling
>
> drivers/usb/phy/phy-tegra-usb.c | 17 +
> 1 file changed, 17 insertions(+)
Acked-by: Thierry Reding <tred...@nvidia.com>
signature.asc
Description: PGP signature
On Thu, Jul 06, 2017 at 02:20:04AM +0300, Dmitry Osipenko wrote:
> On 06.07.2017 01:54, Stephen Warren wrote:
> > On 07/05/2017 04:13 PM, Dmitry Osipenko wrote:
> >> On 05.07.2017 23:31, Stephen Warren wrote:
> >>> On 07/05/2017 11:19 AM, Dmitry Osipenko wrote:
>
mfd}/twl.h| 0
> sound/soc/codecs/twl4030.c | 2 +-
> 25 files changed, 26 insertions(+), 26 deletions(-)
> rename include/linux/{i2c => mfd}/twl.h (100%)
I didn't see this get applied yet, so just in case anyone was waiting
for me (this is trivial, so I don't
host/xhci-mtk.c |1 -
> drivers/usb/host/xhci-tegra.c |1 -
> 2 files changed, 2 deletions(-)
For Tegra:
Tested-by: Thierry Reding <tred...@nvidia.com>
Acked-by: Thierry Reding <tred...@nvidia.com>
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On Mon, Jan 30, 2017 at 07:45:21AM +0100, Greg Kroah-Hartman wrote:
> On Mon, Jan 30, 2017 at 10:36:29AM +0530, Shailendra Verma wrote:
> > of_device_get_match_data could return NULL, and so can cause
> > a NULL pointer dereference later.
> >
> > Signed-off-by: Shailendra Verma
On Thu, Aug 25, 2016 at 07:39:09PM +0200, Wolfram Sang wrote:
> All kmalloc-based functions print enough information on failures.
>
> Signed-off-by: Wolfram Sang <wsa-...@sang-engineering.com>
> ---
> drivers/usb/host/xhci-tegra.c | 1 -
> 1 file changed, 1 deletion(-)
From: Thierry Reding <tred...@nvidia.com>
Override the compatible string of the first USB controller to enable
device mode.
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
arch/arm/boot/dts/tegra30-beaver.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/a
From: Thierry Reding <tred...@nvidia.com>
All Tegra SoC generations from Tegra20 through Tegra124 have a ChipIdea
USB device controller. This set of patches adds very rudimentary support
for it to the existing ChipIdea driver and enables them on the set of
boards that I could easily test on
From: Thierry Reding <tred...@nvidia.com>
Override the compatible string of the first USB controller to enable
device mode.
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
arch/arm/boot/dts/tegra114-dalmore.dts | 11 +++
1 file changed, 11 insertions(+)
diff --gi
From: Thierry Reding <tred...@nvidia.com>
All of these Tegra SoC generations have a ChipIdea UDC IP block that can
be used for device mode communication with a host. Implement rudimentary
support that doesn't allow switching between host and device modes.
Signed-off-by: Thierry Reding
From: Thierry Reding <tred...@nvidia.com>
Override the compatible string of the first USB controller to enable
device mode.
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
arch/arm/boot/dts/tegra20-trimslice.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/
From: Thierry Reding <tred...@nvidia.com>
Override the compatible string of the first USB controller to enable
device mode.
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
arch/arm/boot/dts/tegra124-jetson-tk1.dts | 13 -
1 file changed, 12 insertions(+), 1 delet
On Thu, May 26, 2016 at 05:23:30PM +0200, Thierry Reding wrote:
> From: Thierry Reding <tred...@nvidia.com>
>
> Starting with commit 0b52297f2288 ("reset: Add support for shared reset
> controls") there is a reference count for reset control assertions. The
> goal
From: Thierry Reding <tred...@nvidia.com>
Starting with commit 0b52297f2288 ("reset: Add support for shared reset
controls") there is a reference count for reset control assertions. The
goal is to allow resets to be shared by multiple devices and an assert
will take effect only wh
From: Thierry Reding <tred...@nvidia.com>
There are three EHCI controllers on Tegra SoCs, each with its own reset
line. However, the first controller contains a set of UTMI configuration
registers that are shared with its siblings. These registers will only
be reset as part of the
On Wed, May 04, 2016 at 11:14:50AM -0600, Stephen Warren wrote:
> On 05/04/2016 08:39 AM, Thierry Reding wrote:
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > There are three EHCI controllers on Tegra SoCs, each with its own reset
> > line. However, th
On Wed, May 04, 2016 at 11:23:20AM -0600, Stephen Warren wrote:
> On 05/04/2016 08:40 AM, Thierry Reding wrote:
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > Starting with commit 0b52297f2288 ("reset: Add support for shared reset
> > controls") t
On Wed, May 04, 2016 at 07:22:54PM +0200, Philipp Zabel wrote:
> Hi Thierry,
>
> Am Mittwoch, den 04.05.2016, 16:40 +0200 schrieb Thierry Reding:
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > Starting with commit 0b52297f2288 ("reset: Add
On Wed, May 04, 2016 at 07:57:10AM -0700, Greg Kroah-Hartman wrote:
> On Wed, May 04, 2016 at 04:39:59PM +0200, Thierry Reding wrote:
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > There are three EHCI controllers on Tegra SoCs, each with its own reset
&
From: Thierry Reding <tred...@nvidia.com>
Starting with commit 0b52297f2288 ("reset: Add support for shared reset
controls") there is a reference count for reset control assertions. The
goal is to allow resets to be shared by multiple devices and an assert
will take effect only wh
On Tue, May 03, 2016 at 03:16:56PM -0400, Alan Stern wrote:
> On Tue, 3 May 2016, Thierry Reding wrote:
>
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > Starting with commit 0b52297f2288 ("reset: Add support for shared reset
> > controls"
From: Thierry Reding <tred...@nvidia.com>
There are three EHCI controllers on Tegra SoCs, each with its own reset
line. However, the first controller contains a set of UTMI configuration
registers that are shared with its siblings. These registers will only
be reset as part of the
On Wed, May 04, 2016 at 04:22:02PM +0200, Thierry Reding wrote:
> From: Thierry Reding <tred...@nvidia.com>
>
> Starting with commit 0b52297f2288 ("reset: Add support for shared reset
> controls") there is a reference count for reset control assertions. The
> goal
From: Thierry Reding <tred...@nvidia.com>
There are three EHCI controllers on Tegra SoCs, each with its own reset
line. However, the first controller contains a set of UTMI configuration
registers that are shared with its siblings. These registers will only
be reset as part of the
From: Thierry Reding <tred...@nvidia.com>
Starting with commit 0b52297f2288 ("reset: Add support for shared reset
controls") there is a reference count for reset control assertions. The
goal is to allow resets to be shared by multiple devices and an assert
will take effect only wh
On Tue, May 03, 2016 at 08:05:55PM +0200, Thierry Reding wrote:
> From: Thierry Reding <tred...@nvidia.com>
>
> Starting with commit 0b52297f2288 ("reset: Add support for shared reset
> controls") there is a reference count for reset control assertions. The
> goal
From: Thierry Reding <tred...@nvidia.com>
Starting with commit 0b52297f2288 ("reset: Add support for shared reset
controls") there is a reference count for reset control assertions. The
goal is to allow resets to be shared by multiple devices and an assert
will take effect only wh
.
Andrew Bresticker (1):
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
Thierry Reding (22):
Merge branch 'for-4.7/clk' into for-4.7/phy
phy: core: Allow children node to be overridden
dt-bindings
This set of patches introduces a driver for the XUSB controller found on
NVIDIA Tegra SoCs. When loaded with a firmware (available via the linux-
firmware repository), it provides an XHCI-compatible interface.
Thierry Reding (5
that replaces the existing EHCI controllers.
Support is enabled on Venice2, Jetson TK1 and Nyan-based Chromebooks.
Andrew Bresticker (1):
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
Thierry Reding (24
).
Thierry Reding (6):
Merge branch 'for-4.7/clk' into for-4.7/phy
phy: core: Allow children node to be overridden
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
phy: Add Tegra XUSB
update the Tegra PCIe host bridge controller device tree
bindings and driver to cope with per-lane PHYs on Tegra124 and later.
Thierry Reding (3):
Merge branch 'for-4.7/phy' into for-4.7/pci
dt-bindings: pci: tegra: Update
Hi everyone,
This is a fairly complicated series of pull requests because of the
dependencies involved. The goal is to take all of the patches through
the ARM-SoC tree but I'm sending out these individual pull requests
to document this. Also, if these branches were starting to cause
conflicts
On Wed, Apr 06, 2016 at 07:08:24PM +0200, Thierry Reding wrote:
[...]
> I attached what I came up with. It extends the OF PHY provider registry
> by allowing an additional node to be specified that if specified will
> serve as the parent for the child lookup (and hence overrides the
>
On Fri, Mar 04, 2016 at 05:19:34PM +0100, Thierry Reding wrote:
> From: Thierry Reding <tred...@nvidia.com>
>
> Add a new driver for the XUSB pad controller found on NVIDIA Tegra SoCs.
> This hardware block used to be exposed as a pin controller, but it turns
> out that
On Tue, Mar 15, 2016 at 10:01:25AM +0100, Linus Walleij wrote:
> On Fri, Mar 4, 2016 at 5:19 PM, Thierry Reding <thierry.red...@gmail.com>
> wrote:
>
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > This is an old version of the binding that isn't flex
On Tue, Mar 15, 2016 at 10:01:25AM +0100, Linus Walleij wrote:
> On Fri, Mar 4, 2016 at 5:19 PM, Thierry Reding <thierry.red...@gmail.com>
> wrote:
>
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > This is an old version of the binding that isn't flex
On Thu, Apr 07, 2016 at 02:03:45PM +0300, Mathias Nyman wrote:
> On 04.03.2016 18:19, Thierry Reding wrote:
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > Add support for the on-chip XUSB controller present on Tegra SoCs. This
> > controller, when loade
On Wed, Apr 06, 2016 at 06:13:42PM +0530, Kishon Vijay Abraham I wrote:
> On Friday 04 March 2016 09:49 PM, Thierry Reding wrote:
[...]
> > +struct tegra124_xusb_fuse_calibration {
> > + u32 hs_curr_level[3];
> > + u32 hs_iref_cap;
> > + u32 hs_term_range_adj;
&
On Tue, Apr 05, 2016 at 03:10:16PM -0600, Stephen Warren wrote:
> On 04/05/2016 08:44 AM, Thierry Reding wrote:
> > On Wed, Mar 16, 2016 at 11:59:44AM -0600, Stephen Warren wrote:
> > > On 03/04/2016 09:19 AM, Thierry Reding wrote:
> > > > From: Thie
On Wed, Mar 16, 2016 at 11:59:44AM -0600, Stephen Warren wrote:
> On 03/04/2016 09:19 AM, Thierry Reding wrote:
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > Extend the binding to cover the set of feature found in Tegra210.
>
> Acked-by: Stephen Warren
Hi Mathias, Greg,
Due to the various dependencies within the series, I'd prefer this to go
via the Tegra tree. Would you be okay with providing your Acked-by?
Thanks,
Thierry
On Fri, Mar 04, 2016 at 05:19:38PM +0100, Thierry Reding wrote:
> From: Thierry Reding <tred...@nvidia.com>
Hi Kishon,
The dependencies within this series somewhat complicated, so I'd prefer
to take it all via one tree. Would you be willing to give an Acked-by on
this patch?
Thierry
On Fri, Mar 04, 2016 at 05:19:34PM +0100, Thierry Reding wrote:
> From: Thierry Reding <tred...@nvidia.com>
On Tue, Mar 29, 2016 at 05:24:59PM +0200, Marcel Ziswiler wrote:
> Hi Thierry
>
> On Fri, 2016-03-04 at 17:19 +0100, Thierry Reding wrote:
> > From: Thierry Reding <treding-ddmlm1+adcrqt0dzr+a...@public.gmane.org
> > >
> >
> > The NVIDIA Tegra XUSB pad
On Fri, Mar 04, 2016 at 10:31:45PM -0600, Rob Herring wrote:
> On Fri, Mar 04, 2016 at 05:19:31PM +0100, Thierry Reding wrote:
> > From: Thierry Reding <tred...@nvidia.com>
> >
> > The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a
> > se
From: Thierry Reding <tred...@nvidia.com>
This is an old version of the binding that isn't flexible enough to
describe all aspects of the XUSB pad controller. Specifically with the
addition of XUSB support (for SuperSpeed USB) the existing binding is
no longer suitable.
Signed-off-by: T
From: Thierry Reding <tred...@nvidia.com>
The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a
set of lanes that are used for PCIe, SATA and USB.
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
Changes in v10:
- clarify that the hardware documentation mea
From: Thierry Reding <tred...@nvidia.com>
Extend the binding to cover the set of feature found in Tegra210.
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
.../bindings/phy/nvidia,tegra124-xusb-padctl.txt | 327 +
1 file changed, 327 insertions(+)
From: Thierry Reding <tred...@nvidia.com>
Add device-tree binding documentation for the XUSB controller present
on Tegra124 and later SoCs. This controller supports USB 3.0 via an xHCI
compliant interface.
Based on work by Andrew Bresticker <abres...@chromium.org>.
Cc: Rob H
From: Thierry Reding <tred...@nvidia.com>
Add a new driver for the XUSB pad controller found on NVIDIA Tegra SoCs.
This hardware block used to be exposed as a pin controller, but it turns
out that this isn't a good fit. The new driver and DT binding much more
accurately describe the ha
From: Thierry Reding <tred...@nvidia.com>
Add support for the on-chip XUSB controller present on Tegra SoCs. This
controller, when loaded with external firmware, exposes an interface
compliant with xHCI. This driver loads the firmware, starts the
controller, and is able to service host-sp
From: Thierry Reding <tred...@nvidia.com>
Parameterize more parts of the driver and add support for Tegra210.
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Mathias Nyman <mathias.ny...@intel.com>
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
drivers/us
From: Thierry Reding <tred...@nvidia.com>
Extend the Tegra XUSB controller device tree binding with Tegra210
support.
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
.../devicetree/bindings/usb/nvidia,tegra124-xusb.txt | 12
1 file changed, 12 inserti
From: Thierry Reding <tred...@nvidia.com>
Add support for the XUSB pad controller found on Tegra210 SoCs. The
hardware is roughly the same, but some of the registers have been moved
around and the number and type of supported pads has changed.
Signed-off-by: Thierry Reding <tred...@n
From: Thierry Reding <tred...@nvidia.com>
These new helpers simplify implementing multi-driver modules and
properly handle failure to register one driver by unregistering all
previously registered drivers.
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
drivers/usb/gadget/udc
On Mon, Nov 23, 2015 at 02:51:29PM +0100, Arnd Bergmann wrote:
> For historic reasons, the tegra platform selects USB_ULPI from architecture
> code, but that hasn't really made sense for a long time, as the only
> user of that code is the Tegra EHCI driver that has its own Kconfig
> symbol.
>
>
From: Thierry Reding tred...@nvidia.com
The USB_DWC3_ULPI Kconfig entry uses a UTF-8 non-breaking space (0xca20)
instead of a regular ASCII space (0x20). Commit 2e0d737fc76f (kconfig:
don't silently ignore unhandled characters) exposes this by warning
about unhandled characters.
Signed-off
On Thu, May 21, 2015 at 09:40:01AM +0100, Lee Jones wrote:
On Wed, 20 May 2015, Thierry Reding wrote:
On Wed, May 20, 2015 at 07:35:51AM +0100, Lee Jones wrote:
On Tue, 19 May 2015, Andrew Bresticker wrote:
On Thu, May 14, 2015 at 10:38 AM, Andrew Bresticker
abres...@chromium.org
On Wed, May 20, 2015 at 07:35:51AM +0100, Lee Jones wrote:
On Tue, 19 May 2015, Andrew Bresticker wrote:
Lee,
On Thu, May 14, 2015 at 10:38 AM, Andrew Bresticker
abres...@chromium.org wrote:
On Thu, May 14, 2015 at 12:40 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 14 May
On Mon, Nov 24, 2014 at 04:17:12PM -0800, Andrew Bresticker wrote:
This series adds support for xHCI on NVIDIA Tegra SoCs. This includes:
- patches 1, 2, and 3: minor cleanups for mailbox framework and xHCI,
- patches 4 and 5: adding a driver for the mailbox used to communicate
with the
On Wed, Feb 25, 2015 at 09:27:36AM -0800, Andrew Bresticker wrote:
Hi Thierry,
Sorry for taking so awfully long to look at this. I've spent some time
looking at various pieces of documentation and I concluded that
representing the port assignment as muxing options doesn't seem right
On Thu, Jan 08, 2015 at 11:24:11AM -0600, Felipe Balbi wrote:
* PGP Signed by an unknown key
On Thu, Jan 08, 2015 at 06:32:27PM +0200, grygorii.stras...@linaro.org wrote:
Hi,
On 01/07/2015 06:41 AM, Olof Johansson wrote:
On Tue, Jan 6, 2015 at 7:45 AM, Maxime Ripard
On Mon, Jan 05, 2015 at 12:33:51PM -0700, Stephen Warren wrote:
On 12/23/2014 11:36 AM, Felipe Balbi wrote:
On Thu, Dec 04, 2014 at 01:06:07PM +0100, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
Commit 1290a958d48e (usb: phy: propagate __of_usb_find_phy()'s error on
failure
On Wed, Dec 17, 2014 at 09:34:48AM -0800, Greg Kroah-Hartman wrote:
On Wed, Dec 17, 2014 at 09:30:03AM +0100, Thierry Reding wrote:
On Thu, Dec 04, 2014 at 01:06:07PM +0100, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
Commit 1290a958d48e (usb: phy: propagate
On Thu, Dec 04, 2014 at 01:06:07PM +0100, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
Commit 1290a958d48e (usb: phy: propagate __of_usb_find_phy()'s error on
failure) broke platforms that rely on deferred probing to order probing
of PHY and host controller drivers
From: Thierry Reding tred...@nvidia.com
Commit 1290a958d48e (usb: phy: propagate __of_usb_find_phy()'s error on
failure) broke platforms that rely on deferred probing to order probing
of PHY and host controller drivers. The reason is that the commit simply
propagates errors from __of_usb_find_phy
On Thu, Dec 04, 2014 at 03:23:06PM +0300, Sergei Shtylyov wrote:
Hello.
On 12/4/2014 3:06 PM, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
Commit 1290a958d48e (usb: phy: propagate __of_usb_find_phy()'s error on
failure) broke platforms that rely on deferred probing
On Mon, Nov 24, 2014 at 04:17:17PM -0800, Andrew Bresticker wrote:
The Tegra xHCI controller's firmware communicates requests to the host
processor through a mailbox interface. While there is only a single
physical channel, messages sent by the controller can be divided
into two groups: those
On Thu, Nov 20, 2014 at 09:23:36PM +0530, Arjun Sreedharan wrote:
When __of_usb_find_phy() fails, it returns -ENODEV - its
error code has to be returned by devm_usb_get_phy_by_phandle().
Only when the former function succeeds and try_module_get()
fails should -EPROBE_DEFER be returned.
On Mon, Nov 24, 2014 at 08:36:46AM -0600, Felipe Balbi wrote:
Hi,
On Mon, Nov 24, 2014 at 02:10:41PM +0100, Thierry Reding wrote:
On Thu, Nov 20, 2014 at 09:23:36PM +0530, Arjun Sreedharan wrote:
When __of_usb_find_phy() fails, it returns -ENODEV - its
error code has to be returned
On Thu, Oct 30, 2014 at 10:10:06AM -0700, Andrew Bresticker wrote:
On Thu, Oct 30, 2014 at 6:45 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Wed, Oct 29, 2014 at 12:43:36PM -0700, Andrew Bresticker wrote:
diff --git a/drivers/pinctrl/pinctrl-tegra-xusb.c
b/drivers/pinctrl
On Thu, Oct 30, 2014 at 10:26:47AM -0700, Andrew Bresticker wrote:
On Thu, Oct 30, 2014 at 10:24 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Thu, Oct 30, 2014 at 10:19:21AM -0700, Andrew Bresticker wrote:
On Thu, Oct 30, 2014 at 6:55 AM, Thierry Reding
thierry.red...@gmail.com
On Wed, Oct 29, 2014 at 11:02:36AM -0700, Andrew Bresticker wrote:
[...]
Maybe something like this patch would be more correct in handling
this:
diff --git a/drivers/mailbox/mailbox.c b/drivers/mailbox/mailbox.c
index afcb430508ec..85691a7d8ca6 100644
--- a/drivers/mailbox/mailbox.c
On Wed, Oct 29, 2014 at 12:43:36PM -0700, Andrew Bresticker wrote:
diff --git a/drivers/pinctrl/pinctrl-tegra-xusb.c
b/drivers/pinctrl/pinctrl-tegra-xusb.c
[...]
+
+ for (i = 0; i TEGRA_XUSB_USB3_PHYS; i++) {
+ if (phy == padctl-phys[TEGRA_XUSB_PADCTL_USB3_P0 + i])
+
On Wed, Oct 29, 2014 at 09:37:14AM -0700, Andrew Bresticker wrote:
On Wed, Oct 29, 2014 at 2:43 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Tue, Oct 28, 2014 at 03:27:50PM -0700, Andrew Bresticker wrote:
[...]
diff --git
a/Documentation/devicetree/bindings/pinctrl/nvidia
On Thu, Oct 30, 2014 at 10:19:21AM -0700, Andrew Bresticker wrote:
On Thu, Oct 30, 2014 at 6:55 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Wed, Oct 29, 2014 at 09:37:14AM -0700, Andrew Bresticker wrote:
On Wed, Oct 29, 2014 at 2:43 AM, Thierry Reding
thierry.red...@gmail.com
On Tue, Oct 28, 2014 at 03:27:50PM -0700, Andrew Bresticker wrote:
[...]
diff --git
a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
[...]
+Optional properties:
+---
+-
On Tue, Oct 28, 2014 at 03:27:52PM -0700, Andrew Bresticker wrote:
[...]
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra124-xhci.txt
b/Documentation/devicetree/bindings/usb/nvidia,tegra124-xhci.txt
[...]
+- pll_u_480m
+- clk_m
+- pll_e
What are these used for? I
On Tue, Oct 28, 2014 at 03:27:53PM -0700, Andrew Bresticker wrote:
[...]
diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
[...]
+#define TEGRA_XHCI_NUM_SUPPLIES 8
+static const char *tegra_xhci_supply_names[TEGRA_XHCI_NUM_SUPPLIES] = {
+ avddio-pex,
+
On Tue, Oct 28, 2014 at 03:27:49PM -0700, Andrew Bresticker wrote:
[...]
diff --git a/drivers/mailbox/tegra-xusb-mailbox.c
b/drivers/mailbox/tegra-xusb-mailbox.c
[...]
+struct tegra_xusb_mbox {
+ struct mbox_controller mbox;
+ int irq;
It seems like this is unused outside of
On Tue, Oct 28, 2014 at 03:27:51PM -0700, Andrew Bresticker wrote:
[...]
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index c6a66de..0f4cdef 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -163,6 +163,7 @@ config PINCTRL_TEGRA_XUSB
select
On Mon, Aug 25, 2014 at 01:01:52PM -0600, Stephen Warren wrote:
On 08/18/2014 11:08 AM, Andrew Bresticker wrote:
[...]
+static int tegra_xusb_mbox_probe(struct platform_device *pdev)
+res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+if (!res)
+return -ENODEV;
On Tue, Aug 26, 2014 at 09:43:50AM +0200, Arnd Bergmann wrote:
On Tuesday 26 August 2014 08:57:31 Thierry Reding wrote:
On Mon, Aug 25, 2014 at 01:01:52PM -0600, Stephen Warren wrote:
On 08/18/2014 11:08 AM, Andrew Bresticker wrote:
[...]
+static int tegra_xusb_mbox_probe(struct
On Tue, Aug 26, 2014 at 10:09:25AM +0200, Arnd Bergmann wrote:
On Tuesday 26 August 2014 09:50:25 Thierry Reding wrote:
On Tue, Aug 26, 2014 at 09:43:50AM +0200, Arnd Bergmann wrote:
On Tuesday 26 August 2014 08:57:31 Thierry Reding wrote:
On Mon, Aug 25, 2014 at 01:01:52PM -0600
On Tue, Aug 26, 2014 at 11:54:43AM +0200, Arnd Bergmann wrote:
On Tuesday 26 August 2014 11:08:11 Thierry Reding wrote:
On Tue, Aug 26, 2014 at 10:09:25AM +0200, Arnd Bergmann wrote:
On Tuesday 26 August 2014 09:50:25 Thierry Reding wrote:
On Tue, Aug 26, 2014 at 09:43:50AM +0200, Arnd
On Tue, Aug 26, 2014 at 01:35:34PM +0200, Arnd Bergmann wrote:
On Tuesday 26 August 2014 12:20:13 Thierry Reding wrote:
On Tue, Aug 26, 2014 at 11:54:43AM +0200, Arnd Bergmann wrote:
I'm not sure if it's really worth it. One thing we might do is just
remove all definitions
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