why not reuse the musb_irq_work?
On Wed, Apr 2, 2014 at 7:58 PM, Daniel Mack zon...@gmail.com wrote:
Handle BABBLE interrupt error conditions from a work struct handler.
This indirection is necessary as we can't be certain that the phy
functions don't sleep.
Platform layer implementation may
On Sun, Dec 22, 2013 at 1:47 AM, Greg KH gre...@linuxfoundation.org wrote:
On Sat, Dec 21, 2013 at 08:19:36PM +0800, Yingchun Li wrote:
Hi, I have a box presents to PC as a CDC-ACM device. And I write an simple
Application to write data to the box by ttyACM0.
The application is a loop
Hi, I have a box presents to PC as a CDC-ACM device. And I write an simple
Application to write data to the box by ttyACM0.
The application is a loop that write the data to box, and waiting for
the box response
the data.
The question is , after wrote the data to the box, the box will
process the
at 8:22 PM, Yingchun Li sword.l.dra...@gmail.com wrote:
On Wed, Nov 27, 2013 at 12:38 AM, Bin Liu binml...@gmail.com wrote:
On Thu, Nov 21, 2013 at 4:40 AM, Yingchun Li sword.l.dra...@gmail.com
wrote:
hi,
if musb bulk_split is enable, the segment size will be set according
to hw_ep
On Wed, Nov 27, 2013 at 12:38 AM, Bin Liu binml...@gmail.com wrote:
On Thu, Nov 21, 2013 at 4:40 AM, Yingchun Li sword.l.dra...@gmail.com wrote:
hi,
if musb bulk_split is enable, the segment size will be set according
to hw_ep-max_packet_sz_tx, and the segment will be writen to fifo
hi,
if musb bulk_split is enable, the segment size will be set according
to hw_ep-max_packet_sz_tx, and the segment will be writen to fifo.
But after the first tranfser end, the segment size will be set no larger
than qh-maxpacket (in musb_host_tx),and the bluk_split make no sense.
so
Hi, On my board, my musb works as host. my kernel version is 3.4.0.
The host cannot enumerate some low speed mouse normally,but if I
add an extersion cord (abour 1.5m) between the host and device, the
mouse can work normally.
If the enumeration fails, there is always a babble interrupt happen just
I use the case
testusb -a -t 1 -s 4096 -c 10
and find there is no ZLP after a transfer(4096 bytes), I use the
Mentor's own DMA
(CONFIG_USB_INVENTRA_DMA). but when just use PIO, there is ZLP.
In the musb_host_tx, the transfer will end with the case
} else if (dma urb-transfer_buffer_length
-write the host application.
If I finish the work, will let you know, thanks a lot.
On Thu, Jul 25, 2013 at 12:53 PM, Xiaofan Chen xiaof...@gmail.com wrote:
On Thu, Jul 25, 2013 at 12:39 PM, Yingchun Li sword.l.dra...@gmail.com
wrote:
Thanks xiaofan
The usb device has been fixed
Hi,
I have a cdc-acm usb device, used for transfering data to/from windows PC,
for windows PC, and I use the Documentation/usb/linux-cdc-acm.inf to load the
windows driver(which is the usbser.sys).
On PC, there is an application use the COM port to transfer the data.
During transfer,
Ok， but the linux-cdc-acm.inf is provieded by us, so I think there should
be something I can learn.
Thanks anyway！
On Wed, Jul 24, 2013 at 11:10 PM, Greg KH gre...@linuxfoundation.org wrote:
On Wed, Jul 24, 2013 at 08:11:05PM +0800, Yingchun Li wrote:
Hi,
I have a cdc-acm usb device
, Xiaofan Chen xiaof...@gmail.com wrote:
On Wed, Jul 24, 2013 at 8:11 PM, Yingchun Li sword.l.dra...@gmail.com wrote:
Hi,
I have a cdc-acm usb device, used for transfering data to/from windows
PC,
for windows PC, and I use the Documentation/usb/linux-cdc-acm.inf to load the
windows driver
Hi, Felipe
Does the following patch still break your editor? I have fix the patch
and resend it again, but I didn't find the patch in your 'big patch
bomb' for v3.10,
should I fix something?
On Tue, Jan 29, 2013 at 4:22 PM, yingchun li sword.l.dra...@gmail.com wrote:
According to musbhdrd
According to musbhdrd usb 2.0 high-speed dual-role controller
Product Specification
the number of dma channels can be read from register RAMINFO.
it is not always that number of dma channels is MUSB_HSDMA_CHANNELS, some
SOC may have little dma channels.
Signed-off-by: Yingchun
According to musbhdrd usb 2.0 high-speed dual-role controller
Product Specification
the number of dma channels can be read from register RAMINFO.
it is not always that number of dma channels is MUSB_HSDMA_CHANNELS, some
SOC may have little dma channels(for my chip, it only has 4 channel).
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