Re: [PATCH v5 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

On 03/28/2017 03:36 PM, Felipe Balbi wrote: Hi, Alexandre Torgue writes: Hi John, On 02/01/2017 04:37 AM, John Youn wrote: On 1/31/2017 5:26 PM, Bruno Herrera wrote: This patch introduces a new parameter to activate USB OTG HS/FS core embedded phy transceiver.

Re: [PATCH v5 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

Hi, Alexandre Torgue writes: > Hi John, > > On 02/01/2017 04:37 AM, John Youn wrote: >> On 1/31/2017 5:26 PM, Bruno Herrera wrote: >>> This patch introduces a new parameter to activate USB OTG HS/FS core >>> embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO

Re: [PATCH v5 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

Hi John, On 02/01/2017 04:37 AM, John Youn wrote: On 1/31/2017 5:26 PM, Bruno Herrera wrote: This patch introduces a new parameter to activate USB OTG HS/FS core embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the transceiver. Also add the dwc2_set_params function

Re: [PATCH v5 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

On 1/31/2017 5:26 PM, Bruno Herrera wrote: > This patch introduces a new parameter to activate USB OTG HS/FS core > embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register > to enable the transceiver. > Also add the dwc2_set_params function for stm32f4 otg fs. > > Signed-off-by: Bruno

[PATCH v5 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

This patch introduces a new parameter to activate USB OTG HS/FS core embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the transceiver. Also add the dwc2_set_params function for stm32f4 otg fs. Signed-off-by: Bruno Herrera ---