The Current default dwc2 just handle one clock named otg, however, it may have
two or more clock need to manage for some new SoCs(such as RK3328), so this
adds change clk to clk's array of dwc2_hsotg to handle more clocks operation.
Frank Wang (1):
usb: dwc2: add multiple clock handling
Originally, dwc2 just handle one clock named otg, however, it may have
two or more clock need to manage for some new SoCs, so this adds
change clk to clk's array of dwc2_hsotg to handle more clocks operation.
Signed-off-by: Frank Wang
---
drivers/usb/dwc2/core.h |
Hello,
> > Bind and unbind are done in connect and disconnect internally.
>
> Please be more precise here and mention that those operation are done
> for a stub driver only and for vudc you need to bind gadget manually
> using usb gadget subsystem before using connect function.
> > + int
Hi,
Richard Genoud writes:
> Hi,
> Since commit c499ff71ff2a2 ("usb: dwc3: core: re-factor init and exit paths")
> (merged in 4.8), the usb ports on odroid-XU4 don't work anymore.
>
> [ Actually, it's commit 2164a476205ccc ("usb: dwc3: set SUSPHY bit for all
>
On Wed, Jan 18, 2017 at 09:31:31PM +0100, Aleksander Morgado wrote:
> The Dell DW5570 is a re-branded Sierra Wireless MC8805 which will by
> default boot with vid 0x413c and pid 0x81a3. When triggered QDL download
> mode, the device switches to pid 0x81a6 and provides the standard TTY
> used for
On Wed, Jan 18, 2017 at 02:20:30PM +0800, Lu Baolu wrote:
> Hi Greg,
>
> This patch series has been there for 2 months without
> further comments. Will you consider it for usb-next?
I needed acks from the x86 maintainers before I could take those
patches. Can you resend the series and hopefully
* Lu Baolu wrote:
> xHCI debug capability (DbC) is an optional but standalone
> functionality provided by an xHCI host controller. Software
> learns this capability by walking through the extended
> capability list of the host. xHCI specification describes
> DbC in
On 19/01/2017 09:03, Felipe Balbi wrote:
>
> Hi,
>
> Richard Genoud writes:
>> Hi,
>> Since commit c499ff71ff2a2 ("usb: dwc3: core: re-factor init and exit paths")
>> (merged in 4.8), the usb ports on odroid-XU4 don't work anymore.
>>
>> [ Actually, it's commit
* Lu Baolu wrote:
> index 8a12199..c4031b9 100644
> --- a/arch/x86/kernel/early_printk.c
> +++ b/arch/x86/kernel/early_printk.c
> @@ -17,6 +17,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -381,6 +382,10 @@ static
* Lu Baolu wrote:
> Add Documentation/usb/usb3-debug-port.rst. This document includes
> the user guide for USB3 debug port.
>
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Lu Baolu
> ---
> Documentation/usb/usb3-debug-port.rst | 95
>
Despite the CPPI 4.1 is a generic DMA, it is tied to USB.
On the dsps, CPPI 4.1 interrupt's registers are in USBSS (the MUSB glue).
Currently, to enable / disable and clear interrupts, the CPPI 4.1 driver
maps and accesses to USBSS's register, which making CPPI 4.1 driver not
really generic.
Move
Currently, the CPPI 4.1 driver is not completely generic and
only work on dsps. This is because of IRQ management.
Add a callback to dma_controller that could be invoked on DMA completion
to acknodlege the IRQ.
Signed-off-by: Alexandre Bailon
---
Update cppi41_dma_callback() to detect an aborted transfer.
This was not required before because cppi41_dma_callback() was only
invoked on transfer completion.
In order to make CPPI 4.1 driver more generic, cppi41_dma_callback()
will be invoked after a transfer abort in order to let the MUSB
This series was "dmaengine: cppi41: Make the driver more generic".
I have tried to separate as munch I could CPPI 4.1 MUSB driver changes.
Currently, the DMA interrupt is managed by the CPPI 4.1 driver.
The issue here is the CPPI 4.1 driver must access to MUSB glue registers
to manage its
Most of the patch of this series were part of
"[PATCH 00/11] dmaengine: cppi41: Add dma support to da8xx"
This series intend to make the CPPI 4.1 more generic in order to
add a new platform (the DA8xx).
To achieve that, all the IRQ code present in CPPI 4.1 driver has been moved
to MUSB DSPS
Currently, only the AM335x is supported by the driver.
Though the driver has a glue layer to support different platforms,
some platform variable names are not prefixed with the platform name.
To facilitate the addition of a new platform,
rename some variables owned by the AM335x glue.
Some constants are defined and use by the driver whereas they are
specifics to AM335x.
Add new variables to the glue layer, initialize them with the constants,
and use them in the driver.
Signed-off-by: Alexandre Bailon
---
drivers/dma/cppi41.c | 20 ++--
1
Despite the driver is already using DT to get the number of channels,
init_sched() is using an hardcoded value to get it.
Use DT to get the number of channels.
Signed-off-by: Alexandre Bailon
---
drivers/dma/cppi41.c | 26 +++---
1 file changed, 15
On 1/19/2017 1:37 PM, Alexandre Bailon wrote:
Despite the driver is already using DT to get the number of channels,
init_sched() is using an hardcoded value to get it.
Use DT to get the number of channels.
Signed-off-by: Alexandre Bailon
---
drivers/dma/cppi41.c | 26
DT binding for the TI DA8xx/OMAP-L1x/AM17xx/AM18xx CPPI 4.1 DMA controller.
Signed-off-by: Alexandre Bailon
---
.../devicetree/bindings/usb/da8xx-usb.txt | 39 ++
1 file changed, 39 insertions(+)
diff --git
* Lu Baolu wrote:
> This patch add dbc debug device support in usb_debug driver.
s/add dbc debug device support in usb_debug driver
/adds dbc debug device support to the usb_debug driver
Please fix the title as well.
Thanks,
Ingo
--
To unsubscribe from
Hello!
On 1/19/2017 1:06 PM, Alexandre Bailon wrote:
Currently, the CPPI 4.1 driver is not completely generic and
only work on dsps. This is because of IRQ management.
Works. DSPS.
Add a callback to dma_controller that could be invoked on DMA completion
to acknodlege the IRQ.
In order to make CPPI 4.1 DMA driver more generic, accesses to USBSS
have been removed. So it is not required anymore to map the "glue"
register's.
Remove usbss_mem.
Signed-off-by: Alexandre Bailon
---
drivers/dma/cppi41.c | 18 ++
1 file changed, 10
During the teardown of a RX channel, because there is only one
completion queue available for RX channel, descriptor of another
channel may be popped which will cause 2 warnings:
- the first one because we popped a wrong descriptor
(neither the channel's descriptor, nor the teardown descriptor).
The DA8xx has a CPPI 4.1 DMA controller.
This is add the glue layer required to make it work on DA8xx.
Signed-off-by: Alexandre Bailon
---
drivers/dma/Kconfig | 6 +++---
drivers/dma/cppi41.c | 24
2 files changed, 27 insertions(+), 3
This series add support of DA8xx to CPPI 4.1 driver.
As the CPPI 4.1 is now generic, we only had to add the glue for DA8xx.
This serie should applied on top of
"[PATCH v3 0/4] dmaengine: cppi41: Make CPPI 4.1 driver more generic".
Changes in v3:
- Removed some useless property from DT bindings.
* Lu Baolu wrote:
> xHCI debug capability (DbC) is an optional but standalone
> functionality provided by an xHCI host controller. With DbC
> hardware initialized, the system will present a debug device
> through the USB3 debug port (normally the first USB3 port).
>
On Wed, Jan 18, 2017 at 01:58:28PM +0200, Mathias Nyman wrote:
> On 12.01.2017 10:38, Roger Quadros wrote:
> > Mathias,
> >
> > On 11/01/17 17:08, Alan Stern wrote:
> > > On Wed, 11 Jan 2017, Mathias Nyman wrote:
> > >
> > > > On 17.11.2016 13:43, Sriram Dash wrote:
> > > > > From: Arnd Bergmann
On Fri, Jan 13, 2017 at 04:38:32PM -0700, Shuah Khan wrote:
> Update USB/IP driver location in README.
>
> Signed-off-by: Shuah Khan
> Reviewed-by: Krzysztof Opasiak
> ---
> tools/usb/usbip/README | 2 +-
> 1 file changed, 1 insertion(+), 1
* Greg Kroah-Hartman wrote:
> On Wed, Jan 18, 2017 at 02:20:30PM +0800, Lu Baolu wrote:
> > Hi Greg,
> >
> > This patch series has been there for 2 months without
> > further comments. Will you consider it for usb-next?
>
> I needed acks from the x86 maintainers
Hi,
On Thu, Jan 19, 2017 at 12:15 AM, Florian Fainelli wrote:
> On 01/17/2017 12:05 AM, Raviteja Garimella wrote:
>> This patch splits the amd5536udc driver into two -- one that does
>> pci device registration and the other file that does the rest of
>> the driver tasks
On 19.01.2017 11:22, Greg KH wrote:
On Wed, Jan 18, 2017 at 01:58:28PM +0200, Mathias Nyman wrote:
On 12.01.2017 10:38, Roger Quadros wrote:
Mathias,
On 11/01/17 17:08, Alan Stern wrote:
On Wed, 11 Jan 2017, Mathias Nyman wrote:
On 17.11.2016 13:43, Sriram Dash wrote:
From: Arnd Bergmann
On Wed, Jan 18, 2017 at 02:08:25PM +0800, Chunfeng Yun wrote:
> add 26M reference clock for ssusb and xhci nodes
>
> Signed-off-by: Chunfeng Yun
> ---
> arch/arm64/boot/dts/mediatek/mt8173.dtsi |6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
This
On 19.01.2017 11:09, Ingo Molnar wrote:
* Greg Kroah-Hartman wrote:
On Wed, Jan 18, 2017 at 02:20:30PM +0800, Lu Baolu wrote:
Hi Greg,
This patch series has been there for 2 months without
further comments. Will you consider it for usb-next?
I needed acks from
Hi,
On Wed, Jun 22, 2016 at 2:00 PM, Roger Quadros wrote:
Luckily hit this thread while checking about DRD role functionality for DWC3.
> On 22/06/16 11:14, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Roger Quadros writes:
>>> For the real use case, some Carplay
On Sun, Jan 15, 2017 at 01:14:28PM +0100, Yegor Yefremov wrote:
> Fixes wrong spelled "pinctrl-bindings.txt" and "qcom-dwc3-usb-phy.txt"
> file names as also wrong specified "mt8173-mtu3.txt" file name.
>
> Signed-off-by: Yegor Yefremov
> ---
> Changes:
> v1 ->
At least macOS seems to be sending
ClearFeature(ENDPOINT_HALT) to endpoints which
aren't Halted. This makes DWC3's CLEARSTALL command
time out which causes several issues for the driver.
Instead, let's just return 0 and bail out early.
Cc:
Signed-off-by: Felipe Balbi
Hi,
Roger Quadros writes:
> Hi Felipe,
>
> We have system suspend resume working on dra7-evm in v4.10-rc but
> dwc3 gadget breaks after system suspend resume.
>
> Any hints how to fix it? Full backtrace below.
from a quick look. END_TRANSFER is timing out, most likely.
On 19/01/17 13:59, Felipe Balbi wrote:
>
> Hi,
>
> Roger Quadros writes:
>> Hi Felipe,
>>
>> We have system suspend resume working on dra7-evm in v4.10-rc but
>> dwc3 gadget breaks after system suspend resume.
>>
>> Any hints how to fix it? Full backtrace below.
>
> from a quick
Hi Felipe,
We have system suspend resume working on dra7-evm in v4.10-rc but
dwc3 gadget breaks after system suspend resume.
Any hints how to fix it? Full backtrace below.
Another message that looks worry-some is
"[ 61.495313] omap-dwc3 4888.omap_dwc3_1: runtime PM trying to suspend
Hi Greg
This series by Arnd Bergmann was originally six patches, but last two of
them were already taken to 4.10. Without the rest of them there will
be a regression in 4.10.
Original cover letter says:
For xhci-hcd platform device, all the DMA parameters are not
configured properly, notably
From: Arnd Bergmann
For xhci-hcd platform device, all the DMA parameters are not
configured properly, notably dma ops for dwc3 devices.
The idea here is that you pass in the parent of_node along with
the child device pointer, so it would behave exactly like the
parent already
From: Arnd Bergmann
For the dual role ehci fsl driver, sysdev will handle the dma
config.
Signed-off-by: Arnd Bergmann
Signed-off-by: Sriram Dash
Signed-off-by: Mathias Nyman
---
drivers/usb/host/ehci-fsl.c |
From: Arnd Bergmann
For xhci-hcd platform device, all the DMA parameters are not
configured properly, notably dma ops for dwc3 devices. So, set
the dma for xhci from sysdev. sysdev is pointing to device that
is known to the system firmware or hardware.
Signed-off-by: Arnd
From: Arnd Bergmann
Set the dma for chipidea from sysdev. This is inherited from its
parent node. Also, do not set dma mask for child as it is not required
now.
Signed-off-by: Arnd Bergmann
Signed-off-by: Sriram Dash
Acked-by: Peter Chen
On 18/01/17 07:08, Chunfeng Yun wrote:
usually, the reference clock comes from 26M oscillator directly,
but some SoCs are not, add it for compatibility.
Signed-off-by: Chunfeng Yun
---
drivers/usb/mtu3/mtu3.h |1 +
drivers/usb/mtu3/mtu3_plat.c | 21
On 19/01/17 10:37, Greg Kroah-Hartman wrote:
On Wed, Jan 18, 2017 at 02:08:25PM +0800, Chunfeng Yun wrote:
add 26M reference clock for ssusb and xhci nodes
Signed-off-by: Chunfeng Yun
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi |6 --
1 file changed, 4
Add usb20 to the list of clock supported by PM runtime.
Signed-off-by: Alexandre Bailon
---
arch/arm/mach-davinci/pm_domain.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-davinci/pm_domain.c
b/arch/arm/mach-davinci/pm_domain.c
index
Currently, only the PIO mode is supported.
This add support of CPPI 4.1 to DA8xx.
As the In DA8xx the CPPI 4.1 DMA is a part of the USB.
Create the CPPI 4.1 device as a child of USB.
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/Kconfig | 4 ++--
This series update MUSB driver to add DMA support to DA8xx.
It should be applied on top of
"[PATCH v3 0/3] usb: musb: cppi41: Add a way to manage DMA irq" but
"[PATCH v3 0/3] dmaengine: cppi41: Add dma support to da8xx" and
"[PATCH] arm: davinci: Make the usb20 clock available to PM runtime"
are
DA8xx driver is registering and using the CPPI 3.0 DMA controller but
actually, the DA8xx has a CPPI 4.1 DMA controller.
Remove the CPPI 3.0 quirk and methods.
Fixes: f8e9f34f80a2 ("usb: musb: Fix up DMA related macros")
Fixes: 7f6283ed6fe8 ("usb: musb: Set up function pointers for DMA")
Vivek,
On 19/01/17 13:56, Vivek Gautam wrote:
> Hi,
>
>
> On Wed, Jun 22, 2016 at 2:00 PM, Roger Quadros wrote:
>
> Luckily hit this thread while checking about DRD role functionality for DWC3.
>
>> On 22/06/16 11:14, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Roger Quadros
This adds the CPPI 4.1 DMA controller to the USB OTG controller.
Changes since v2:
- Fixed the the property reg-names (had glue register defined)
- Removed few useless property
Signed-off-by: Alexandre Bailon
---
arch/arm/boot/dts/da850.dtsi | 25 +
On 01/19/2017 02:35 AM, Greg KH wrote:
> On Fri, Jan 13, 2017 at 04:38:32PM -0700, Shuah Khan wrote:
>> Update USB/IP driver location in README.
>>
>> Signed-off-by: Shuah Khan
>> Reviewed-by: Krzysztof Opasiak
>> ---
>> tools/usb/usbip/README | 2
In the DA8xx, USB and CPPI 4.1 are sharing the same interrupt line.
Update the driver to request a shared irq.
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/musb_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/musb/musb_core.c
The DMA may hung up if a teardown is initiated while an endpoint is still
active (Advisory 2.3.27 of DA8xx errata).
To workaround this issue, add a delay before to initiate the teardown.
Signed-off-by: Alexandre Bailon
---
drivers/usb/musb/da8xx.c | 2 +-
Currently, DA8xx doesn't support PM runtime.
In addition, the glue driver is managing the clock itself.
But the CPPI DMA needs to manage this clock too.
Add support to PM runtime and use the callback to enable / disable
the clock. And because the CPPI 4.1 is a child of Da8xx USB,
it will be able
On Wed, Jan 18, 2017 at 04:09:32AM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Wed, Jan 18, 2017 at 4:06 AM, Maxime Ripard
> wrote:
> > On Wed, Jan 18, 2017 at 12:57:08AM +0800, Icenowy Zheng wrote:
> >>
> >>
> >> 17.01.2017, 16:06, "Maxime Ripard"
* Bin Liu [170118 19:42]:
> On Wed, Jan 18, 2017 at 06:29:59PM -0800, Tony Lindgren wrote:
> > At least with the cppi41 dma, size 1 in dma transfers will just wait
>
> In which case do you see the size 1 transfer? using testusb?
>
> > until the device is disconnected. This causes
On 01/19/2017 03:48 PM, Sekhar Nori wrote:
> On Thursday 19 January 2017 07:39 PM, Alexandre Bailon wrote:
>> Add usb20 to the list of clock supported by PM runtime.
>>
>> Signed-off-by: Alexandre Bailon
>> ---
>> arch/arm/mach-davinci/pm_domain.c | 2 +-
>> 1 file changed,
On Thursday 19 January 2017 07:39 PM, Alexandre Bailon wrote:
> Add usb20 to the list of clock supported by PM runtime.
>
> Signed-off-by: Alexandre Bailon
> ---
> arch/arm/mach-davinci/pm_domain.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
Hi Roger,
On 2017-01-19 17:45, Roger Quadros wrote:
Vivek,
On 19/01/17 13:56, Vivek Gautam wrote:
Hi,
On Wed, Jun 22, 2016 at 2:00 PM, Roger Quadros wrote:
Luckily hit this thread while checking about DRD role functionality
for DWC3.
On 22/06/16 11:14, Felipe Balbi
On 01/19/2017 05:08 PM, Alexandre Bailon wrote:
Currently, DA8xx doesn't support PM runtime.
In addition, the glue driver is managing the clock itself.
But the CPPI DMA needs to manage this clock too.
Add support to PM runtime and use the callback to enable / disable
the clock.
I think
On 01/19/2017 09:08 AM, Alexandre Bailon wrote:
> On 01/19/2017 03:48 PM, Sekhar Nori wrote:
>> On Thursday 19 January 2017 07:39 PM, Alexandre Bailon wrote:
>>> Add usb20 to the list of clock supported by PM runtime.
>>>
>>> Signed-off-by: Alexandre Bailon
>>> ---
>>>
On 1/19/2017 12:17 PM, Florian Fainelli wrote:
> On 01/19/2017 12:07 PM, Scott Branden wrote:
>> Hi Florian,
>>
>> On 17-01-19 11:40 AM, Florian Fainelli wrote:
>>> On 01/19/2017 11:30 AM, Scott Branden wrote:
Hi Rob,
On 17-01-19 09:36 AM, Rob Herring wrote:
> On Tue, Jan 17,
On 1/19/2017 12:17 PM, Felipe Balbi wrote:
>
> Hi,
>
> Bryan O'Donoghue writes:
>> - DWC_USB3_NUM indicates the number of Device mode single directional
>> endpoints, including OUT and IN endpoint 0.
>>
>> - DWC_USB3_NUM_IN_EPS indicates the maximum number of
On 01/19/2017 02:36 PM, Scott Branden wrote:
The driver stands alone from the SoC and does not need compatibility
strings per SoC. New SoCs will use the exact same block.
>>>
>>> Even if you take the exact same block and put it in a different SoC,
>>> that's still an integration work
On 1/17/2017 8:13 AM, Bruno Herrera wrote:
> This patch introduces a new parameter to activate USB OTG HS/FS core embedded
> phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the
> transceiver.
> Also add the dwc2_core_params structure for stm32f4 otg fs.
>
> Signed-off-by:
On 17-01-19 01:55 PM, Ray Jui wrote:
On 1/19/2017 12:17 PM, Florian Fainelli wrote:
On 01/19/2017 12:07 PM, Scott Branden wrote:
Hi Florian,
On 17-01-19 11:40 AM, Florian Fainelli wrote:
On 01/19/2017 11:30 AM, Scott Branden wrote:
Hi Rob,
On 17-01-19 09:36 AM, Rob Herring wrote:
On
On Thu, Jan 19, 2017 at 02:21:26PM +0200, Mathias Nyman wrote:
> Hi Greg
>
> This series by Arnd Bergmann was originally six patches, but last two of
> them were already taken to 4.10. Without the rest of them there will
> be a regression in 4.10.
Is it really a regression? I thought this had
As IN request has to be allocated in set_alt() and released in
disable() we cannot use mutex to protect it as we cannot sleep
in those funcitons. Let's replace this mutex with a spinlock.
Cc: sta...@vger.kernel.org
Signed-off-by: Krzysztof Opasiak
---
Requests for out endpoint are allocated in bind() function
but never released.
This commit ensures that all pending requests are released
when we disable out endpoint.
Fixes: 99c515005857 ("usb: gadget: hidg: register OUT INT endpoint for
SET_REPORT")
Cc: sta...@vger.kernel.org
Signed-off-by:
Since commit ba1582f22231 ("usb: gadget: f_hid: use alloc_ep_req()")
we cannot allocate any requests in bind() as we check if we should
align request buffer based on endpoint descriptor which is assigned
in set_alt().
Allocating request in bind() function causes a NULL pointer
dereference.
This
- DWC_USB3_NUM indicates the number of Device mode single directional
endpoints, including OUT and IN endpoint 0.
- DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
endpoints active at any time, including control endpoint 0.
It's possible to configure RTL such that
When we unlock our spinlock to copy data to user we may get
disabled by USB host and free the whole list of completed out
requests including the one from which we are copying the data
to user memory.
To prevent from this let's remove our working element from
the list and place it back only if
On 01/19/2017 02:44 AM, Raviteja Garimella wrote:
> Hi,
>
> On Thu, Jan 19, 2017 at 12:15 AM, Florian Fainelli
> wrote:
>> On 01/17/2017 12:05 AM, Raviteja Garimella wrote:
>>> This patch splits the amd5536udc driver into two -- one that does
>>> pci device registration
On 01/19/2017 02:13 PM, Alexandre Bailon wrote:
The DA8xx has a CPPI 4.1 DMA controller.
This is add the glue layer required to make it work on DA8xx.
Signed-off-by: Alexandre Bailon
---
drivers/dma/Kconfig | 6 +++---
drivers/dma/cppi41.c | 24
On Thu, Jan 19, 2017 at 11:42:47AM -0800, Florian Fainelli wrote:
> On 01/13/2017 07:20 AM, Russell King - ARM Linux wrote:
> > This series cleans up phylib's MMD accessors, so that we have a common
> > way of accessing the Clause 45 register set.
> >
> > The current situation is far from ideal -
Hi Florian,
On 17-01-19 11:40 AM, Florian Fainelli wrote:
On 01/19/2017 11:30 AM, Scott Branden wrote:
Hi Rob,
On 17-01-19 09:36 AM, Rob Herring wrote:
On Tue, Jan 17, 2017 at 01:35:07PM +0530, Raviteja Garimella wrote:
This patch adds device tree bindings documentation for Synopsys
USB
Hi,
Bryan O'Donoghue writes:
> - DWC_USB3_NUM indicates the number of Device mode single directional
> endpoints, including OUT and IN endpoint 0.
>
> - DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
> endpoints active at any time, including
On 01/19/2017 12:07 PM, Scott Branden wrote:
> Hi Florian,
>
> On 17-01-19 11:40 AM, Florian Fainelli wrote:
>> On 01/19/2017 11:30 AM, Scott Branden wrote:
>>> Hi Rob,
>>>
>>> On 17-01-19 09:36 AM, Rob Herring wrote:
On Tue, Jan 17, 2017 at 01:35:07PM +0530, Raviteja Garimella wrote:
>
Hi Ingo,
On 01/19/2017 05:38 PM, Ingo Molnar wrote:
> * Lu Baolu wrote:
>
>> index 8a12199..c4031b9 100644
>> --- a/arch/x86/kernel/early_printk.c
>> +++ b/arch/x86/kernel/early_printk.c
>> @@ -17,6 +17,7 @@
>> #include
>> #include
>> #include
>> +#include
>>
Hi Ingo,
On 01/19/2017 05:39 PM, Ingo Molnar wrote:
> * Lu Baolu wrote:
>
>> This patch add dbc debug device support in usb_debug driver.
> s/add dbc debug device support in usb_debug driver
> /adds dbc debug device support to the usb_debug driver
>
> Please fix the
Hi Ingo,
On 01/19/2017 05:41 PM, Ingo Molnar wrote:
> * Lu Baolu wrote:
>
>> Add Documentation/usb/usb3-debug-port.rst. This document includes
>> the user guide for USB3 debug port.
>>
>> Cc: linux-...@vger.kernel.org
>> Signed-off-by: Lu Baolu
Hi Ingo,
On 01/19/2017 05:12 PM, Ingo Molnar wrote:
> * Lu Baolu wrote:
>
>> xHCI debug capability (DbC) is an optional but standalone
>> functionality provided by an xHCI host controller. With DbC
>> hardware initialized, the system will present a debug device
>>
On Thu, 2017-01-19 at 13:22 +0100, Matthias Brugger wrote:
>
> On 18/01/17 07:08, Chunfeng Yun wrote:
> > usually, the reference clock comes from 26M oscillator directly,
> > but some SoCs are not, add it for compatibility.
> >
> > Signed-off-by: Chunfeng Yun
> > ---
>
Hi Ingo,
I'm very appreciated for your review comments. I've put my
replies in lines.
On 01/19/2017 05:37 PM, Ingo Molnar wrote:
> * Lu Baolu wrote:
>
>> xHCI debug capability (DbC) is an optional but standalone
>> functionality provided by an xHCI host controller.
On Thursday 19 January 2017 10:12 PM, Sergei Shtylyov wrote:
> On 01/19/2017 05:08 PM, Alexandre Bailon wrote:
>
>> Currently, DA8xx doesn't support PM runtime.
>> In addition, the glue driver is managing the clock itself.
>> But the CPPI DMA needs to manage this clock too.
>> Add support to PM
On Thu, Jan 19, 2017 at 07:04:57AM -0800, Tony Lindgren wrote:
> * Bin Liu [170118 19:42]:
> > On Wed, Jan 18, 2017 at 06:29:59PM -0800, Tony Lindgren wrote:
> > > At least with the cppi41 dma, size 1 in dma transfers will just wait
> >
> > In which case do you see the size 1
On 01/19/2017 11:30 AM, Scott Branden wrote:
> Hi Rob,
>
> On 17-01-19 09:36 AM, Rob Herring wrote:
>> On Tue, Jan 17, 2017 at 01:35:07PM +0530, Raviteja Garimella wrote:
>>> This patch adds device tree bindings documentation for Synopsys
>>> USB device controller platform driver.
>>
>> Bindings
Hi Rob,
On 17-01-19 09:36 AM, Rob Herring wrote:
On Tue, Jan 17, 2017 at 01:35:07PM +0530, Raviteja Garimella wrote:
This patch adds device tree bindings documentation for Synopsys
USB device controller platform driver.
Bindings describe h/w, not drivers.
Signed-off-by: Raviteja Garimella
On 01/13/2017 07:20 AM, Russell King - ARM Linux wrote:
> This series cleans up phylib's MMD accessors, so that we have a common
> way of accessing the Clause 45 register set.
>
> The current situation is far from ideal - we have phy_(read|write)_mmd()
> which accesses Clause 45 registers over
On Tue, Jan 17, 2017 at 02:12:37PM -0200, Bruno Herrera wrote:
> This patch adds the documentation for STM32F4x9 USB OTG FS/HS compatible
> strings.
>
> Signed-off-by: Bruno Herrera
> ---
> Documentation/devicetree/bindings/usb/dwc2.txt | 4
> 1 file changed, 4
Thanks for the quick feedback Felipe, appreciated, I'll take on-board
those changes.
---
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The rtl8152_post_reset() doesn't submit the rx urb, so the rx wouldn't work.
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index f3b48ad..e8f4f88 100644
---
> Subject: [PATCH net] r8152: fix the rx doesn't work
>
> The rtl8152_post_reset() doesn't submit the rx urb, so the rx wouldn't work.
>
> Signed-off-by: Hayes Wang
Excuse me. Please ignore this patch. I would submit another one.
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The rtl8152_post_reset() should sumbit rx urb and interrupt transfer,
otherwise the rx wouldn't work and the linking change couldn't be
detected.
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
On 01/19/2017 05:08 PM, Alexandre Bailon wrote:
Currently, only the PIO mode is supported.
This add support of CPPI 4.1 to DA8xx.
As the In DA8xx the CPPI 4.1 DMA is a part of the USB.
Create the CPPI 4.1 device as a child of USB.
Signed-off-by: Alexandre Bailon
---
* Tony Lindgren [170119 07:57]:
> * Bin Liu [170119 07:14]:
> > On Thu, Jan 19, 2017 at 07:04:57AM -0800, Tony Lindgren wrote:
> > > * Bin Liu [170118 19:42]:
> > > > On Wed, Jan 18, 2017 at 06:29:59PM -0800, Tony Lindgren wrote:
> > > > > At least
On Tue, Jan 17, 2017 at 01:35:07PM +0530, Raviteja Garimella wrote:
> This patch adds device tree bindings documentation for Synopsys
> USB device controller platform driver.
Bindings describe h/w, not drivers.
>
> Signed-off-by: Raviteja Garimella
> ---
>
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