Hello,
currently I am trying to get the USB controllers on the Amlogic Meson
GXL SoCs working: there is one dwc2 and dwc3 controller each.
The SoC itself provides 3x USB2 PHYs and 1x USB3 PHY.
I wrote drivers for both of them based on the vendor kernel, see [0]
The PHY registers of the USB2 PHYs
On Thu, Nov 24, 2016 at 6:42 PM, Martin Blumenstingl
wrote:
> Hello,
>
> currently I am trying to get the USB controllers on the Amlogic Meson
> GXL SoCs working: there is one dwc2 and dwc3 controller each.
>
> The SoC itself provides 3x USB2 PHYs and 1x USB3 PHY.
> I wrot
On Thu, Nov 24, 2016 at 6:42 PM, Martin Blumenstingl
wrote:
> Hello,
>
> currently I am trying to get the USB controllers on the Amlogic Meson
> GXL SoCs working: there is one dwc2 and dwc3 controller each.
>
> The SoC itself provides 3x USB2 PHYs and 1x USB3 PHY.
> I wrot
Hello,
while adding USB support on the Amlogic Meson GXL / GXM SoCs I have
come across something I did not know yet:
dwc3 has an internal USB2 hub (from what I can read in the code there
seem to be multiple USB3 ports supported as well).
When searching the web I did not come across any SoC that us
On Sun, Nov 27, 2016 at 2:02 PM, Martin Blumenstingl
wrote:
> Hello,
>
> while adding USB support on the Amlogic Meson GXL / GXM SoCs I have
> come across something I did not know yet:
> dwc3 has an internal USB2 hub (from what I can read in the code there
> seem to be m
Hello Felipe, Hello John,
On Sun, Nov 27, 2016 at 2:05 PM, Martin Blumenstingl
wrote:
> On Sun, Nov 27, 2016 at 2:02 PM, Martin Blumenstingl
> wrote:
>> Hello,
>>
>> while adding USB support on the Amlogic Meson GXL / GXM SoCs I have
>> come across something I di
Hi Felipe,
On Mon, Jan 9, 2017 at 11:37 AM, Felipe Balbi
wrote:
>
> Hi,
>
> Martin Blumenstingl writes:
>> while adding USB support on the Amlogic Meson GXL / GXM SoCs I have
>> come across something I did not know yet:
>> dwc3 has an internal USB2 hub (from wha
On Mon, Jan 9, 2017 at 12:18 PM, Felipe Balbi
wrote:
>
> Hi,
>
> Martin Blumenstingl writes:
>>> Martin Blumenstingl writes:
>>>> while adding USB support on the Amlogic Meson GXL / GXM SoCs I have
>>>> come across something I did not know yet:
&g
On Mon, Jan 9, 2017 at 12:55 PM, Felipe Balbi
wrote:
>
> Hi,
>
> Martin Blumenstingl writes:
>> On Mon, Jan 9, 2017 at 12:18 PM, Felipe Balbi
>> wrote:
>>>
>>> Hi,
>>>
>>> Martin Blumenstingl writes:
>>>>> Martin Blu
On Mon, Jan 9, 2017 at 1:16 PM, Felipe Balbi
wrote:
>
> Hi,
>
> Martin Blumenstingl writes:
>>>>>>>> When searching the web I did not come across any SoC that uses a
>>>>>>>> configuration with more than one port enabled.
>>&
On Mon, Jan 9, 2017 at 1:39 PM, Felipe Balbi
wrote:
>
> Hi,
>
> Martin Blumenstingl writes:
>
> [snip]
>
>>>>> true. But even so, that PHY handle is only needed for devices which
>>>>> weren't properly configured at coreConsultant tim
dwc3 internally creates a usb-xhci device which means that all
properties documented in usb-xhci.txt are supported as well.
Signed-off-by: Martin Blumenstingl
---
Documentation/devicetree/bindings/usb/dwc3.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree
roothub via
devicetree. This can be extended by not just parsing PHYs (some of the
other drivers listed above are for example also parsing a list of clocks
as well) when required.
Signed-off-by: Martin Blumenstingl
---
.../devicetree/bindings/usb/usb-roothub.txt| 41 ++
drivers/usb/host
with up to three ports enabled on
the internal roothub. Using only the top-level "phy" properties does not
work here since one can only specify one "usb2-phy" and one "usb3-phy",
while actually at least two "usb2-phy" have to be specified.
Signed-off-by:
infradead.org/pipermail/linux-amlogic/2017-January/001947.html
[2] http://lists.infradead.org/pipermail/linux-amlogic/2016-November/001818.html
[3] http://lists.infradead.org/pipermail/linux-amlogic/2017-January/001948.html
Martin Blumenstingl (2):
usb: host: add a generic platform USB roothub driver
On Mon, Jan 9, 2017 at 2:05 PM, Felipe Balbi
wrote:
>
> Hi,
>
> Martin Blumenstingl writes:
>> On Mon, Jan 9, 2017 at 1:39 PM, Felipe Balbi
>> wrote:
>>>
>>> Hi,
>>>
>>> Martin Blumenstingl writes:
>>>
>>> [snip]
&
Hi Rob,
On Fri, Jan 13, 2017 at 9:08 PM, Rob Herring wrote:
> On Wed, Jan 11, 2017 at 04:29:46PM +0100, Martin Blumenstingl wrote:
>> Many SoC platforms have separate devices for the USB PHY which are
>> registered through the generic PHY framework. These PHYs have to be
>>
On Thu, Sep 8, 2016 at 9:35 PM, Kevin Hilman wrote:
>> + phy = devm_phy_create(&pdev->dev, NULL, &phy_meson_usb2_ops);
>> + if (IS_ERR(phy)) {
>> + dev_err(&pdev->dev, "failed to create PHY\n");
>> + return PTR_ERR(phy);
>> + }
>> +
>> + if (usb_reset_refcnt
On Thu, Sep 8, 2016 at 10:53 PM, Ben Dooks wrote:
> On 08/09/16 21:42, Kevin Hilman wrote:
>>
>> Ben Dooks writes:
>>
>>> On 08/09/16 20:52, Martin Blumenstingl wrote:
>>>>
>>>> On Thu, Sep 8, 2016 at 9:35 PM, Kevin Hilman
>>>>
On Fri, Sep 9, 2016 at 5:33 PM, Kevin Hilman wrote:
> However, the problem with all of the solutions proposed (runtime PM ones
> included) is that we're forcing a board-specific design issue (2 devices
> sharing a reset line) into a driver that should not have any
> board-specific assumptions in i
On Fri, Sep 9, 2016 at 7:21 PM, Ben Dooks wrote:
> On 09/09/16 17:14, Martin Blumenstingl wrote:
>>
>> On Fri, Sep 9, 2016 at 5:33 PM, Kevin Hilman wrote:
>>>
>>> However, the problem with all of the solutions proposed (runtime PM ones
>>> included) is
On Fri, Sep 9, 2016 at 5:33 PM, Kevin Hilman wrote:
> Martin Blumenstingl writes:
>
>> On Thu, Sep 8, 2016 at 10:53 PM, Ben Dooks wrote:
>>> On 08/09/16 21:42, Kevin Hilman wrote:
>>>>
>>>> Ben Dooks writes:
>>>>
>>>>> O
From: Jerome Brunet
Add compatible strings for amlogic Meson8b and GXBB SoCs with the
corresponding configuration parameters.
Signed-off-by: Jerome Brunet
Signed-off-by: Martin Blumenstingl
---
Documentation/devicetree/bindings/usb/dwc2.txt | 2 ++
drivers/usb/dwc2/platform.c
Add the documentation for the bindings for the Meson8b and GXBB USB2
PHYs.
Signed-off-by: Martin Blumenstingl
---
.../devicetree/bindings/phy/meson-usb2-phy.txt | 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/meson-usb2
[0]
https://github.com/150balbes/Amlogic_s905-kernel/blob/master/drivers/amlogic/usb/dwc_otg/310/dwc_otg_driver.c#L642
Jerome Brunet (2):
usb: dwc2: add support for Meson8b and GXBB SoCs
ARM64: meson-gxbb-p20x: Enable USB Nodes
Martin Blumenstingl (4):
Documentation: dt-bindings: Add do
This is a new driver for the USB PHY found in Meson8b and GXBB SoCs.
Signed-off-by: Martin Blumenstingl
Signed-off-by: Jerome Brunet
Tested-by: Kevin Hilman
---
drivers/phy/Kconfig | 11 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-meson-usb2.c | 280
From: Jerome Brunet
Enable both gxbb USB controller and add a 5V regulator for the OTG port
VBUS
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 29
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxb
Add the nodes for the dwc2 USB controller and the related USB PHYs.
Currently we force usb0 to host mode because OTG is currently not
working in our PHY driver.
Signed-off-by: Martin Blumenstingl
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 43
Enable both gxbb USB controller and add a 5V regulator for the OTG port
VBUS
Signed-off-by: Martin Blumenstingl
Signed-off-by: Jerome Brunet
---
.../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts
On Fri, Sep 9, 2016 at 10:36 PM, Martin Blumenstingl
wrote:
> On Fri, Sep 9, 2016 at 5:33 PM, Kevin Hilman wrote:
>> Martin Blumenstingl writes:
>>
>>> On Thu, Sep 8, 2016 at 10:53 PM, Ben Dooks
>>> wrote:
>>>> On 08/09/16 21:42, Kevi
Hi Philipp,
On Tue, Sep 13, 2016 at 5:28 PM, Philipp Zabel wrote:
> Hi Martin,
>
> Am Freitag, den 09.09.2016, 22:36 +0200 schrieb Martin Blumenstingl:
>> On Fri, Sep 9, 2016 at 5:33 PM, Kevin Hilman wrote:
>> > Martin Blumenstingl writes:
>> >
>> >&g
On Wed, Sep 14, 2016 at 10:37 AM, Philipp Zabel wrote:
> Am Dienstag, den 13.09.2016, 17:59 -0700 schrieb Kevin Hilman:
>> Martin Blumenstingl writes:
>>
>> > On Tue, Sep 13, 2016 at 5:28 PM, Philipp Zabel
>> > wrote:
>>
>> [...]
>>
>>
On Wed, Sep 14, 2016 at 10:37 AM, Philipp Zabel wrote:
> Am Dienstag, den 13.09.2016, 20:38 +0200 schrieb Martin Blumenstingl:
>> Hi Philipp,
>>
>> On Tue, Sep 13, 2016 at 5:28 PM, Philipp Zabel
>> wrote:
>> > Hi Martin,
>> >
>> >
On Sun, Sep 11, 2016 at 3:41 PM, Martin Blumenstingl
wrote:
> This is a new driver for the USB PHY found in Meson8b and GXBB SoCs.
>
> Signed-off-by: Martin Blumenstingl
> Signed-off-by: Jerome Brunet
> Tested-by: Kevin Hilman
> ---
> drivers/phy/Kconfig |
Hi Kishon,
On Fri, Sep 16, 2016 at 10:19 AM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Friday 09 September 2016 09:44 PM, Martin Blumenstingl wrote:
>> On Fri, Sep 9, 2016 at 5:33 PM, Kevin Hilman wrote:
>>> However, the problem with all of the solutions proposed (runt
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.
Signed-off-by: Jerome Brunet
Signed-off-by: Martin Blumenstingl
---
drivers/clk/meson/gxbb.h
From: Jerome Brunet
Add compatible strings for amlogic Meson8b and GXBB SoCs with the
corresponding configuration parameters.
Signed-off-by: Martin Blumenstingl
Signed-off-by: Jerome Brunet
---
Documentation/devicetree/bindings/usb/dwc2.txt | 2 ++
drivers/usb/dwc2/platform.c
(2):
usb: dwc2: add support for Meson8b and GXBB SoCs
ARM64: meson-gxbb-p20x: Enable USB Nodes
Martin Blumenstingl (5):
clk: gxbb: expose USB clocks
Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
phy: meson: add USB2 PHY support for Meson8b and GXBB
ARM64: meson-gxb
From: Jerome Brunet
Enable both gxbb USB controller and add a 5V regulator for the OTG port
VBUS
Signed-off-by: Jerome Brunet
Signed-off-by: Martin Blumenstingl
---
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 29
1 file changed, 29 insertions(+)
diff --git a
Add the nodes for the dwc2 USB controller and the related USB PHYs.
Currently we force usb0 to host mode because OTG is currently not
working in our PHY driver.
Signed-off-by: Jerome Brunet
Signed-off-by: Martin Blumenstingl
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 52
This is a new driver for the USB PHY found in Meson8b and GXBB SoCs.
Signed-off-by: Martin Blumenstingl
Signed-off-by: Jerome Brunet
---
drivers/phy/Kconfig | 11 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-meson-usb2.c | 299
Add the documentation for the bindings for the Meson8b and GXBB USB2
PHYs.
Signed-off-by: Martin Blumenstingl
---
.../devicetree/bindings/phy/meson-usb2-phy.txt | 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/meson-usb2
Enable both gxbb USB controller and add a 5V regulator for the OTG port
VBUS
Signed-off-by: Martin Blumenstingl
Signed-off-by: Jerome Brunet
---
.../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts
On Wed, Sep 7, 2016 at 2:33 AM, Stephen Boyd wrote:
> On 09/04, Martin Blumenstingl wrote:
>> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
>> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
>> Expose these clocks to DT and comm
Hi Rob,
On Fri, Jan 13, 2017 at 9:21 PM, Martin Blumenstingl
wrote:
> Hi Rob,
>
> On Fri, Jan 13, 2017 at 9:08 PM, Rob Herring wrote:
>> On Wed, Jan 11, 2017 at 04:29:46PM +0100, Martin Blumenstingl wrote:
>>> Many SoC platforms have separate devices for the USB PHY
Hi Neil,
On Mon, Mar 4, 2019 at 11:40 AM Neil Armstrong wrote:
[...]
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
there's a "regmap" include right above. this driver doesn't use syscon
so this include can be dropped
[...]
> +static int phy_meson_g12a
Hi Neil,
On Mon, Mar 4, 2019 at 11:40 AM Neil Armstrong wrote:
[...]
> +static int phy_g12a_usb3_init(struct phy *phy)
> +{
> + struct phy_g12a_usb3_pcie_priv *priv = phy_get_drvdata(phy);
> + int data, ret;
> +
> + /* Switch PHY to USB3 */
> + regmap_update_bits(priv->reg
ce to which the controller is connected
provides power, thus the regulator has to be disabled
Add the dt-bindings documentation for this property so .dts authors know
that this property exists and how it behaves.
Fixes: 531ef5ebea9639 ("usb: dwc2: add support for host mode ext
s, and
> setups the on-chip OTG mode selection for this PHY.
>
> The PHYs phandles are passed to the Glue node since the Glue controls the
> interface with the PHY, not the DWC3 controller.
>
> Signed-off-by: Neil Armstrong
Reviewed-by: Martin Blumensting
eneric PHY initialization within
> the HCD core (as there is none); or they use a single 'phy' and the
> code flow does not pass through the block setting
> hcd->skip_phy_initialization anyway.
>
> While there is not users of both PHY types at the same time, drop this
> l
Hi Miquel,
On Fri, Mar 29, 2019 at 4:16 PM Miquel Raynal wrote:
>
> Hi Martin,
>
> Martin Blumenstingl wrote on Tue,
> 26 Mar 2019 18:29:25 +0100:
>
> > Hello Miquel,
> >
> > On Tue, Mar 26, 2019 at 9:39 AM Miquel Raynal
> > wrote:
> > >
&g
Hi Roger,
On Fri, Mar 16, 2018 at 3:32 PM, Roger Quadros wrote:
> +some TI folks
>
> Hi Martin,
>
> On 18/02/18 20:44, Martin Blumenstingl wrote:
>> Many SoC platforms have separate devices for the USB PHY which are
>> registered through the generic PHY frame
Hi Roger,
On Mon, Mar 19, 2018 at 9:49 AM, Roger Quadros wrote:
> Hi,
>
> On 19/03/18 00:29, Martin Blumenstingl wrote:
>> Hi Roger,
>>
>> On Fri, Mar 16, 2018 at 3:32 PM, Roger Quadros wrote:
>>> +some TI folks
>>>
>>> Hi Martin,
>>&
Hello Kishon,
On Tue, Mar 20, 2018 at 12:27 PM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Monday 19 March 2018 09:42 PM, Martin Blumenstingl wrote:
>> Hi Roger,
>>
>> On Mon, Mar 19, 2018 at 9:49 AM, Roger Quadros wrote:
>>> Hi,
>>>
>>>
Hi Roger, Hi Chunfeng,
On Tue, Mar 20, 2018 at 1:04 PM, Chunfeng Yun wrote:
> Hi Martin & Roger:
>
> On Mon, 2018-03-19 at 17:12 +0100, Martin Blumenstingl wrote:
>> Hi Roger,
>>
>> On Mon, Mar 19, 2018 at 9:49 AM, Roger Quadros wrote:
>> > Hi,
>>
Hi Roger,
On Wed, Mar 21, 2018 at 12:30 PM, Roger Quadros wrote:
> Martin,
>
> On 21/03/18 00:01, Martin Blumenstingl wrote:
>> Hi Roger, Hi Chunfeng,
>>
>> On Tue, Mar 20, 2018 at 1:04 PM, Chunfeng Yun
>> wrote:
>>> Hi Martin & Roger:
>
() to the "ret"
variable to propagate the error correctly.
Fixes: 07dbff0ddbd86c ("usb: core: add a wrapper for the USB PHYs on the HCD")
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driv
the PHY wrapper into the HCD
core")
Reported-by: Roger Quadros
Suggested-by: Roger Quadros
Suggested-by: Chunfeng Yun
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/hcd.c | 8 +---
drivers/usb/core/phy.c | 37 +
drivers/usb/core/phy.h |
that failed somewhere).
This is a preparation step for adding proper suspend support for some
hardware that requires phy_exit to be called during suspend and phy_init
to be called during resume.
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/hcd.c | 10 +++---
drivers/usb/core/phy.c
h/006819.html
[4] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006794.html
Martin Blumenstingl (2):
usb: core: split usb_phy_roothub_{init,alloc}
usb: core: use phy_exit during suspend if wake up is not supported
drivers/usb/core/hcd.c | 18 +++
drivers/usb/core/phy.c
Hi Chunfeng,
On Mon, Mar 26, 2018 at 5:43 AM, Chunfeng Yun wrote:
> On Sat, 2018-03-24 at 14:56 +0100, Martin Blumenstingl wrote:
>> usb_phy_roothub_exit() should return the error code from the phy_exit()
>> call if exiting the PHY failed.
>> However, since a w
Hi Chunfeng,
On Mon, Mar 26, 2018 at 5:37 AM, Chunfeng Yun wrote:
> On Sat, 2018-03-24 at 15:21 +0100, Martin Blumenstingl wrote:
>> Before this patch usb_phy_roothub_init served two purposes (from a
>> caller's point of view - like hcd.c):
>> - parsing the PHYs and a
that failed somewhere).
This is a preparation step for adding proper suspend support for some
hardware that requires phy_exit to be called during suspend and phy_init
to be called during resume.
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/hcd.c | 10 +++---
drivers/usb/core/phy.c
radead.org/pipermail/linux-amlogic/2018-March/006737.html
[2] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006758.html
[3] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006819.html
[4] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006794.html
[5] http://
bc1 ("usb: core: hcd: integrate the PHY wrapper into the HCD
core")
Reported-by: Roger Quadros
Suggested-by: Roger Quadros
Suggested-by: Chunfeng Yun
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/hcd.c | 8 +---
drivers/usb/core/phy.c | 35 ++
g/pipermail/linux-amlogic/2018-March/006819.html
[4] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006794.html
[5] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006820.html
[6] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006847.html
Martin Blumensti
that failed somewhere).
This is a preparation step for adding proper suspend support for some
hardware that requires phy_exit to be called during suspend and phy_init
to be called during resume.
Signed-off-by: Martin Blumenstingl
Tested-by: Chunfeng Yun
Reviewed-by: Roger Quadros
---
drivers/usb
bc1 ("usb: core: hcd: integrate the PHY wrapper into the HCD
core")
Reported-by: Roger Quadros
Suggested-by: Roger Quadros
Suggested-by: Chunfeng Yun
Signed-off-by: Martin Blumenstingl
Tested-by: Chunfeng Yun
Reviewed-by: Roger Quadros
---
drivers/usb/core/hcd.c | 8 +--
Hello Stefan,
On Sat, Mar 31, 2018 at 9:28 PM, Stefan Wahren wrote:
> If the generic PHY support is disabled the stub of devm_of_phy_get_by_index
> returns ENOSYS. This corner case isn't handled properly by
> usb_phy_roothub_add_phy and at least breaks USB support on Raspberry Pi
> (bcm2835_defco
Hello,
(great to hear that this might be useful on Socionext SoCs as well :))
On Wed, Apr 4, 2018 at 2:10 PM, Masahiro Yamada
wrote:
> 2018-03-04 6:43 GMT+09:00 Martin Blumenstingl
> :
>> Many SoC platforms have separate devices for the USB PHY which are
>> registered throu
Hi Greg,
On Thu, Apr 5, 2018 at 3:38 PM, Greg KH wrote:
> On Thu, Apr 05, 2018 at 11:47:11AM +0300, Roger Quadros wrote:
>> Greg,
>>
>> On 28/03/18 00:26, Martin Blumenstingl wrote:
>> > This is a follow-up to my previous series "initialize (multiple) PHYs
&g
On Fri, Apr 6, 2018 at 5:48 AM, Masahiro Yamada
wrote:
> 2018-04-06 5:04 GMT+09:00 Martin Blumenstingl
> :
>> Hello,
>>
>> (great to hear that this might be useful on Socionext SoCs as well :))
>>
>> On Wed, Apr 4, 2018 at 2:10 PM, Masahiro Yamada
>> w
Hello,
thank you for finding this!
On Sat, Apr 7, 2018 at 1:04 AM, Rishabh Bhatnagar
wrote:
> In file drivers/usb/core/phy.c line 114, ret variable is assigned to
> itself. The following error was observed:
>
> kernel/drivers/usb/core/phy.c:114:8: warning: explicitly assigning value of
> variabl
bc1 ("usb: core: hcd: integrate the PHY wrapper into the HCD
core")
Reported-by: Roger Quadros
Suggested-by: Roger Quadros
Suggested-by: Chunfeng Yun
Signed-off-by: Martin Blumenstingl
Tested-by: Chunfeng Yun
Reviewed-by: Roger Quadros
---
drivers/usb/core/hcd.c | 8 +--
;usb: core: add a wrapper for the USB PHYs on the HCD")
Signed-off-by: Martin Blumenstingl
Signed-off-by: Rishabh Bhatnagar
---
drivers/usb/core/phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/core/phy.c b/drivers/usb/core/phy.c
index 09b7c43c0ea4..f19
that failed somewhere).
This is a preparation step for adding proper suspend support for some
hardware that requires phy_exit to be called during suspend and phy_init
to be called during resume.
Signed-off-by: Martin Blumenstingl
Tested-by: Chunfeng Yun
Reviewed-by: Roger Quadros
---
drivers/usb
This clarifies the license of the code. While here also add an include
guard to the header file.
Fixes: 07dbff0ddbd86c ("usb: core: add a wrapper for the USB PHYs on the HCD")
Suggested-by: Masahiro Yamada
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/phy.h | 12 ++
HY is disabled). All
existing usb_phy_roothub_* functions are already NULL-safe, so no
special handling is required there.
Fixes: 07dbff0ddbd8 ("usb: core: add a wrapper for the USB PHYs on the HCD")
Reported-by: Stefan Wahren
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/phy.c
x27;t include any of the struct device API headers.
Fixes: 07dbff0ddbd86c ("usb: core: add a wrapper for the USB PHYs on the HCD")
Suggested-by: Masahiro Yamada
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/phy.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/u
amlogic/2018-March/006819.html
[4] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006794.html
[5] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006820.html
[6] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006847.html
[7] https://www.spinics.net/lists/
Hi Johan,
On Fri, Apr 13, 2018 at 5:15 PM, Johan Hovold wrote:
> I've been carrying a patch out-of-tree since my work on improving the
> USB device-tree support which is needed to be able to describe USB
> topologies for musb based controllers.
>
> This patch, which associates the platform contro
that failed somewhere).
This is a preparation step for adding proper suspend support for some
hardware that requires phy_exit to be called during suspend and phy_init
to be called during resume.
Signed-off-by: Martin Blumenstingl
Tested-by: Chunfeng Yun
Reviewed-by: Roger Quadros
Tested-by: Ke
;usb: core: add a wrapper for the USB PHYs on the HCD")
Signed-off-by: Martin Blumenstingl
Signed-off-by: Rishabh Bhatnagar
Tested-by: Keerthy
---
drivers/usb/core/phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/core/phy.c b/drivers/usb/core/phy.c
in
HY is disabled). All
existing usb_phy_roothub_* functions are already NULL-safe, so no
special handling is required there.
Fixes: 07dbff0ddbd8 ("usb: core: add a wrapper for the USB PHYs on the HCD")
Reported-by: Stefan Wahren
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/phy.c
bc1 ("usb: core: hcd: integrate the PHY wrapper into the HCD
core")
Reported-by: Roger Quadros
Suggested-by: Roger Quadros
Suggested-by: Chunfeng Yun
Signed-off-by: Martin Blumenstingl
Tested-by: Chunfeng Yun
Reviewed-by: Roger Quadros
Tested-by: Keerthy
---
drivers/usb/core/hcd.c | 8 ++
https://www.spinics.net/lists/linux-usb/msg167472.html
[8] http://lists.infradead.org/pipermail/linux-amlogic/2018-March/006882.html
[9] http://lists.infradead.org/pipermail/linux-amlogic/2018-April/007009.html
Martin Blumenstingl (6):
usb: core: phy: fix return value of usb_phy_roothub_exit()
usb:
This clarifies the license of the code. While here also add an include
guard to the header file.
Fixes: 07dbff0ddbd86c ("usb: core: add a wrapper for the USB PHYs on the HCD")
Suggested-by: Masahiro Yamada
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/phy.h | 12 ++
x27;t include any of the struct device API headers.
Fixes: 07dbff0ddbd86c ("usb: core: add a wrapper for the USB PHYs on the HCD")
Suggested-by: Masahiro Yamada
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/phy.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/u
Hello Johan,
On Thu, Apr 19, 2018 at 9:43 AM, Johan Hovold wrote:
> On Wed, Apr 18, 2018 at 09:18:30PM +0200, Martin Blumenstingl wrote:
>> Hi Johan,
>>
>> On Fri, Apr 13, 2018 at 5:15 PM, Johan Hovold wrote:
>> > I've been carrying a patch out-of-tree sinc
Hi Greg,
On Sun, Apr 22, 2018 at 3:01 PM, Greg KH wrote:
> On Wed, Apr 18, 2018 at 09:39:51PM +0200, Martin Blumenstingl wrote:
>> This clarifies the license of the code. While here also add an include
>> guard to the header file.
>>
>> Fixes: 07dbff0ddbd86c ("
Hello,
On Thu, Apr 19, 2018 at 1:03 PM, Masahiro Yamada
wrote:
> Historically, the clocks and resets are handled on the glue layer
> side instead of the DWC3 core. For simple cases, dwc3-of-simple.c
> takes care of arbitrary number of clocks and resets. The DT node
> structure typically looks l
(adding Yixun from Amlogic to this mail)
On Sat, Apr 28, 2018 at 4:41 AM, Masahiro Yamada
wrote:
> Hi Martin,
>
>
> 2018-04-24 2:44 GMT+09:00 Martin Blumenstingl
> :
>> Hello,
>>
>> On Thu, Apr 19, 2018 at 1:03 PM, Masahiro Yamada
>> wrote:
>>> Hi
Hello,
I was a bit surprised to see that hot-plugging USB devices on Amlogic
Meson8b (for example: Odroid-C1) is broken.
to be fair: I *think* it worked before, but I cannot guarantee it nor
can I say when it broke
all examples below are from an Odroid-C1 board with Amlogic Meson8b (S805) SoC.
th
Hello Minas,
On Mon, May 7, 2018 at 3:27 PM, Minas Harutyunyan
wrote:
> Hi Martin,
>
> On 5/7/2018 12:28 AM, Martin Blumenstingl wrote:
>> Hello,
>>
>> I was a bit surprised to see that hot-plugging USB devices on Amlogic
>> Meson8b (for example: Odroid-C1) is br
to struct usb_hcd")
> Cc: Martin Blumenstingl
> Reported-by: Mats Karrman
> Signed-off-by: Peter Chen
Acked-by: Martin Blumenstingl
> ---
> drivers/usb/chipidea/host.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/us
Hi Greg,
On Mon, Oct 2, 2017 at 2:44 PM, Greg KH wrote:
> On Mon, Oct 02, 2017 at 02:35:08PM +0200, Jerome Brunet wrote:
>> On Sun, 2017-10-01 at 22:32 +0200, Martin Blumenstingl wrote:
>> > Hello Greg, Hello Mathias,
>> >
>> > On Mon, Sep 18, 2017 at 10:49
Hi Mathias,
thank you for taking the time to go through my patch
On Wed, Oct 4, 2017 at 3:05 PM, Mathias Nyman
wrote:
> On 04.09.2017 00:38, Martin Blumenstingl wrote:
>>
>> Many SoC platforms have separate devices for the USB PHY which are
>> registered through the generic
at least two "usb2-phy" have to be specified.
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/hcd.c | 30 +-
include/linux/usb/hcd.h | 1 +
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
l=linux-usb&m=148414866303604&w=2
[5] https://www.spinics.net/lists/linux-usb/msg158967.html
[6] https://www.spinics.net/lists/devicetree/msg190426.html
[7] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004881.html
[8] http://lists.infradead.org/pipermail/linux-amlogic/201
corresponding port of the roothub via
devicetree.
This allows SoCs like the Amlogic Meson GXL family to operate correctly
because all USB PHYs are initialized (instead of the first USB PHY
only).
Signed-off-by: Martin Blumenstingl
---
drivers/usb/core/Makefile | 2 +-
drivers/usb/core/phy.c| 184
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